MIPS: octeon: Remove cpu_has_saa

The cpu_has_saa feature macro was added along with Cavium Octeon CPU
support back in commit 5b3b16880f40 ("MIPS: Add Cavium OCTEON processor
support files to arch/mips/cavium-octeon.") but has never been used.

Remove the dead code.

Signed-off-by: Paul Burton <paul.burton@mips.com>

diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index a4f798629c3d8147655b411cdcd1cf23f10e49de..93dd03ad7f9f6b17a1a6a09f05bd7d0d554a130c 100644 (file)
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -45,7 +45,6 @@
 #define cpu_has_ic_fills_f_dc  0
 #define cpu_has_64bits         1
 #define cpu_has_octeon_cache   1
-#define cpu_has_saa            octeon_has_saa()
 #define cpu_has_mips32r1       1
 #define cpu_has_mips32r2       1
 #define cpu_has_mips64r1       1
@@ -73,13 +72,6 @@
 #define ARCH_HAS_USABLE_BUILTIN_POPCOUNT 1
 #endif
 
-static inline int octeon_has_saa(void)
-{
-       int id;
-       asm volatile ("mfc0 %0, $15,0" : "=r" (id));
-       return id >= 0x000d0300;
-}
-
 /*
  * The last 256MB are reserved for device to device mappings and the
  * BAR1 hole.