drm/i915/psr: hsw_psr_activate.

On HSW+ the real activate of PSR is decided by the source
after certain amount of configured idle frames.

However for the driver perspective where we track psr.active
variable this function here is the actual activate one. So
let's rename it before moving to vfunc with that.

v2: Fix typo on commit message (DK).

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-4-rodrigo.vivi@intel.com

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 1d2b52e6a6d48349c2c2367be13980653702a4ce..92b3db3aa8301913baf92b9c163404e31270065c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -263,7 +263,7 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
                   VLV_EDP_PSR_ACTIVE_ENTRY);
 }
 
-static void intel_enable_source_psr1(struct intel_dp *intel_dp)
+static void hsw_activate_psr1(struct intel_dp *intel_dp)
 {
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = dig_port->base.base.dev;
@@ -317,7 +317,7 @@ static void intel_enable_source_psr1(struct intel_dp *intel_dp)
        I915_WRITE(EDP_PSR_CTL, val);
 }
 
-static void intel_enable_source_psr2(struct intel_dp *intel_dp)
+static void hsw_activate_psr2(struct intel_dp *intel_dp)
 {
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = dig_port->base.base.dev;
@@ -353,17 +353,22 @@ static void intel_enable_source_psr2(struct intel_dp *intel_dp)
        I915_WRITE(EDP_PSR2_CTL, val);
 }
 
-static void hsw_psr_enable_source(struct intel_dp *intel_dp)
+static void hsw_psr_activate(struct intel_dp *intel_dp)
 {
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct drm_device *dev = dig_port->base.base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
 
+       /* On HSW+ after we enable PSR on source it will activate it
+        * as soon as it match configure idle_frame count. So
+        * we just actually enable it here on activation time.
+        */
+
        /* psr1 and psr2 are mutually exclusive.*/
        if (dev_priv->psr.psr2_support)
-               intel_enable_source_psr2(intel_dp);
+               hsw_activate_psr2(intel_dp);
        else
-               intel_enable_source_psr1(intel_dp);
+               hsw_activate_psr1(intel_dp);
 }
 
 static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
@@ -469,11 +474,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
 
        /* Enable/Re-enable PSR on the host */
        if (HAS_DDI(dev_priv))
-               /* On HSW+ after we enable PSR on source it will activate it
-                * as soon as it match configure idle_frame count. So
-                * we just actually enable it here on activation time.
-                */
-               hsw_psr_enable_source(intel_dp);
+               hsw_psr_activate(intel_dp);
        else
                vlv_psr_activate(intel_dp);