ARM64: dts: marvell: armada-cp110: Add registers clock for the NAND node

This extra clock is needed to access the registers of the NAND controller
used on CP110 component of the Armada 7K/8K SoCs.

This follow the changes already made in the binding documentation (as
well as in the driver): "mtd: nand: marvell: Fix clock resource by adding
a register clock"

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index b6947fcb8ce6e744800ef5f901842f24ca5a5760..9ffb86b9441e9d3cdc5f42f5cc54db309267c530 100644 (file)
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -365,7 +365,9 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&CP110_LABEL(clk) 1 2>;
+                       clock-names = "core", "reg";
+                       clocks = <&CP110_LABEL(clk) 1 2>,
+                                <&CP110_LABEL(clk) 1 17>;
                        marvell,system-controller = <&CP110_LABEL(syscon0)>;
                        status = "disabled";
                };