drm/i915: Allow "max bpc" property to limit pipe_bpp

Use the newly added "max bpc" connector property to limit pipe bpp.

V3: Use drm_connector_state to access the "max bpc" property
V4: Initialize the drm property, add suuport to DP(Ville)
V5: Use the property in the connector and fix CI failure(Ville)
V6: Use the core function to attach max_bpc property, remove the redundant
    clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
V9: Cleanup connected_sink_max_bpp and fix initial value in DP(Ville)
V12: Fix debug message(Ville)
V13: Remove the redundant check and simplify the check logic(Stan)
V14: Fix the check in connected_sink_max_bpp(Stan)
v15 (From Manasi): Add missing break (Stan)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Kishore Kadiyala <kishore.kadiyala@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023014400.16055-1-manasi.d.navare@intel.com

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b219d5858160d3814322654b5446ce0fadb3c528..31fbf67cb66142535ba5784cf95214e4bd1e77d0 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10928,30 +10928,38 @@ static void intel_modeset_update_connector_atomic_state(struct drm_device *dev)
        drm_connector_list_iter_end(&conn_iter);
 }
 
-static void
-connected_sink_compute_bpp(struct intel_connector *connector,
-                          struct intel_crtc_state *pipe_config)
+static int
+connected_sink_max_bpp(const struct drm_connector_state *conn_state,
+                      struct intel_crtc_state *pipe_config)
 {
-       const struct drm_display_info *info = &connector->base.display_info;
-       int bpp = pipe_config->pipe_bpp;
-
-       DRM_DEBUG_KMS("[CONNECTOR:%d:%s] checking for sink bpp constrains\n",
-                     connector->base.base.id,
-                     connector->base.name);
+       int bpp;
+       struct drm_display_info *info = &conn_state->connector->display_info;
 
-       /* Don't use an invalid EDID bpc value */
-       if (info->bpc != 0 && info->bpc * 3 < bpp) {
-               DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported max of %d\n",
-                             bpp, info->bpc * 3);
-               pipe_config->pipe_bpp = info->bpc * 3;
+       switch (conn_state->max_bpc) {
+       case 6 ... 7:
+               bpp = 6 * 3;
+               break;
+       case 8 ... 9:
+               bpp = 8 * 3;
+               break;
+       case 10 ... 11:
+               bpp = 10 * 3;
+               break;
+       case 12:
+               bpp = 12 * 3;
+               break;
+       default:
+               return -EINVAL;
        }
 
-       /* Clamp bpp to 8 on screens without EDID 1.4 */
-       if (info->bpc == 0 && bpp > 24) {
-               DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",
-                             bpp);
-               pipe_config->pipe_bpp = 24;
+       if (bpp < pipe_config->pipe_bpp) {
+               DRM_DEBUG_KMS("Limiting display bpp to %d instead of Edid bpp "
+                             "%d, requested bpp %d, max platform bpp %d\n", bpp,
+                             3 * info->bpc, 3 * conn_state->max_requested_bpc,
+                             pipe_config->pipe_bpp);
+               pipe_config->pipe_bpp = bpp;
        }
+       return 0;
 }
 
 static int
@@ -10982,8 +10990,8 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
                if (connector_state->crtc != &crtc->base)
                        continue;
 
-               connected_sink_compute_bpp(to_intel_connector(connector),
-                                          pipe_config);
+               if (connected_sink_max_bpp(connector_state, pipe_config) < 0)
+                       return -EINVAL;
        }
 
        return bpp;

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b39b4bda8e40aaf0b0c04db5d1de0a5b77b2fd07..e7233dfa1794898d34ff870e30215f4e2872f63e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5859,6 +5859,10 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
                intel_attach_force_audio_property(connector);
 
        intel_attach_broadcast_rgb_property(connector);
+       if (HAS_GMCH_DISPLAY(dev_priv))
+               drm_connector_attach_max_bpc_property(connector, 6, 10);
+       else if (INTEL_GEN(dev_priv) >= 5)
+               drm_connector_attach_max_bpc_property(connector, 6, 12);
 
        if (intel_dp_is_edp(intel_dp)) {
                u32 allowed_scalers;

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 97d3d10d23a97d619423b13296a3c1a197c6eda4..8e1d9f620c2f2dca0b215cb50152857ce8fccdb3 100644 (file)
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -2129,11 +2129,16 @@ static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
 static void
 intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
 {
+       struct drm_i915_private *dev_priv = to_i915(connector->dev);
+
        intel_attach_force_audio_property(connector);
        intel_attach_broadcast_rgb_property(connector);
        intel_attach_aspect_ratio_property(connector);
        drm_connector_attach_content_type_property(connector);
        connector->state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
+
+       if (!HAS_GMCH_DISPLAY(dev_priv))
+               drm_connector_attach_max_bpc_property(connector, 8, 12);
 }
 
 /*