mpp10 10 gpio, ge0(rxctl), lcd(d10)
mpp11 11 gpio, ge0(rxclk), lcd(d11)
mpp12 12 gpio, ge0(txd4), ge1(txclkout), lcd(d12)
-mpp13 13 gpio, ge0(txd5), ge1(txd1), lcd(d13)
-mpp14 14 gpio, ge0(txd6), ge1(txd2), lcd(d15)
-mpp15 15 gpio, ge0(txd7), ge1(txd3), lcd(d16)
+mpp13 13 gpio, ge0(txd5), ge1(txd0), lcd(d13)
+mpp14 14 gpio, ge0(txd6), ge1(txd1), lcd(d15)
+mpp15 15 gpio, ge0(txd7), ge1(txd2), lcd(d16)
mpp16 16 gpio, ge0(txd7), ge1(txd3), lcd(d16)
mpp17 17 gpio, ge0(col), ge1(txctl), lcd(d17)
mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)