powerpc: add vcmpequd/vcmpequb ppc instruction macro

Some old tool chains don't know about instructions like vcmpequd.

This patch adds .long macro for vcmpequd and vcmpequb, which is
a preparation to optimize ppc64 memcmp with VMX instructions.

Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 4436887bc415baf3e69d6f284b14a82ca3a07648..c103caf99897fcd94daaee281b6dd8818e755cf6 100644 (file)
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -367,6 +367,8 @@
 #define PPC_INST_STFDX                 0x7c0005ae
 #define PPC_INST_LVX                   0x7c0000ce
 #define PPC_INST_STVX                  0x7c0001ce
+#define PPC_INST_VCMPEQUD              0x100000c7
+#define PPC_INST_VCMPEQUB              0x10000006
 
 /* macros to insert fields into opcodes */
 #define ___PPC_RA(a)   (((a) & 0x1f) << 16)
@@ -397,6 +399,7 @@
 #define __PPC_BI(s)    (((s) & 0x1f) << 16)
 #define __PPC_CT(t)    (((t) & 0x0f) << 21)
 #define __PPC_SPR(r)   ((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
+#define __PPC_RC21     (0x1 << 10)
 
 /*
  * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
@@ -568,4 +571,12 @@
                                       ((IH & 0x7) << 21))
 #define PPC_INVALIDATE_ERAT    PPC_SLBIA(7)
 
+#define VCMPEQUD_RC(vrt, vra, vrb)     stringify_in_c(.long PPC_INST_VCMPEQUD | \
+                             ___PPC_RT(vrt) | ___PPC_RA(vra) | \
+                             ___PPC_RB(vrb) | __PPC_RC21)
+
+#define VCMPEQUB_RC(vrt, vra, vrb)     stringify_in_c(.long PPC_INST_VCMPEQUB | \
+                             ___PPC_RT(vrt) | ___PPC_RA(vra) | \
+                             ___PPC_RB(vrb) | __PPC_RC21)
+
 #endif /* _ASM_POWERPC_PPC_OPCODE_H */