sizeof(struct sgentry) + sizeof(struct sgentry64);
datasize = sizeof(struct aac_ciss_identify_pd);
- identify_resp = pci_alloc_consistent(dev->pdev, datasize, &addr);
-
+ identify_resp = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr,
+ GFP_KERNEL);
if (!identify_resp)
goto fib_free_ptr;
dev->hba_map[bus][target].qd_limit =
identify_resp->current_queue_depth_limit;
- pci_free_consistent(dev->pdev, datasize, (void *)identify_resp, addr);
+ dma_free_coherent(&dev->pdev->dev, datasize, identify_resp, addr);
aac_fib_complete(fibptr);
datasize = sizeof(struct aac_ciss_phys_luns_resp)
+ (AAC_MAX_TARGETS - 1) * sizeof(struct _ciss_lun);
- phys_luns = (struct aac_ciss_phys_luns_resp *) pci_alloc_consistent(
- dev->pdev, datasize, &addr);
-
+ phys_luns = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr,
+ GFP_KERNEL);
if (phys_luns == NULL) {
rcode = -ENOMEM;
goto err_out;
aac_update_hba_map(dev, phys_luns, rescan);
}
- pci_free_consistent(dev->pdev, datasize, (void *) phys_luns, addr);
+ dma_free_coherent(&dev->pdev->dev, datasize, phys_luns, addr);
err_out:
return rcode;
}
goto cleanup;
}
- kfib = pci_alloc_consistent(dev->pdev, size, &daddr);
+ kfib = dma_alloc_coherent(&dev->pdev->dev, size, &daddr,
+ GFP_KERNEL);
if (!kfib) {
retval = -ENOMEM;
goto cleanup;
retval = -EFAULT;
cleanup:
if (hw_fib) {
- pci_free_consistent(dev->pdev, size, kfib, fibptr->hw_fib_pa);
+ dma_free_coherent(&dev->pdev->dev, size, kfib,
+ fibptr->hw_fib_pa);
fibptr->hw_fib_pa = hw_fib_pa;
fibptr->hw_fib_va = hw_fib;
}
size = fibsize + aac_init_size + commsize + commalign +
printfbufsiz + host_rrq_size;
- base = pci_alloc_consistent(dev->pdev, size, &phys);
-
+ base = dma_alloc_coherent(&dev->pdev->dev, size, &phys, GFP_KERNEL);
if (base == NULL) {
printk(KERN_ERR "aacraid: unable to create mapping.\n");
return 0;
}
dprintk((KERN_INFO
- "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
- dev->pdev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue,
+ "allocate hardware fibs dma_alloc_coherent(%p, %d * (%d + %d), %p)\n",
+ &dev->pdev->dev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue,
AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
- dev->hw_fib_va = pci_alloc_consistent(dev->pdev,
+ dev->hw_fib_va = dma_alloc_coherent(&dev->pdev->dev,
(dev->max_cmd_size + sizeof(struct aac_fib_xporthdr))
* (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
- &dev->hw_fib_pa);
+ &dev->hw_fib_pa, GFP_KERNEL);
if (dev->hw_fib_va == NULL)
return -ENOMEM;
return 0;
fib_size = dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
alloc_size = fib_size * num_fibs + ALIGN32 - 1;
- pci_free_consistent(dev->pdev, alloc_size, dev->hw_fib_va,
- dev->hw_fib_pa);
+ dma_free_coherent(&dev->pdev->dev, alloc_size, dev->hw_fib_va,
+ dev->hw_fib_pa);
dev->hw_fib_va = NULL;
dev->hw_fib_pa = 0;
* case.
*/
aac_fib_map_free(aac);
- pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
+ dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr,
+ aac->comm_phys);
aac->comm_addr = NULL;
aac->comm_phys = 0;
kfree(aac->queues);
if (!fibptr)
goto out;
- dma_buf = pci_alloc_consistent(dev->pdev, datasize, &addr);
+ dma_buf = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr,
+ GFP_KERNEL);
if (!dma_buf)
goto fib_free_out;
ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb),
FsaNormal, 1, 1, NULL, NULL);
- pci_free_consistent(dev->pdev, datasize, (void *)dma_buf, addr);
+ dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr);
/*
* Do not set XferState to zero unless
out_unmap:
aac_fib_map_free(aac);
if (aac->comm_addr)
- pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr,
- aac->comm_phys);
+ dma_free_coherent(&aac->pdev->dev, aac->comm_size,
+ aac->comm_addr, aac->comm_phys);
kfree(aac->queues);
aac_adapter_ioremap(aac, 0);
kfree(aac->fibs);
__aac_shutdown(aac);
aac_fib_map_free(aac);
- pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr,
- aac->comm_phys);
+ dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr,
+ aac->comm_phys);
kfree(aac->queues);
aac_adapter_ioremap(aac, 0);
if (likely((status & 0xFF000000L) == 0xBC000000L))
return (status >> 16) & 0xFF;
- buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
+ buffer = dma_alloc_coherent(&dev->pdev->dev, 512, &baddr,
+ GFP_KERNEL);
ret = -2;
if (unlikely(buffer == NULL))
return ret;
- post = pci_alloc_consistent(dev->pdev,
- sizeof(struct POSTSTATUS), &paddr);
+ post = dma_alloc_coherent(&dev->pdev->dev,
+ sizeof(struct POSTSTATUS), &paddr,
+ GFP_KERNEL);
if (unlikely(post == NULL)) {
- pci_free_consistent(dev->pdev, 512, buffer, baddr);
+ dma_free_coherent(&dev->pdev->dev, 512, buffer, baddr);
return ret;
}
memset(buffer, 0, 512);
rx_writel(dev, MUnit.IMRx[0], paddr);
rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
NULL, NULL, NULL, NULL, NULL);
- pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
- post, paddr);
+ dma_free_coherent(&dev->pdev->dev, sizeof(struct POSTSTATUS),
+ post, paddr);
if (likely((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X')))) {
ret = (hex_to_bin(buffer[2]) << 4) +
hex_to_bin(buffer[3]);
}
- pci_free_consistent(dev->pdev, 512, buffer, baddr);
+ dma_free_coherent(&dev->pdev->dev, 512, buffer, baddr);
return ret;
}
/*