ARM64: dts: meson-gx: use stable UART bindings with correct gate clock
authorHelmut Klein <hgkr.klein@gmail.com>
Wed, 21 Jun 2017 14:42:11 +0000 (16:42 +0200)
committerKevin Hilman <khilman@baylibre.com>
Tue, 8 Aug 2017 21:48:56 +0000 (14:48 -0700)
This patch switches to the stable UART bindings but also add the correct
gate clock to the non-AO UART nodes for GXBB and GXL SoCs.

Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Helmut Klein <hgkr.klein@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

index edd31cf0648e332dfe3a25223823762515077bbb..73132d685f2eff2a17bb7444dea8690d8cf96c8d 100644 (file)
                        };
 
                        uart_A: serial@84c0 {
-                               compatible = "amlogic,meson-uart";
+                               compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
                                reg = <0x0 0x84c0 0x0 0x14>;
                                interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
                                clocks = <&xtal>;
                        };
 
                        uart_B: serial@84dc {
-                               compatible = "amlogic,meson-uart";
+                               compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
                                reg = <0x0 0x84dc 0x0 0x14>;
                                interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
                                clocks = <&xtal>;
                        };
 
                        uart_C: serial@8700 {
-                               compatible = "amlogic,meson-uart";
+                               compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart";
                                reg = <0x0 0x8700 0x0 0x14>;
                                interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
                                clocks = <&xtal>;
                        };
 
                        uart_AO: serial@4c0 {
-                               compatible = "amlogic,meson-uart";
+                               compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
                                reg = <0x0 0x004c0 0x0 0x14>;
                                interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
-                               clocks = <&xtal>;
                                status = "disabled";
                        };
 
                        uart_AO_B: serial@4e0 {
-                               compatible = "amlogic,meson-uart";
+                               compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
                                reg = <0x0 0x004e0 0x0 0x14>;
                                interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
-                               clocks = <&xtal>;
                                status = "disabled";
                        };
 
index 17d3efdf146968b9ea60a47ec10045e49be6a4d8..ea53cc248ef4901531023f0eb642722053b32df5 100644 (file)
        clocks = <&clkc CLKID_SPI>;
 };
 
+&uart_A {
+       clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
+       clock-names = "xtal", "pclk", "baud";
+};
+
+&uart_AO {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+       clock-names = "xtal", "pclk", "baud";
+};
+
+&uart_AO_B {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+       clock-names = "xtal", "pclk", "baud";
+};
+
+&uart_B {
+       clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
+       clock-names = "xtal", "core", "baud";
+};
+
+&uart_C {
+       clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
+       clock-names = "xtal", "core", "baud";
+};
+
 &vpu {
        compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
 };
index 8d4f3160a0eefa1220e48541eb8e117441ed6c42..9e674441fd90de767c303456abd8a69dce0070f4 100644 (file)
        clocks = <&clkc CLKID_SPI>;
 };
 
+&uart_A {
+       clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
+       clock-names = "xtal", "core", "baud";
+};
+
+&uart_AO {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+       clock-names = "xtal", "pclk", "baud";
+};
+
+&uart_AO_B {
+       clocks = <&xtal>, <&clkc CLKID_CLK81>, <&xtal>;
+       clock-names = "xtal", "pclk", "baud";
+};
+
+&uart_B {
+       clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
+       clock-names = "xtal", "core", "baud";
+};
+
+&uart_C {
+       clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
+       clock-names = "xtal", "core", "baud";
+};
+
 &vpu {
        compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
 };