drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment

This allows controlling which of the 8 lanes are used for 6 bit color.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.txt b/Documentation/devicetree/bindings/display/msm/mdp4.txt
index 3c341a15ccdc6a51ad3bf313d2b0ec9566a0d5f9..b07eeb38f709829894a65ed66d74628e36f0c0bf 100644 (file)
--- a/Documentation/devicetree/bindings/display/msm/mdp4.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp4.txt
@@ -38,6 +38,8 @@ Required properties:
 Optional properties:
 - clock-names: the following clocks are optional:
   * "lut_clk"
+- qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be
+  used for LCDC. This is only valid for 18bpp panels.
 
 Example:
 

diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
index 9e08c2efac24cf3d3f2005e17ff3be21b1e22e4d..c9e34501a89e8c485743b8a27632783bde4355bb 100644 (file)
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c
@@ -377,20 +377,25 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder)
        unsigned long pc = mdp4_lcdc_encoder->pixclock;
        struct mdp4_kms *mdp4_kms = get_kms(encoder);
        struct drm_panel *panel;
+       uint32_t config;
        int i, ret;
 
        if (WARN_ON(mdp4_lcdc_encoder->enabled))
                return;
 
        /* TODO: hard-coded for 18bpp: */
-       mdp4_crtc_set_config(encoder->crtc,
-                       MDP4_DMA_CONFIG_R_BPC(BPC6) |
-                       MDP4_DMA_CONFIG_G_BPC(BPC6) |
-                       MDP4_DMA_CONFIG_B_BPC(BPC6) |
-                       MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
-                       MDP4_DMA_CONFIG_PACK(0x21) |
-                       MDP4_DMA_CONFIG_DEFLKR_EN |
-                       MDP4_DMA_CONFIG_DITHER_EN);
+       config =
+               MDP4_DMA_CONFIG_R_BPC(BPC6) |
+               MDP4_DMA_CONFIG_G_BPC(BPC6) |
+               MDP4_DMA_CONFIG_B_BPC(BPC6) |
+               MDP4_DMA_CONFIG_PACK(0x21) |
+               MDP4_DMA_CONFIG_DEFLKR_EN |
+               MDP4_DMA_CONFIG_DITHER_EN;
+
+       if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb"))
+               config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;
+
+       mdp4_crtc_set_config(encoder->crtc, config);
        mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);
 
        bs_set(mdp4_lcdc_encoder, 1);