arm: mvebu: 370-rd: Enable PHY interrupt handling

The Ethernet switch has an embedded interrupt controller. Interrupts
from the embedded PHYs are part of this interrupt controller.
Explicitly list the MDIO bus the embedded PHYs are on, and wire up the
interrupts.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts
index 8b2fa9a49967439b1a6a14973b5f2bf1a547b320..c28afb24239384d0c2395888bab51abdbc4bd3aa 100644 (file)
--- a/arch/arm/boot/dts/armada-370-rd.dts
+++ b/arch/arm/boot/dts/armada-370-rd.dts
@@ -56,6 +56,7 @@
 
 /dts-v1/;
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/gpio/gpio.h>
 #include "armada-370.dtsi"
 
@@ -243,6 +244,8 @@
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0x10>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
 
                ports {
                        #address-cells = <1>;
@@ -278,6 +281,35 @@
                                };
                        };
                };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       switchphy0: switchphy@0 {
+                               reg = <0>;
+                               interrupt-parent = <&switch>;
+                               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       switchphy1: switchphy@1 {
+                               reg = <1>;
+                               interrupt-parent = <&switch>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       switchphy2: switchphy@2 {
+                               reg = <2>;
+                               interrupt-parent = <&switch>;
+                               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+
+                       switchphy3: switchphy@3 {
+                               reg = <3>;
+                               interrupt-parent = <&switch>;
+                               interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+                       };
+               };
        };
 };