};
/* switch register I/O wrappers */
-void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned reg);
-u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned reg);
+void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg);
+u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg);
/* the callback used by the driver core to bringup the switch */
int mtk_gsw_init(struct mtk_eth *eth);
#include "mtk_eth_soc.h"
#include "gsw_mt7620.h"
-void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned reg)
+void mtk_switch_w32(struct mt7620_gsw *gsw, u32 val, unsigned int reg)
{
iowrite32(val, gsw->base + reg);
}
EXPORT_SYMBOL_GPL(mtk_switch_w32);
-u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned reg)
+u32 mtk_switch_r32(struct mt7620_gsw *gsw, unsigned int reg)
{
return ioread32(gsw->base + reg);
}
static const u16 *mtk_reg_table = mtk_reg_table_default;
-void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
+void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg)
{
__raw_writel(val, eth->base + reg);
}
-u32 mtk_r32(struct mtk_eth *eth, unsigned reg)
+u32 mtk_r32(struct mtk_eth *eth, unsigned int reg)
{
return __raw_readl(eth->base + reg);
}
void mtk_reset(struct mtk_eth *eth, u32 reset_bits);
/* register i/o wrappers */
-void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg);
-u32 mtk_r32(struct mtk_eth *eth, unsigned reg);
+void mtk_w32(struct mtk_eth *eth, u32 val, unsigned int reg);
+u32 mtk_r32(struct mtk_eth *eth, unsigned int reg);
/* default clock calibration handler */
int mtk_set_clock_cycle(struct mtk_eth *eth);