drm/msm/disp/dpu: Mark a handful of functions as static
authorJordan Crouse <jcrouse@codeaurora.org>
Thu, 26 Jul 2018 20:30:14 +0000 (14:30 -0600)
committerRob Clark <robdclark@gmail.com>
Mon, 30 Jul 2018 12:50:12 +0000 (08:50 -0400)
Mark a number of static functions that are only unsed in the file
that defines them and remove the prototypes from the headers where
needed.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c

index 5c0051af5e986ddf69022fd5d306d2ce75861420..0bd3eda93e226ab7fa62f647fe86dcb93e052c5d 100644 (file)
@@ -264,6 +264,9 @@ void dpu_encoder_helper_report_irq_timeout(struct dpu_encoder_phys *phys_enc,
                                DPU_ENCODER_FRAME_EVENT_ERROR);
 }
 
+static int dpu_encoder_helper_wait_event_timeout(int32_t drm_id,
+               int32_t hw_id, struct dpu_encoder_wait_info *info);
+
 int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
                enum dpu_intr_idx intr_idx,
                struct dpu_encoder_wait_info *wait_info)
@@ -467,7 +470,7 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
        }
 }
 
-void dpu_encoder_destroy(struct drm_encoder *drm_enc)
+static void dpu_encoder_destroy(struct drm_encoder *drm_enc)
 {
        struct dpu_encoder_virt *dpu_enc = NULL;
        int i = 0;
@@ -1516,7 +1519,7 @@ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc)
        }
 }
 
-int dpu_encoder_helper_wait_event_timeout(
+static int dpu_encoder_helper_wait_event_timeout(
                int32_t drm_id,
                int32_t hw_id,
                struct dpu_encoder_wait_info *info)
index 204e538b0b745e1989c56c909ac9db469f5d0e26..60f809fc7c13003ce1d620c557dd6deffa95eea8 100644 (file)
@@ -158,12 +158,6 @@ struct drm_encoder *dpu_encoder_init(
 int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc,
                struct msm_display_info *disp_info);
 
-/**
- * dpu_encoder_destroy - destroy previously initialized virtual encoder
- * @drm_enc:    Pointer to previously created drm encoder structure
- */
-void dpu_encoder_destroy(struct drm_encoder *drm_enc);
-
 /**
  * dpu_encoder_prepare_commit - prepare encoder at the very beginning of an
  *     atomic commit, before any registers are written
index dacec1c8eeebbcd016b5b53e23b2e97851ba731b..c7df8aad66137c137b1fb7039b23faf35c3fa468 100644 (file)
@@ -355,20 +355,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_cmd_init(
  */
 void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc);
 
-/**
- * dpu_encoder_helper_wait_event_timeout - wait for event with timeout
- *     taking into account that jiffies may jump between reads leading to
- *     incorrectly detected timeouts. Prevent failure in this scenario by
- *     making sure that elapsed time during wait is valid.
- * @drm_id: drm object id for logging
- * @hw_id: hw instance id for logging
- * @info: wait info structure
- */
-int dpu_encoder_helper_wait_event_timeout(
-               int32_t drm_id,
-               int32_t hw_id,
-               struct dpu_encoder_wait_info *info);
-
 /**
  * dpu_encoder_helper_hw_reset - issue ctl hw reset
  *     This helper function may be optionally specified by physical
index e6d02c6947b4f0b892fb475e8ed5d2e2ae985f32..3084675ed42578ed70b22ce40241673b782f5435 100644 (file)
@@ -349,7 +349,7 @@ end:
        return ret;
 }
 
-void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc,
+static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc,
                bool enable)
 {
        struct dpu_encoder_phys_cmd *cmd_enc;
index 0cb00612f96f555b0af80ceacc259a56c396532c..bfcd165e96dfe98d8f6ad16cdadc19017c3e7042 100644 (file)
@@ -846,7 +846,7 @@ static int _dpu_format_get_plane_sizes_linear(
        return 0;
 }
 
-int dpu_format_get_plane_sizes(
+static int dpu_format_get_plane_sizes(
                const struct dpu_format *fmt,
                const uint32_t w,
                const uint32_t h,
index b3a6592f1a8a2ae537478b12082c6896823114e2..a54451d8d011157df0d364568dab34d05f39d3e0 100644 (file)
@@ -55,23 +55,6 @@ uint32_t dpu_populate_formats(
                uint32_t pixel_formats_max);
 
 /**
- * dpu_format_get_plane_sizes - calculate size and layout of given buffer format
- * @fmt:             pointer to dpu_format
- * @w:               width of the buffer
- * @h:               height of the buffer
- * @layout:          layout of the buffer
- * @pitches:         array of size [DPU_MAX_PLANES] to populate
- *                  pitch for each plane
- *
- * Return: size of the buffer
- */
-int dpu_format_get_plane_sizes(
-               const struct dpu_format *fmt,
-               const uint32_t w,
-               const uint32_t h,
-               struct dpu_hw_fmt_layout *layout,
-               const uint32_t *pitches);
-
  * dpu_format_check_modified_format - validate format and buffers for
  *                   dpu non-standard, i.e. modified format
  * @kms:             kms driver
index 1793cfd29a070b2b40a9c91e2f3849e747886dc2..44ee06398b1ddd1ec1aa0ad931d05eab1c52368a 100644 (file)
@@ -449,7 +449,7 @@ static struct dpu_perf_cfg sdm845_perf_data = {
  * sdm845_cfg_init(): populate sdm845 dpu sub-blocks reg offsets
  * and instance counts.
  */
-void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
+static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg)
 {
        *dpu_cfg = (struct dpu_mdss_cfg){
                .caps = &sdm845_dpu_caps,
index da6f0609be5f0e9280f068fe80ab8b97e1b3ded6..554874ba0c3b746125de17196974c1adf83600e6 100644 (file)
@@ -217,7 +217,7 @@ static int dpu_hw_cdm_setup_cdwn(struct dpu_hw_cdm *ctx,
        return 0;
 }
 
-int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx,
+static int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx,
                struct dpu_hw_cdm_cfg *cdm)
 {
        struct dpu_hw_blk_reg_map *c = &ctx->hw;
@@ -249,7 +249,7 @@ int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx,
        return 0;
 }
 
-void dpu_hw_cdm_disable(struct dpu_hw_cdm *ctx)
+static void dpu_hw_cdm_disable(struct dpu_hw_cdm *ctx)
 {
        struct cdm_output_cfg cdm_cfg = { 0 };
 
index 42fc72cf48dd0026342ec8a313fd17222e28828b..db2798e862fcbe9f84d0c14761513762f48558ae 100644 (file)
@@ -275,7 +275,7 @@ static void dpu_hw_get_safe_status(struct dpu_hw_mdp *mdp,
        status->sspp[SSPP_CURSOR1] = (value >> 26) & 0x1;
 }
 
-void dpu_hw_reset_ubwc(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m)
+static void dpu_hw_reset_ubwc(struct dpu_hw_mdp *mdp, struct dpu_mdss_cfg *m)
 {
        struct dpu_hw_blk_reg_map c;
 
index 1c0838801e7846ca99ec38789cca31d97deab70c..7dd6bd2d6d378b8351b4dd88116ea12690da8d4d 100644 (file)
@@ -819,7 +819,7 @@ static int dpu_kms_pm_resume(struct device *dev)
        return 0;
 }
 
-void _dpu_kms_set_encoder_mode(struct msm_kms *kms,
+static void _dpu_kms_set_encoder_mode(struct msm_kms *kms,
                                 struct drm_encoder *encoder,
                                 bool cmd_mode)
 {
index 6dfc26698a09bb18c5afeaffcc859f06b3b5278a..9e533b86682c6da4ca0de5253df7790fcdc22dc0 100644 (file)
@@ -115,7 +115,7 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
        return 0;
 }
 
-int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
+static int _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
 {
        if (dpu_mdss->irq_controller.domain) {
                irq_domain_remove(dpu_mdss->irq_controller.domain);