PCI: endpoint: Handle 64-bit BARs properly
authorNiklas Cassel <niklas.cassel@axis.com>
Wed, 28 Mar 2018 11:50:13 +0000 (13:50 +0200)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tue, 3 Apr 2018 11:38:04 +0000 (12:38 +0100)
If a 64-bit BAR was set-up, we need to skip a BAR,
since a 64-bit BAR consists of a BAR pair.

We need to check what BAR width the epc->ops->set_bar() specific
implementation actually did set-up, since some drivers, like the
Cadence EP controller, sometimes sets up a 64-bit BAR, even though
a 32-bit BAR was requested.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/pci/endpoint/functions/pci-epf-test.c

index 91274779e59fe01ae7a9c3309e2562fd5752309f..d46e3ebabb8e2e44bcdc1f5b7f911a42e854c18f 100644 (file)
@@ -380,6 +380,13 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
                        if (bar == test_reg_bar)
                                return ret;
                }
+               /*
+                * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
+                * if the specific implementation required a 64-bit BAR,
+                * even if we only requested a 32-bit BAR.
+                */
+               if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
+                       bar++;
        }
 
        return 0;