The different generations of OMAP2+ SoCs have almost the same
mailbox IP, but the IP has configurable parameters for number
of users (interrupts it can generate out towards processors)
and number of fifos (the base unidirectional h/w communication
channel). This data cannot be read from any registers, and so
has been added to the platform data.
This data together with the interrupt-type configuration can be
used in properly figuring out the number of registers to save
and restore in the OMAP mailbox driver code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
};
static struct omap_mbox_pdata omap2420_mailbox_attrs = {
+ .num_users = 4,
+ .num_fifos = 6,
.info_cnt = ARRAY_SIZE(omap2420_mailbox_info),
.info = omap2420_mailbox_info,
};
};
static struct omap_mbox_pdata omap2430_mailbox_attrs = {
+ .num_users = 4,
+ .num_fifos = 6,
.info_cnt = ARRAY_SIZE(omap2430_mailbox_info),
.info = omap2430_mailbox_info,
};
};
static struct omap_mbox_pdata omap3xxx_mailbox_attrs = {
+ .num_users = 2,
+ .num_fifos = 2,
.info_cnt = ARRAY_SIZE(omap3xxx_mailbox_info),
.info = omap3xxx_mailbox_info,
};
* struct omap_mbox_pdata - OMAP mailbox platform data
* @intr_type: type of interrupt configuration registers used
while programming mailbox queue interrupts
+ * @num_users: number of users (processor devices) that the mailbox
+ * h/w block can interrupt
+ * @num_fifos: number of h/w fifos within the mailbox h/w block
* @info_cnt: number of mailbox devices for the platform
* @info: array of mailbox device attributes
*/
struct omap_mbox_pdata {
u32 intr_type;
+ u32 num_users;
+ u32 num_fifos;
u32 info_cnt;
struct omap_mbox_dev_info *info;
};