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drm/i915/cnl: LSPCON support is gen9+
author
Rodrigo Vivi
<rodrigo.vivi@intel.com>
Fri, 9 Jun 2017 22:26:14 +0000
(15:26 -0700)
committer
Rodrigo Vivi
<rodrigo.vivi@intel.com>
Mon, 12 Jun 2017 16:46:21 +0000
(09:46 -0700)
There is no platform specific change needed for LSPCON
support on Cannonlake. So let's make it gen9+.
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-17-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_drv.h
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diff --git
a/drivers/gpu/drm/i915/i915_drv.h
b/drivers/gpu/drm/i915/i915_drv.h
index dd22f3d0d9d666185ff4274e2f075fceac98ab12..c3ea485cb82af979e9f3be094c83068fc14ceccd 100644
(file)
--- a/
drivers/gpu/drm/i915/i915_drv.h
+++ b/
drivers/gpu/drm/i915/i915_drv.h
@@
-3002,7
+3002,7
@@
intel_info(const struct drm_i915_private *dev_priv)
#define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display)
-#define HAS_LSPCON(dev_priv) (I
S_GEN9(dev_priv)
)
+#define HAS_LSPCON(dev_priv) (I
NTEL_GEN(dev_priv) >= 9
)
/* DPF == dynamic parity feature */
#define HAS_L3_DPF(dev_priv) ((dev_priv)->info.has_l3_dpf)