const struct clk_ops pcie_ops;
int (*hw_init)(struct platform_device *pdev,
struct clk_hw_onecell_data *clk_data);
-@@ -525,8 +526,6 @@ static void en7523_register_clocks(struc
+@@ -504,8 +505,6 @@ static void en7523_register_clocks(struc
+ u32 rate;
+ int i;
- hw = en7523_register_pcie_clk(dev, np_base);
- clk_data->hws[EN7523_CLK_PCIE] = hw;
--
- clk_data->num = EN7523_NUM_CLOCKS;
- }
-
- static int en7523_clk_hw_init(struct platform_device *pdev,
+-
+ for (i = 0; i < ARRAY_SIZE(en7523_base_clks); i++) {
+ const struct en_clk_desc *desc = &en7523_base_clks[i];
+ u32 reg = desc->div_reg ? desc->div_reg : desc->base_reg;
@@ -587,8 +586,6 @@ static void en7581_register_clocks(struc
hw = en7523_register_pcie_clk(dev, base);
host->bus_clk = devm_clk_get_optional(&pdev->dev, "bus_clk");
if (IS_ERR(host->bus_clk))
-@@ -2740,11 +2767,14 @@ static int msdc_drv_probe(struct platfor
- goto host_free;
+@@ -2731,10 +2758,13 @@ static int msdc_drv_probe(struct platfor
+ return PTR_ERR(host->pins_default);
}
- host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
- if (IS_ERR(host->pins_uhs)) {
-- ret = PTR_ERR(host->pins_uhs);
- dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-- goto host_free;
+- return PTR_ERR(host->pins_uhs);
+ /* AN7581 doesn't have state_uhs pins */
+ if (!device_is_compatible(&pdev->dev, "airoha,an7581-mmc")) {
+ host->pins_uhs = pinctrl_lookup_state(host->pinctrl, "state_uhs");
+ if (IS_ERR(host->pins_uhs)) {
-+ ret = PTR_ERR(host->pins_uhs);
+ dev_err(&pdev->dev, "Cannot find pinctrl uhs!\n");
-+ goto host_free;
++ return PTR_ERR(host->pins_uhs);
+ }
}
/* Support for SDIO eint irq ? */
-@@ -2825,6 +2855,12 @@ static int msdc_drv_probe(struct platfor
+@@ -2815,6 +2845,12 @@ static int msdc_drv_probe(struct platfor
dev_err(&pdev->dev, "Cannot ungate clocks!\n");
- goto release_mem;
+ goto release_clk;
}
+
+ /* AN7581 without regulator require tune to OCR values */