/* i2c of the left SFP cage: port 9 */
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp0: sfp-p9 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
- los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 27 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 22 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 26 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 23 GPIO_ACTIVE_HIGH>;
};
/* i2c of the right SFP cage: port 10 */
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp1: sfp-p10 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
- los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 33 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 28 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 32 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 29 GPIO_ACTIVE_HIGH>;
};
};
model = "Zyxel GS1900-8v1/v2 Switch";
};
-&gpio1 {
+&gpio_ext {
/delete-node/ poe_enable;
};
reset {
label = "reset";
- gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio_ext 3 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
};
- gpio1: rtl8231-gpio {
- compatible = "realtek,rtl8231-gpio";
- #gpio-cells = <2>;
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio_ext 5 GPIO_ACTIVE_LOW>;
+ priority = <192>;
+ open-source;
+ };
+};
+
+&mdio_aux {
+ status = "okay";
+
+ // Reset GPIO is <&gpio0 1 GPIO_ACTIVE_LOW>
+ // Don't specify the reset info so the mdio subsystem doesn't reset the bus
+ //reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ //reset-delay-us = <1000>;
+ //reset-post-delay-us = <10000>;
+
+ gpio_ext: expander@0 {
+ compatible = "realtek,rtl8231";
+ reg = <0x0>;
+
gpio-controller;
- indirect-access-bus-id = <0>;
+ #gpio-cells = <2>;
+ gpio-ranges = <&gpio_ext 0 0 37>;
poe_enable {
gpio-hog;
gpios = <13 GPIO_ACTIVE_HIGH>;
output-high;
};
+
+ led-controller {
+ compatible = "realtek,rtl8231-leds";
+ status = "disabled";
+ };
};
};
};
};
-&gpio1 {
+&gpio_ext {
/delete-node/ poe_enable;
};
/* i2c of the left SFP cage: port 25 */
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp0: sfp-p25 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
- los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 27 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 22 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 26 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 23 GPIO_ACTIVE_HIGH>;
};
/* i2c of the right SFP cage: port 26 */
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp1: sfp-p26 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
- los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 33 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 28 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 32 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 29 GPIO_ACTIVE_HIGH>;
};
};
};
};
-&gpio1 {
+&gpio_ext {
/delete-node/ poe_enable;
};
};
};
-&gpio1 {
+&gpio_ext {
/delete-node/ poe_enable;
};
/* i2c of the left SFP cage: port 25 */
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp0: sfp-p25 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
- los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 27 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 22 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 26 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 23 GPIO_ACTIVE_HIGH>;
};
/* i2c of the right SFP cage: port 26 */
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp1: sfp-p26 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
- los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 33 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 28 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 32 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 29 GPIO_ACTIVE_HIGH>;
};
};
/* i2c of the left SFP cage: port 25 */
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp0: sfp-p25 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
- los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 27 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 22 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 26 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 23 GPIO_ACTIVE_HIGH>;
};
/* i2c of the right SFP cage: port 26 */
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
- sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio_ext 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio_ext 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
sfp1: sfp-p26 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
- los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
- tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
- mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
- tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+ los-gpio = <&gpio_ext 33 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpio = <&gpio_ext 28 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio_ext 32 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio_ext 29 GPIO_ACTIVE_HIGH>;
};
};