From: Halil Pasic Date: Thu, 23 May 2019 14:50:07 +0000 (+0200) Subject: virtio/s390: use cacheline aligned airq bit vectors X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=01b3fb1ea00d5b2af77f41da69dd9dc859c12748;p=openwrt%2Fstaging%2Fblogic.git virtio/s390: use cacheline aligned airq bit vectors The flag AIRQ_IV_CACHELINE was recently added to airq_iv_create(). Let us use it! We actually wanted the vector to span a cacheline all along. Signed-off-by: Halil Pasic Reviewed-by: Christian Borntraeger Reviewed-by: Cornelia Huck Reviewed-by: Michael Mueller Tested-by: Michael Mueller Signed-off-by: Heiko Carstens --- diff --git a/drivers/s390/virtio/virtio_ccw.c b/drivers/s390/virtio/virtio_ccw.c index f995798bb025..1da7430f94c8 100644 --- a/drivers/s390/virtio/virtio_ccw.c +++ b/drivers/s390/virtio/virtio_ccw.c @@ -216,7 +216,8 @@ static struct airq_info *new_airq_info(void) if (!info) return NULL; rwlock_init(&info->lock); - info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC | AIRQ_IV_PTR); + info->aiv = airq_iv_create(VIRTIO_IV_BITS, AIRQ_IV_ALLOC | AIRQ_IV_PTR + | AIRQ_IV_CACHELINE); if (!info->aiv) { kfree(info); return NULL;