From: Piotr Dymacz <pepe2k@gmail.com>
Date: Mon, 29 May 2017 19:32:11 +0000 (+0200)
Subject: ar71xx: fix Wallys DR344 GPIO-connected LEDs and button
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=18d5cee2a8c0bcddbbcca964bf95bed58d286b9d;p=openwrt%2Fstaging%2Faparcar.git

ar71xx: fix Wallys DR344 GPIO-connected LEDs and button

This fixes wrong GPIO numbers for LEDs and button in Wallys DR344 board
and sets color of all LEDs to green as the mass production boards have
only green one.

Actually, DR344 has 6 GPIO-connected LEDs and one button:

- GPIO11: status
- GPIO12: sig1
- GPIO13: sig2
- GPIO14: sig3
- GPIO15: sig4
- GPIO16: reset button
- GPIO17: lan

WAN LED is connected directly with AR8035 PHY.

Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
---

diff --git a/target/linux/ar71xx/base-files/etc/board.d/01_leds b/target/linux/ar71xx/base-files/etc/board.d/01_leds
index 7248ab1941..2f9ae8b10e 100755
--- a/target/linux/ar71xx/base-files/etc/board.d/01_leds
+++ b/target/linux/ar71xx/base-files/etc/board.d/01_leds
@@ -205,6 +205,9 @@ cr5000)
 	ucidef_set_led_wlan "wlan" "WLAN" "pcs:blue:wlan" "phy0tpt"
 	ucidef_set_led_usbdev "usb" "USB" "pcs:white:wps" "1-1"
 	;;
+dr344)
+	ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth1"
+	;;
 dragino2)
 	ucidef_set_led_wlan "wlan" "WLAN" "$board:red:wlan" "phy0tpt"
 	ucidef_set_led_netdev "lan" "LAN" "$board:red:lan" "eth0"
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration b/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration
index d578f59f7c..16722d1ab2 100644
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration
@@ -52,6 +52,10 @@ dir-835-a1)
 	migrate_leds ":orange:=:amber:" ":wifi_bgn=:wlan2g"
 	;;
 
+dr344)
+	migrate_leds ":red:=:green:" ":yellow:=:green:"
+	;;
+
 wndap360)
 	migrate_leds "wndap360:=netgear:"
 	;;
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
index 35cfca5fea..42839271d9 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dr344.c
@@ -19,6 +19,7 @@
  *
  */
 
+#include <linux/gpio.h>
 #include <linux/phy.h>
 #include <linux/platform_device.h>
 #include <linux/ath9k_platform.h>
@@ -38,15 +39,16 @@
 #include "dev-wmac.h"
 #include "machtypes.h"
 
-#define DR344_GPIO_LED_SIG1	15
-#define DR344_GPIO_LED_SIG2	11
-#define DR344_GPIO_LED_SIG3	12
-#define DR344_GPIO_LED_SIG4	13
-#define DR344_GPIO_EXTERNAL_LNA0       18
-#define DR344_GPIO_EXTERNAL_LNA1       19
-#define DR344_GPIO_LED_STATUS	14
+#define DR344_GPIO_LED_SIG1		12
+#define DR344_GPIO_LED_SIG2		13
+#define DR344_GPIO_LED_SIG3		14
+#define DR344_GPIO_LED_SIG4		15
+#define DR344_GPIO_LED_STATUS		11
+#define DR344_GPIO_LED_LAN		17
+#define DR344_GPIO_EXTERNAL_LNA0	18
+#define DR344_GPIO_EXTERNAL_LNA1	19
 
-#define DR344_GPIO_BTN_RESET	12
+#define DR344_GPIO_BTN_RESET		16
 
 #define DR344_KEYS_POLL_INTERVAL	20	/* msecs */
 #define DR344_KEYS_DEBOUNCE_INTERVAL	(3 * DR344_KEYS_POLL_INTERVAL)
@@ -57,18 +59,23 @@
 #define DR344_PCIE_CALDATA_OFFSET	0x5000
 
 static struct gpio_led dr344_leds_gpio[] __initdata = {
+	{
+		.name		= "dr344:green:lan",
+		.gpio		= DR344_GPIO_LED_LAN,
+		.active_low	= 1,
+	},
 	{
 		.name		= "dr344:green:status",
 		.gpio		= DR344_GPIO_LED_STATUS,
 		.active_low	= 1,
 	},
 	{
-		.name		= "dr344:red:sig1",
+		.name		= "dr344:green:sig1",
 		.gpio		= DR344_GPIO_LED_SIG1,
 		.active_low	= 1,
 	},
 	{
-		.name		= "dr344:yellow:sig2",
+		.name		= "dr344:green:sig2",
 		.gpio		= DR344_GPIO_LED_SIG2,
 		.active_low	= 1,
 	},
@@ -115,6 +122,15 @@ static void __init dr344_setup(void)
 	u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
 
 	ath79_register_m25p80(NULL);
+
+	ath79_gpio_direction_select(DR344_GPIO_LED_STATUS, true);
+	gpio_set_value(DR344_GPIO_LED_STATUS, 1);
+	ath79_gpio_output_select(DR344_GPIO_LED_STATUS, 0);
+
+	ath79_gpio_direction_select(DR344_GPIO_LED_LAN, true);
+	gpio_set_value(DR344_GPIO_LED_LAN, 1);
+	ath79_gpio_output_select(DR344_GPIO_LED_LAN, 0);
+
 	ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
 				 dr344_leds_gpio);
 	ath79_register_gpio_keys_polled(-1, DR344_KEYS_POLL_INTERVAL,