From: Madhav Chauhan Date: Thu, 29 Nov 2018 14:12:28 +0000 (+0200) Subject: drm/i915/icl: Get pipe timings for DSI X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=2eae5d6bfa5f5d3e815cd0c76d864c0ff09b2c4c;p=openwrt%2Fstaging%2Fblogic.git drm/i915/icl: Get pipe timings for DSI Transcoder timings for Gen11 DSI encoder is available at pipe level unlike in older platform where port specific registers need to be accessed. v2 by Jani: - get timings for (!dsi || icl) instead of (dsi && icl). Signed-off-by: Madhav Chauhan Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/f60e0c1aee08248e758da3219d3239898b43ba41.1543500286.git.jani.nikula@intel.com --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9b5753cdc76b..58cadd251acc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9660,7 +9660,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, if (!active) goto out; - if (!transcoder_is_dsi(pipe_config->cpu_transcoder)) { + if (!transcoder_is_dsi(pipe_config->cpu_transcoder) || + IS_ICELAKE(dev_priv)) { haswell_get_ddi_port_state(crtc, pipe_config); intel_get_pipe_timings(crtc, pipe_config); }