From: Brian Norris <briannorris@chromium.org>
Date: Wed, 29 Nov 2017 23:35:41 +0000 (-0800)
Subject: arm64: dts: rockchip: add rk3399 DSI0 reset
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=3813a10a5a70f3bb38272f3d8473baf909af0a99;p=openwrt%2Fstaging%2Fblogic.git

arm64: dts: rockchip: add rk3399 DSI0 reset

We've documented this one already, but we didn't add it to the DTSI yet.

Suggested-by: Nickey Yang <nickey.yang@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d340b58ab184..faf8c90bdc1a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1648,6 +1648,8 @@
 			 <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>;
 		clock-names = "ref", "pclk", "phy_cfg", "grf";
 		power-domains = <&power RK3399_PD_VIO>;
+		resets = <&cru SRST_P_MIPI_DSI0>;
+		reset-names = "apb";
 		rockchip,grf = <&grf>;
 		status = "disabled";