From: Vineet Gupta <Vineet.Gupta1@synopsys.com>
Date: Fri, 11 Sep 2015 23:32:22 +0000 (-0700)
Subject: ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=3ebb0540c20d6670396ccee9ff6794c095fa9311;p=openwrt%2Fstaging%2Fblogic.git

ARCv2: [axs103_smp] Reduce clk for SMP FPGA configs

Newer bitfiles needs the reduced clk even for SMP builds

Cc: <stable@vger.kernel.org>  #4.2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---

diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index ad9825d4026a..0a77b19e1df8 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -402,6 +402,8 @@ static void __init axs103_early_init(void)
 	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
 	if (num_cores > 2)
 		arc_set_core_freq(50 * 1000000);
+	else if (num_cores == 2)
+		arc_set_core_freq(75 * 1000000);
 #endif
 
 	switch (arc_get_core_freq()/1000000) {