From: Rex Zhu <Rex.Zhu@amd.com>
Date: Tue, 12 Sep 2017 05:18:13 +0000 (+0800)
Subject: drm/amd/powerplay: fix pcie max lane define error
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=510c2558b9055f3ae8a405cb18e1cbb7262449fc;p=openwrt%2Fstaging%2Fblogic.git

drm/amd/powerplay: fix pcie max lane define error

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
index 629990f505dd..57a0467b7267 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
@@ -297,7 +297,7 @@ typedef enum PP_PCIEGen PP_PCIEGen;
 #define PP_Min_PCIEGen     PP_PCIEGen1
 #define PP_Max_PCIEGen     PP_PCIEGen3
 #define PP_Min_PCIELane    1
-#define PP_Max_PCIELane    32
+#define PP_Max_PCIELane    16
 
 enum phm_clock_Type {
 	PHM_DispClock = 1,