From: Felix Fietkau Date: Sun, 30 Oct 2022 06:15:36 +0000 (+0100) Subject: mediatek: filogic: fix mt7986a ethernet devicetree entries X-Git-Tag: v23.05.0-rc1~1844 X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=5faff99c7b1e1da1901e539f3c677e5b31454045;p=openwrt%2Fopenwrt.git mediatek: filogic: fix mt7986a ethernet devicetree entries Add all ports, rename DSA ports to start at lan1 Signed-off-by: Felix Fietkau --- diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi index 41ae5f171c..3fbe288dae 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dtsi @@ -70,12 +70,6 @@ compatible = "mediatek,eth-mac"; reg = <1>; phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; }; mdio: mdio-bus { @@ -95,15 +89,14 @@ phy5: phy@5 { compatible = "ethernet-phy-id67c9.de0a"; reg = <5>; + reset-gpios = <&pio 6 1>; reset-deassert-us = <20000>; - phy-mode = "2500base-x"; }; phy6: phy@6 { compatible = "ethernet-phy-id67c9.de0a"; reg = <6>; - phy-mode = "2500base-x"; }; switch: switch@0 { @@ -311,6 +304,12 @@ }; }; +&gmac1 { + phy-mode = "2500base-x"; + phy-connection-type = "2500base-x"; + phy-handle = <&phy6>; +}; + &switch { ports { #address-cells = <1>; @@ -318,22 +317,35 @@ port@0 { reg = <0>; - label = "lan0"; + label = "lan1"; }; port@1 { reg = <1>; - label = "lan1"; + label = "lan2"; }; port@2 { reg = <2>; - label = "lan2"; + label = "lan3"; }; port@3 { reg = <3>; - label = "lan3"; + label = "lan4"; + }; + + port@4 { + reg = <4>; + label = "wan"; + }; + + port@5 { + reg = <5>; + label = "lan6"; + + phy-mode = "2500base-x"; + phy-handle = <&phy5>; }; port@6 {