From: Allen Zhao Date: Sat, 9 Mar 2024 02:44:58 +0000 (+0800) Subject: mediatek: filogic: add Unielec U7981-01 support X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=640b0b79ff05c42991e99a49ed81efb3fac25045;p=openwrt%2Fstaging%2Fneocturne.git mediatek: filogic: add Unielec U7981-01 support Hardware specification: SoC: MediaTek MT7981B 2x A53 Flash: 8GB eMMC or 128 MB SPI-NAND RAM: 256MB Ethernet: 5x 10/100/1000 Mbps Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset USB: M.2(B-key) for 4G/5G Module Power: DC 12V 1A UART: 3.3v, 115200n8 -------------------------- | Layout | | ----------------- | | 4 | VCC RX TX GND | <= | | ----------------- | -------------------------- The U-boot menu will automatically appear at startup, and then select the required options through UP/DOWN Key. NAND Flash and eMMC Flash instructions: 1. Set your computers IP adress to 192.168.1.2. 2. Run a TFTP server providing the sysupgrade.bin image. 3. Power on the router, into the U-Boot menu. 4. Select "2. Upgrade firmware" 5. Update sysupgrade.bin file name, input server IP and input device IP (if they deviate from the defaults) 6. Wait for automatic startup after burning Signed-off-by: Allen Zhao --- diff --git a/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts new file mode 100644 index 0000000000..abd4d4e59d --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2023 Allen Zhao + */ + +/dts-v1/; +#include "mt7981b-unielec-u7981-01.dtsi" +/ { + model = "Unielec U7981-01 (EMMC)"; + compatible = "unielec,u7981-01-emmc", "mediatek,mt7981"; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <8>; + max-frequency = <52000000>; + cap-mmc-highspeed; + vmmc-supply = <®_3p3v>; + non-removable; + status = "okay"; + + card@0 { + compatible = "mmc-card"; + reg = <0>; + + block { + compatible = "block-device"; + partitions { + block-partition-env { + partname = "u-boot-env"; + + nvmem-layout { + compatible = "u-boot,env-layout"; + }; + }; + + block-partition-factory { + partname = "factory"; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_4: macaddr@4 { + compatible = "mac-base"; + reg = <0x4 0x6>; + #nvmem-cell-cells = <1>; + }; + + macaddr_factory_1000: macaddr@1000 { + compatible = "mac-base"; + reg = <0x1000 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + }; + }; + }; +}; + +&pio { + mmc0_pins_default: mmc0-pins-default { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; + + mmc0_pins_uhs: mmc0-pins-uhs { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_1000 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&macaddr_factory_1000 1>; + nvmem-cell-names = "mac-address"; +}; + +&wifi { + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + status = "okay"; +}; diff --git a/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-nand.dts b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-nand.dts new file mode 100644 index 0000000000..230a612a34 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01-nand.dts @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2023 Allen Zhao + */ + +/dts-v1/; +#include "mt7981b-unielec-u7981-01.dtsi" +/ { + model = "Unielec U7981-01 (NAND)"; + compatible = "unielec,u7981-01-nand", "mediatek,mt7981"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + spi_nand: spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bl2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "factory"; + reg = <0x180000 0x200000>; + read-only; + + compatible = "nvmem-cells"; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + + macaddr_factory_1000: macaddr@1000 { + compatible = "mac-base"; + reg = <0x1000 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@380000 { + label = "fip"; + reg = <0x380000 0x0200000>; + }; + + partition@580000 { + label = "ubi"; + reg = <0x580000 0x4000000>; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <8>; + mediatek,pull-up-adv = <0>; /* bias-disable */ + }; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_1000 0>; + nvmem-cell-names = "mac-address"; +}; + +&gmac1 { + nvmem-cells = <&macaddr_factory_1000 1>; + nvmem-cell-names = "mac-address"; +}; + +&wifi { + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; + status = "okay"; +}; diff --git a/target/linux/mediatek/dts/mt7981b-unielec-u7981-01.dtsi b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01.dtsi new file mode 100644 index 0000000000..6e6150ba21 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-unielec-u7981-01.dtsi @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2023 Allen Zhao + */ + +/dts-v1/; +#include "mt7981.dtsi" +/ { + model = "Unielec U7981-01 (EMMC)"; + compatible = "unielec,u7981-01-emmc", "mediatek,mt7981"; + + chosen { + bootargs = "console=ttyS0,115200n1 loglevel=8 \ + earlycon=uart8250,mmio32,0x11002000 \ + "; + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins &gbe_led0_pins &gbe_led1_pins>; + status = "okay"; + + gmac0: mac@0 { + /* LAN */ + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + /* WAN */ + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + }; +}; + +&mdio_bus { + switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&xhci { + mediatek,u3p-dis-msk = <0x0>; + phys = <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 8e4fd8003c..5b8b910f62 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -26,6 +26,7 @@ mediatek_setup_interfaces() asus,tuf-ax4200|\ jdcloud,re-cp-03|\ mediatek,mt7981-rfb|\ + unielec,u7981-01*|\ zbtlink,zbt-z8102ax) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1 ;; diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 4df4370f0f..389c177fb9 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -164,6 +164,23 @@ platform_do_upgrade() { CI_ROOTPART="ubi_rootfs" nand_do_upgrade "$1" ;; + unielec,u7981-01*) + local rootdev="$(cmdline_get_var root)" + rootdev="${rootdev##*/}" + rootdev="${rootdev%p[0-9]*}" + case "$rootdev" in + mmc*) + CI_ROOTDEV="$rootdev" + CI_KERNPART="kernel" + CI_ROOTPART="rootfs" + emmc_do_upgrade "$1" + ;; + *) + CI_KERNPART="fit" + nand_do_upgrade "$1" + ;; + esac + ;; *) nand_do_upgrade "$1" ;; diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index 7d2fac56b6..e3b588c861 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -913,6 +913,28 @@ define Device/ubnt_unifi-6-plus endef TARGET_DEVICES += ubnt_unifi-6-plus +define Device/unielec_u7981-01 + DEVICE_VENDOR := Unielec + DEVICE_MODEL := U7981-01 + DEVICE_DTS_DIR := ../dts + DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 e2fsprogs f2fsck mkf2fs fdisk partx-utils + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef + +define Device/unielec_u7981-01-emmc + DEVICE_DTS := mt7981b-unielec-u7981-01-emmc + DEVICE_VARIANT := (EMMC) + $(call Device/unielec_u7981-01) +endef +TARGET_DEVICES += unielec_u7981-01-emmc + +define Device/unielec_u7981-01-nand + DEVICE_DTS := mt7981b-unielec-u7981-01-nand + DEVICE_VARIANT := (NAND) + $(call Device/unielec_u7981-01) +endef +TARGET_DEVICES += unielec_u7981-01-nand + define Device/xiaomi_mi-router-ax3000t DEVICE_VENDOR := Xiaomi DEVICE_MODEL := Mi Router AX3000T