From: Olliver Schinagl Date: Wed, 14 Sep 2022 12:50:38 +0000 (+0200) Subject: realtek: timer: Activate for RTL930x devices X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=68e28cdc47ac805faf2dda58127e848f8ef6efca;p=openwrt%2Fstaging%2Fwigyori.git realtek: timer: Activate for RTL930x devices Use the new timer driver for the RTL930x devices. Signed-off-by: Olliver Schinagl [remove old clock provider, select MIPS_EXTERNAL_TIMER and refresh kernel config] Signed-off-by: Sander Vanheule --- diff --git a/target/linux/realtek/dts-5.15/rtl930x.dtsi b/target/linux/realtek/dts-5.15/rtl930x.dtsi index c2a992a174..fdec626c9a 100644 --- a/target/linux/realtek/dts-5.15/rtl930x.dtsi +++ b/target/linux/realtek/dts-5.15/rtl930x.dtsi @@ -57,14 +57,6 @@ interrupts = <2>, <3>, <4>, <5>, <6>, <7>; }; - rtl9300clock: rtl9300clock@3200 { - compatible = "realtek,rtl9300clock"; - reg = <0x3200 0x10>, <0x3210 0x10>; - - interrupt-parent = <&intc>; - interrupts = <7 5>, <8 5>; - }; - spi0: spi@1200 { compatible = "realtek,rtl8380-spi"; reg = <0x1200 0x100>; @@ -73,6 +65,16 @@ #size-cells = <0>; }; + timer0: timer@3200 { + compatible = "realtek,rtl930x-timer", "realtek,otto-timer"; + reg = <0x3200 0x10>, <0x3210 0x10>, <0x3220 0x10>, + <0x3230 0x10>, <0x3240 0x10>; + + interrupt-parent = <&intc>; + interrupts = <7 4>, <8 4>, <9 4>, <10 4>, <11 4>; + clocks = <&lx_clk>; + }; + uart0: uart@2000 { compatible = "ns16550a"; reg = <0x2000 0x100>; diff --git a/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch b/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch index 8428c32e4e..4027b5319a 100644 --- a/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch +++ b/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch @@ -25,7 +25,7 @@ Submitted-by: Birger Koblitz platform-$(CONFIG_SGI_IP28) += sgi-ip22/ --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -1053,8 +1053,59 @@ config NLM_XLP_BOARD +@@ -1053,8 +1053,58 @@ config NLM_XLP_BOARD This board is based on Netlogic XLP Processor. Say Y here if you have a XLP based board. @@ -68,8 +68,7 @@ Submitted-by: Birger Koblitz + bool "Realtek RTL930X based platforms" + depends on RTL83XX + select MIPS_CPU_SCACHE -+ select CSRC_R4K -+ select CEVT_RTL9300 ++ select MIPS_EXTERNAL_TIMER + select SYS_SUPPORTS_MULTITHREADING + +config RTL931X diff --git a/target/linux/realtek/rtl930x/config-5.15 b/target/linux/realtek/rtl930x/config-5.15 index 5e03616678..35365370ef 100644 --- a/target/linux/realtek/rtl930x/config-5.15 +++ b/target/linux/realtek/rtl930x/config-5.15 @@ -9,7 +9,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BOARD_SCACHE=y -CONFIG_CEVT_RTL9300=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y # CONFIG_COMMON_CLK_REALTEK is not set @@ -33,7 +32,6 @@ CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_RNG2=y -CONFIG_CSRC_R4K=y CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DMA_NONCOHERENT=y CONFIG_DTC=y @@ -113,11 +111,11 @@ CONFIG_MIGRATION=y CONFIG_MIPS=y CONFIG_MIPS_ASID_BITS=8 CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set CONFIG_MIPS_CMDLINE_FROM_DTB=y CONFIG_MIPS_CPU_SCACHE=y CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MIPS_LD_CAN_LINK_VDSO=y # CONFIG_MIPS_MT_SMP is not set @@ -166,7 +164,7 @@ CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_POWER_RESET_SYSCON=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_RATIONAL=y -# CONFIG_REALTEK_OTTO_TIMER is not set +CONFIG_REALTEK_OTTO_TIMER=y CONFIG_REALTEK_OTTO_WDT=y CONFIG_REALTEK_PHY=y CONFIG_REALTEK_SOC_PHY=y @@ -199,6 +197,8 @@ CONFIG_SYS_SUPPORTS_MIPS16=y CONFIG_SYS_SUPPORTS_MULTITHREADING=y CONFIG_TARGET_ISA_REV=2 CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TINY_SRCU=y CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y CONFIG_USE_OF=y