From: Christian Svensson Date: Sun, 2 Jul 2023 22:31:59 +0000 (+0200) Subject: octeon: n821: add Cisco vEdge 1000 base X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=6bf0e7649400f5c25828061d14dd5aa76bfc1211;p=openwrt%2Fstaging%2Fstintel.git octeon: n821: add Cisco vEdge 1000 base This is the first commit to introduce the base for the N821 board used in Cisco vEdge 1000. This commit does not include the custom CPLD drivers but rather everything else that is already present in the upstream kernel. This results in an image that boots, but e.g. the SFP ports are not usable. Hardware: - CPU: Cavium Networks CN6130, 4 cores @ 1.0 GHz - Flash: - 16 MiB SPI NOR presented as 2x8 MiB for A/B boot recovery - 8192 MiB eMMC - RAM: 4096 MiB - Ethernet 1Gbit ports: 1x - Ethernet SFP ports: 8x - USB ports: 2x 3.0 Type-A on front panel - Serial: Two, one internal and one external - JTAG: Yes - LED count: 18x - Button count: 1x - GPIOs: 1x - Power: 2x redundant DC 12V barrel plug - Extra: Slot for SD card on front See the OpenWrt wiki for more hardware details. Installation: - Flash squashfs to /dev/sda2 and put kernel on /dev/sda1. - Update uboot's bootcmd environment variable to match. Full installation guide will be added to OpenWrt wiki when sysupgrade support is added. Signed-off-by: Christian Svensson Signed-off-by: Tommy Nevtelen Tested-by: Viktor Ekmark Tested-by: Daniel Wennberg --- diff --git a/package/boot/uboot-envtools/files/octeon b/package/boot/uboot-envtools/files/octeon new file mode 100644 index 0000000000..a6faed6eb3 --- /dev/null +++ b/package/boot/uboot-envtools/files/octeon @@ -0,0 +1,23 @@ +# +# Copyright (C) 2023 OpenWrt.org +# + +[ -e /etc/config/ubootenv ] && exit 0 + +touch /etc/config/ubootenv + +. /lib/uboot-envtools.sh +. /lib/functions.sh + +board=$(board_name) + +case "$board" in +cisco,vedge1000) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" + ;; +esac + +config_load ubootenv +config_foreach ubootenv_add_app_config ubootenv + +exit 0 diff --git a/target/linux/octeon/base-files/etc/board.d/01_network b/target/linux/octeon/base-files/etc/board.d/01_network index 906e838a6f..2443c90d60 100644 --- a/target/linux/octeon/base-files/etc/board.d/01_network +++ b/target/linux/octeon/base-files/etc/board.d/01_network @@ -17,6 +17,9 @@ ubnt,edgerouter-4) ubnt,edgerouter-6p) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "lan0" ;; +cisco,vedge1000) + ucidef_set_interfaces_lan_wan "mgmt0" "lan0" + ;; *) ucidef_set_interfaces_lan_wan "eth0" "eth1" ;; diff --git a/target/linux/octeon/base-files/lib/preinit/01_sysinfo b/target/linux/octeon/base-files/lib/preinit/01_sysinfo index b3246eab41..923e3824c7 100644 --- a/target/linux/octeon/base-files/lib/preinit/01_sysinfo +++ b/target/linux/octeon/base-files/lib/preinit/01_sysinfo @@ -3,6 +3,15 @@ do_sysinfo_octeon() { local name machine=$(grep "^system type" /proc/cpuinfo | sed "s/system type.*: \(.*\)/\1/g") + of_machine=$(head -n1 /sys/firmware/devicetree/base/compatible) + + # Sadly for whatever reason the N821 (Cisco Viptela vEdge 1000) uses the + # same supposedly unique board ID as the EdgeRouter. This is bad, so + # we override what cpuinfo gives us using the device tree as a hint. + case "$of_machine" in + "cisco,vedge1000"*) + return 0 + esac case "$machine" in "UBNT_E100"*) diff --git a/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts new file mode 100644 index 0000000000..e1f308dd52 --- /dev/null +++ b/target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/include/ "octeon_3xxx.dtsi" + +/ { + compatible = "cisco,vedge1000", "cavium,cn6130"; + model = "Cisco/Viptela vEdge 1000"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&ciu>; + + soc@0 { + smi0: mdio@1180000001800 { + mgmtphy: ethernet-phy@0 { + reg = <0x00>; + }; + }; + + mgmt0: ethernet@1070000100000 { + compatible = "cavium,octeon-5750-mix"; + reg = <0x10700 0x100000 0x00 0x100>, + <0x11800 0xe0000000 0x00 0x300>, + <0x11800 0xe0000400 0x00 0x400>, + <0x11800 0xe0002000 0x00 0x08>; + cell-index = <0x00>; + interrupts = <0x00 0x3e 0x01 0x2e>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + phy-handle = <&mgmtphy>; + }; + + pip: pip@11800a0000000 { + interface@0 { + ethernet@0 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(3)>; + label = "lan2"; + /delete-property/ local-mac-address; + }; + + ethernet@1 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(4)>; + label = "lan3"; + /delete-property/ local-mac-address; + }; + + ethernet@2 { + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(1)>; + label = "lan0"; + /delete-property/ local-mac-address; + }; + + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(2)>; + label = "lan1"; + }; + }; + + interface@1 { + ethernet@0 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x0>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(7)>; + label = "lan6"; + }; + + ethernet@1 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x1>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(8)>; + label = "lan7"; + }; + + ethernet@2 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x2>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(5)>; + label = "lan4"; + }; + + ethernet@3 { + compatible = "cavium,octeon-3860-pip-port"; + reg = <0x3>; + nvmem-cells = <&macaddr_eeprom>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(6)>; + label = "lan5"; + }; + }; + }; + + twsi0: i2c@1180000001000 { + clock-frequency = <400000>; + + jc42@18 { + compatible = "jedec,jc-42.4-temp"; + reg = <0x18>; + }; + }; + + twsi2: i2c@1180000001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cavium,octeon-3860-twsi"; + reg = <0x11800 0x1200 0x00 0x200>; + interrupts = <0x00 0x3b>; + clock-frequency = <400000>; + + tmp@4c { + compatible = "maxim,max6699"; + reg = <0x4c>; + }; + + rtc@6f { + compatible = "microchip,mcp7941x"; + reg = <0x6f>; + }; + + tlv-eeprom@54 { + compatible = "atmel,24c512"; + reg = <0x54>; + pagesize = <0x80>; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_eeprom: mac-address@8 { + reg = <0x8 6>; + }; + }; + }; + + uart0: serial@1180000000800 { + clock-frequency = <600000000>; + current-speed = <115200>; + }; + + uart1: serial@1180000000c00 { + compatible = "cavium,octeon-3860-uart", "ns16550"; + reg = <0x11800 0xc00 0x00 0x400>; + reg-shift = <0x03>; + interrupts = <0x00 0x23>; + clock-frequency = <600000000>; + current-speed = <115200>; + }; + + mmc0: mmc@1180000002000 { + compatible = "cavium,octeon-6130-mmc"; + reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0x01 0x13 0x00 0x3f>; + + mmc-slot@0 { + compatible = "cavium,octeon-6130-mmc-slot"; + reg = <0x00>; + voltage-ranges = <0xce4 0xce4>; + max-frequency = <0x3197500>; + wp-gpios = <&gpio 0x02 0x00>; + cd-gpios = <&gpio 0x03 0x01>; + cavium,bus-max-width = <0x04>; + }; + }; + + bootbus: bootbus@1180000000000 { + compatible = "cavium,octeon-3860-bootbus"; + reg = <0x11800 0x00 0x00 0x200>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x00 0x1ec00000 0x1400000>, + <1 0 0x10000 0x20000000 0x00>, + <2 0 0x10000 0x30000000 0x00>, + <3 0 0x10000 0x40000000 0x00>, + <4 0 0x10000 0x50000000 0x00>, + <5 0 0x10000 0x60000000 0x00>, + <6 0 0x00 0x1e000000 0x10000>, + <7 0 0x10000 0x80000000 0x00>; + + cavium,cs-config@0 { + compatible = "cavium,octeon-3860-bootbus-config"; + cavium,cs-index = <0x00>; + cavium,t-adr = <0x0a>; + cavium,t-ce = <0x32>; + cavium,t-oe = <0x32>; + cavium,t-we = <0x23>; + cavium,t-rd-hld = <0x19>; + cavium,t-wr-hld = <0x23>; + cavium,t-pause = <0x00>; + cavium,t-wait = <0x12c>; + cavium,t-page = <0x19>; + cavium,t-rd-dly = <0x00>; + cavium,t-ale = <0x03>; + cavium,pages = <0x00>; + cavium,bus-width = <0x10>; + }; + + /delete-node/ cavium,cs-config@1; + /delete-node/ cavium,cs-config@2; + /delete-node/ cavium,cs-config@3; + /delete-node/ cavium,cs-config@4; + /delete-node/ cavium,cs-config@5; + + cavium,cs-config@6 { + compatible = "cavium,octeon-3860-bootbus-config"; + cavium,cs-index = <0x06>; + cavium,t-adr = <0x0a>; + cavium,t-ce = <0x0a>; + cavium,t-oe = <0xa0>; + cavium,t-we = <0x64>; + cavium,t-rd-hld = <0x00>; + cavium,t-wr-hld = <0x00>; + cavium,t-pause = <0x32>; + cavium,t-wait = <0x12c>; + cavium,t-page = <0x12c>; + cavium,t-rd-dly = <0x0a>; + cavium,t-ale = <0x3f>; + cavium,pages = <0x00>; + cavium,bus-width = <0x08>; + /delete-property/ cavium,wait-mode; + }; + + flash0: nor@0,0 { + compatible = "cfi-flash"; + reg = <0x00 0x00 0x1000000>; + bank-width = <2>; + device-width = <1>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x00 0x200000>; + read-only; + }; + + partition@fe0000 { + label = "environment"; + reg = <0xfe0000 0x20000>; + }; + }; + + cpld: cpld@6,0 { + compatible = "cisco,n821-cpld", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + reg-io-width = <1>; // Syscon uses 4-byte accesses by default + + reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices.. + ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on + }; + }; + + uctl@118006f000000 { + compatible = "cavium,octeon-6335-uctl"; + reg = <0x11800 0x6f000000 0x00 0x100>; + ranges; + #address-cells = <2>; + #size-cells = <2>; + refclk-frequency = <0xb71b00>; + refclk-type = "crystal"; + + ehci@16f0000000000 { + compatible = "cavium,octeon-6335-ehci", "usb-ehci"; + reg = <0x16f00 0x00 0x00 0x100>; + interrupts = <0x00 0x38>; + big-endian-regs; + }; + + ohci@16f0000000400 { + compatible = "cavium,octeon-6335-ohci", "usb-ohci"; + reg = <0x16f00 0x400 0x00 0x100>; + interrupts = <0x00 0x38>; + big-endian-regs; + }; + }; + }; +}; + diff --git a/target/linux/octeon/image/Makefile b/target/linux/octeon/image/Makefile index fa845a2499..dcab815791 100644 --- a/target/linux/octeon/image/Makefile +++ b/target/linux/octeon/image/Makefile @@ -94,4 +94,22 @@ define Device/ubnt_unifi-usg endef TARGET_DEVICES += ubnt_unifi-usg +define Device/cisco_vedge1000 + DEVICE_VENDOR := Cisco Viptela + DEVICE_MODEL := vEdge 1000 + BOARD_NAME := cisco,vedge1000 + DEVICE_PACKAGES += \ + kmod-hwmon-jc42 \ + kmod-hwmon-max6697 \ + kmod-of-mdio \ + kmod-rtc-ds1307 \ + kmod-usb-dwc3 \ + kmod-usb-storage-uas \ + kmod-usb3 + KERNEL := kernel-bin | append-dtb-elf + KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts) + DEVICE_DTS := cn6130_cisco_vedge1000 +endef +TARGET_DEVICES += cisco_vedge1000 + $(eval $(call BuildImage))