From: Felix Fietkau <nbd@openwrt.org>
Date: Thu, 10 Jan 2013 14:09:50 +0000 (+0000)
Subject: ath9k: add some calibration fixes from wireless-testing
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=7762ff11355dbbbfbef2d12db1774713a2ff596b;p=openwrt%2Fstaging%2Fjow.git

ath9k: add some calibration fixes from wireless-testing

SVN-Revision: 35081
---

diff --git a/package/mac80211/patches/300-pending_work.patch b/package/mac80211/patches/300-pending_work.patch
index b47878b180..0edd4c6ab8 100644
--- a/package/mac80211/patches/300-pending_work.patch
+++ b/package/mac80211/patches/300-pending_work.patch
@@ -987,3 +987,51 @@
  	return 0;
  }
  
+--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+@@ -967,7 +967,7 @@ static bool ar9003_hw_init_cal(struct at
+ 	struct ath9k_hw_cal_data *caldata = ah->caldata;
+ 	bool txiqcal_done = false, txclcal_done = false;
+ 	bool is_reusable = true, status = true;
+-	bool run_rtt_cal = false, run_agc_cal;
++	bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
+ 	bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
+ 	u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
+ 					  AR_PHY_AGC_CONTROL_FLTR_CAL   |
+@@ -1013,7 +1013,8 @@ static bool ar9003_hw_init_cal(struct at
+ 		}
+ 	}
+ 
+-	if (!(ah->enabled_cals & TX_IQ_CAL))
++	if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
++	    !(ah->enabled_cals & TX_IQ_CAL))
+ 		goto skip_tx_iqcal;
+ 
+ 	/* Do Tx IQ Calibration */
+@@ -1033,21 +1034,22 @@ static bool ar9003_hw_init_cal(struct at
+ 			REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
+ 				    AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
+ 		txiqcal_done = run_agc_cal = true;
+-		goto skip_tx_iqcal;
+-	} else if (caldata && !caldata->done_txiqcal_once)
++	} else if (caldata && !caldata->done_txiqcal_once) {
+ 		run_agc_cal = true;
++		sep_iq_cal = true;
++	}
+ 
++skip_tx_iqcal:
+ 	if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
+ 		ar9003_mci_init_cal_req(ah, &is_reusable);
+ 
+-	if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
++	if (sep_iq_cal) {
+ 		txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
+ 		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+ 		udelay(5);
+ 		REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+ 	}
+ 
+-skip_tx_iqcal:
+ 	if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
+ 		/* Calibrate the AGC */
+ 		REG_WRITE(ah, AR_PHY_AGC_CONTROL,