From: Bryan Wu Date: Wed, 30 Jan 2008 08:52:22 +0000 (+0800) Subject: EMAC driver: define MDC_CLK=2.5MHz and caculate mdc_div according to SCLK. X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=7cc8f38188133e0c278b9f207d63c2c2b4d98236;p=openwrt%2Fstaging%2Fblogic.git EMAC driver: define MDC_CLK=2.5MHz and caculate mdc_div according to SCLK. Signed-off-by: Bryan Wu Signed-off-by: Jeff Garzik Signed-off-by: David S. Miller --- diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index 4006a5dea654..ee398196ea80 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c @@ -412,20 +412,26 @@ static void bf537_adjust_link(struct net_device *dev) spin_unlock_irqrestore(&lp->lock, flags); } +/* MDC = 2.5 MHz */ +#define MDC_CLK 2500000 + static int mii_probe(struct net_device *dev) { struct bf537mac_local *lp = netdev_priv(dev); struct phy_device *phydev = NULL; unsigned short sysctl; int i; + u32 sclk, mdc_div; /* Enable PHY output early */ if (!(bfin_read_VR_CTL() & PHYCLKOE)) bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE); - /* MDC = 2.5 MHz */ + sclk = get_sclk(); + mdc_div = ((sclk / MDC_CLK) / 2) - 1; + sysctl = bfin_read_EMAC_SYSCTL(); - sysctl |= SET_MDCDIV(24); + sysctl |= SET_MDCDIV(mdc_div); bfin_write_EMAC_SYSCTL(sysctl); /* search for connect PHY device */ @@ -477,8 +483,10 @@ static int mii_probe(struct net_device *dev) lp->phydev = phydev; printk(KERN_INFO "%s: attached PHY driver [%s] " - "(mii_bus:phy_addr=%s, irq=%d)\n", - DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq); + "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)" + "@sclk=%dMHz)\n", + DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq, + MDC_CLK, mdc_div, sclk/1000000); return 0; }