From: Paul Burton <paul.burton@imgtec.com>
Date: Sun, 13 Aug 2017 04:36:31 +0000 (-0700)
Subject: irqchip: mips-gic: Remove gic_get_usm_range()
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=84103814a2cfd3561ff00bd7317c22f40f9e0dad;p=openwrt%2Fstaging%2Fblogic.git

irqchip: mips-gic: Remove gic_get_usm_range()

The MIPS VDSO code is no longer reliant upon the irqchip driver to
provide the address of the GIC's user-visible section via
gic_get_usm_range(). Remove the now-dead code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17041/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 6e303df56447..3e4c79e921e3 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -46,7 +46,6 @@ struct gic_pcpu_mask {
 	DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS);
 };
 
-static unsigned long __gic_base_addr;
 static struct gic_pcpu_mask pcpu_masks[NR_CPUS];
 static DEFINE_SPINLOCK(gic_lock);
 static struct irq_domain *gic_irq_domain;
@@ -134,17 +133,6 @@ int gic_get_c0_fdc_int(void)
 				  GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC));
 }
 
-int gic_get_usm_range(struct resource *gic_usm_res)
-{
-	if (!gic_present)
-		return -1;
-
-	gic_usm_res->start = __gic_base_addr + USM_VISIBLE_SECTION_OFS;
-	gic_usm_res->end = gic_usm_res->start + (USM_VISIBLE_SECTION_SIZE - 1);
-
-	return 0;
-}
-
 static void gic_handle_shared_int(bool chained)
 {
 	unsigned int intr, virq;
@@ -672,8 +660,6 @@ static void __init __gic_init(unsigned long gic_base_addr,
 	unsigned int gicconfig, cpu;
 	unsigned int v[2];
 
-	__gic_base_addr = gic_base_addr;
-
 	mips_gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
 
 	gicconfig = read_gic_config();
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index da02a146b292..843e1bb49767 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -11,10 +11,6 @@
 #include <linux/clocksource.h>
 #include <linux/ioport.h>
 
-/* GIC Address Space */
-#define USM_VISIBLE_SECTION_OFS		0x10000
-#define USM_VISIBLE_SECTION_SIZE	0x10000
-
 /* User Mode Visible Section Register Map */
 #define GIC_UMV_SH_COUNTER_31_00_OFS	0x0000
 #define GIC_UMV_SH_COUNTER_63_32_OFS	0x0004
@@ -29,18 +25,11 @@ extern void gic_init(unsigned long gic_base_addr,
 extern int gic_get_c0_compare_int(void);
 extern int gic_get_c0_perfcount_int(void);
 extern int gic_get_c0_fdc_int(void);
-extern int gic_get_usm_range(struct resource *gic_usm_res);
 
 #else /* CONFIG_MIPS_GIC */
 
 #define gic_present	0
 
-static inline int gic_get_usm_range(struct resource *gic_usm_res)
-{
-	/* Shouldn't be called. */
-	return -1;
-}
-
 #endif /* CONFIG_MIPS_GIC */
 
 #endif /* __LINUX_IRQCHIP_MIPS_GIC_H */