From: Horia Geanta <horia.geanta@freescale.com>
Date: Mon, 21 Jul 2014 13:03:21 +0000 (+0300)
Subject: crypto: caam - fix DECO RSR polling
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=8f1da7b945b65513fb02b75ce25040c67ce32726;p=openwrt%2Fstaging%2Fblogic.git

crypto: caam - fix DECO RSR polling

RSR (Request Source Register) is not used when
virtualization is disabled, thus don't poll for Valid bit.

Besides this, if used, timeout has to be reinitialized.

Signed-off-by: Horia Geanta <horia.geanta@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index cedb56500b61..3cade79ea41e 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -89,12 +89,15 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
 	/* Set the bit to request direct access to DECO0 */
 	topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 
-	if (ctrlpriv->virt_en == 1)
+	if (ctrlpriv->virt_en == 1) {
 		setbits32(&topregs->ctrl.deco_rsr, DECORSR_JR0);
 
-	while (!(rd_reg32(&topregs->ctrl.deco_rsr) & DECORSR_VALID) &&
-	       --timeout)
-		cpu_relax();
+		while (!(rd_reg32(&topregs->ctrl.deco_rsr) & DECORSR_VALID) &&
+		       --timeout)
+			cpu_relax();
+
+		timeout = 100000;
+	}
 
 	setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);