From: Ville Syrjälä Date: Thu, 24 Jan 2013 13:29:38 +0000 (+0200) Subject: drm/i915: VLV_DDL is VLV only and needs an offset X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=8f6d8ee9f6884b8fea026b614d0475177975d066;p=openwrt%2Fstaging%2Fblogic.git drm/i915: VLV_DDL is VLV only and needs an offset Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 896946812e74..3540a06743ee 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2773,13 +2773,13 @@ /* drain latency register values*/ #define DRAIN_LATENCY_PRECISION_32 32 #define DRAIN_LATENCY_PRECISION_16 16 -#define VLV_DDL1 0x70050 +#define VLV_DDL1 (VLV_DISPLAY_BASE + 0x70050) #define DDL_CURSORA_PRECISION_32 (1<<31) #define DDL_CURSORA_PRECISION_16 (0<<31) #define DDL_CURSORA_SHIFT 24 #define DDL_PLANEA_PRECISION_32 (1<<7) #define DDL_PLANEA_PRECISION_16 (0<<7) -#define VLV_DDL2 0x70054 +#define VLV_DDL2 (VLV_DISPLAY_BASE + 0x70054) #define DDL_CURSORB_PRECISION_32 (1<<31) #define DDL_CURSORB_PRECISION_16 (0<<31) #define DDL_CURSORB_SHIFT 24