From: Sakari Ailus <sakari.ailus@linux.intel.com>
Date: Mon, 15 Sep 2014 20:07:07 +0000 (-0300)
Subject: [media] smiapp: The PLL calculator handles sensors with VT clocks only
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=9249e9a4ca113517307c5044f66ec9cc0ede20b1;p=openwrt%2Fstaging%2Fblogic.git

[media] smiapp: The PLL calculator handles sensors with VT clocks only

No need to pretend the OP limits are there anymore.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
---

diff --git a/drivers/media/i2c/smiapp/smiapp-core.c b/drivers/media/i2c/smiapp/smiapp-core.c
index 389e7751ebb4..d0ea7a3bfc0a 100644
--- a/drivers/media/i2c/smiapp/smiapp-core.c
+++ b/drivers/media/i2c/smiapp/smiapp-core.c
@@ -277,16 +277,6 @@ static int smiapp_pll_update(struct smiapp_sensor *sensor)
 	struct smiapp_pll *pll = &sensor->pll;
 	int rval;
 
-	if (sensor->minfo.smiapp_profile == SMIAPP_PROFILE_0) {
-		/*
-		 * Fill in operational clock divisors limits from the
-		 * video timing ones. On profile 0 sensors the
-		 * requirements regarding them are essentially the
-		 * same as on VT ones.
-		 */
-		lim.op = lim.vt;
-	}
-
 	pll->binning_horizontal = sensor->binning_horizontal;
 	pll->binning_vertical = sensor->binning_vertical;
 	pll->link_freq =