From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Date: Thu, 19 Apr 2018 14:47:41 +0000 (+0300)
Subject: spi: dw: invert wait condition in dw_spi_xfer
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=9b14ac5cc2294ac3eaae92421abff27ed3e6caae;p=project%2Fbcm63xx%2Fu-boot.git

spi: dw: invert wait condition in dw_spi_xfer

While switching to readl_poll_timeout macros from custom code
the waiting condition was accidently inverted, so it was pure
luck that this code works at least in some conditions.

Fix that by inverting exit condition for readl_poll_timeout.

Fixes: c6b4f031d9 ("DW SPI: fix tx data loss on FIFO flush")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---

diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 0e93b62eee..5e2d290ddc 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -425,7 +425,7 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	 * in the beginning of new transfer.
 	 */
 	if (readl_poll_timeout(priv->regs + DW_SPI_SR, val,
-			       !(val & SR_TF_EMPT) || (val & SR_BUSY),
+			       (val & SR_TF_EMPT) && !(val & SR_BUSY),
 			       RX_TIMEOUT * 1000)) {
 		ret = -ETIMEDOUT;
 	}