From: Hans de Goede Date: Fri, 11 May 2018 09:52:16 +0000 (+0200) Subject: ASoC: Intel: bytcr_rt5640: Fix compile error X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=a3a956a6dddec7ce83bf861c11b479da1057980f;p=openwrt%2Fstaging%2Fblogic.git ASoC: Intel: bytcr_rt5640: Fix compile error Fix the compile error introduced by: "ASoC: Intel: bytcr_rt5640: Configure PLL1 before using it". Signed-off-by: Hans de Goede Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c index 404aa7355912..fe46f3b2aecc 100644 --- a/sound/soc/intel/boards/bytcr_rt5640.c +++ b/sound/soc/intel/boards/bytcr_rt5640.c @@ -178,14 +178,14 @@ static int byt_rt5640_prepare_and_enable_pll1(struct snd_soc_dai *codec_dai, } if (ret < 0) { - dev_err(codec_dai->codec->dev, "can't set pll: %d\n", ret); + dev_err(codec_dai->component->dev, "can't set pll: %d\n", ret); return ret; } ret = snd_soc_dai_set_sysclk(codec_dai, RT5640_SCLK_S_PLL1, rate * 512, SND_SOC_CLOCK_IN); if (ret < 0) { - dev_err(codec_dai->codec->dev, "can't set clock %d\n", ret); + dev_err(codec_dai->component->dev, "can't set clock %d\n", ret); return ret; }