From: Lendacky, Thomas Date: Wed, 3 Sep 2014 17:14:39 +0000 (-0500) Subject: amd-xgbe-phy: Checkpatch driver fixes X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=b73c798b1709e70c8a845228ef07d92c25bd8d6b;p=openwrt%2Fstaging%2Fblogic.git amd-xgbe-phy: Checkpatch driver fixes This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: Tom Lendacky Signed-off-by: David S. Miller --- diff --git a/drivers/net/phy/amd-xgbe-phy.c b/drivers/net/phy/amd-xgbe-phy.c index da351d32b9f9..4e1f7f734d27 100644 --- a/drivers/net/phy/amd-xgbe-phy.c +++ b/drivers/net/phy/amd-xgbe-phy.c @@ -75,7 +75,6 @@ #include #include - MODULE_AUTHOR("Tom Lendacky "); MODULE_LICENSE("Dual BSD/GPL"); MODULE_VERSION("1.0.0-a"); @@ -172,7 +171,6 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver"); #define SPEED_1000_TXAMP 0xf #define SPEED_1000_WORD 0x1 - /* SerDes RxTx register offsets */ #define RXTX_REG20 0x0050 #define RXTX_REG114 0x01c8 @@ -266,7 +264,6 @@ do { \ XSIR1_IOWRITE((_priv), _reg, reg_val); \ } while (0) - /* Macros for reading or writing SerDes RxTx registers * The ioread macros will get bit fields or full values using the * register definitions formed using the input names @@ -294,7 +291,6 @@ do { \ XRXTX_IOWRITE((_priv), _reg, reg_val); \ } while (0) - enum amd_xgbe_phy_an { AMD_XGBE_AN_READY = 0, AMD_XGBE_AN_START,