From: Michael Ellerman <mpe@ellerman.id.au>
Date: Thu, 19 Jul 2018 04:37:57 +0000 (+1000)
Subject: Merge branch 'topic/ppc-kvm' into next
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=ce57c6610cc2;p=openwrt%2Fstaging%2Fblogic.git

Merge branch 'topic/ppc-kvm' into next

Merge in some commits we're sharing with the KVM tree.

I manually propagated the change from commit d3d4ffaae439
("powerpc/powernv/ioda2: Reduce upper limit for DMA window size") into
pci-ioda-tce.c.

Conflicts:
        arch/powerpc/include/asm/cputable.h
        arch/powerpc/platforms/powernv/pci-ioda.c
        arch/powerpc/platforms/powernv/pci.h
---

ce57c6610cc2d7cde61fc005a2d2090bce46fc73
diff --cc arch/powerpc/include/asm/cputable.h
index 7711ebfb7d5f,f980f91cad8a..82816a2043b9
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@@ -487,17 -485,15 +484,15 @@@ static inline void cpu_feature_keys_ini
  #ifdef CONFIG_CPU_LITTLE_ENDIAN
  #define CPU_FTRS_POSSIBLE	\
  	    (CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 | \
 -	     CPU_FTRS_POWER8_DD1 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | \
 -	     CPU_FTRS_POWER9 | CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
 +	     CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | CPU_FTRS_POWER9 | \
- 	     CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1 | \
- 	     CPU_FTRS_POWER9_DD2_2)
++	     CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
  #else
  #define CPU_FTRS_POSSIBLE	\
  	    (CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
  	     CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
 -	     CPU_FTRS_POWER8 | CPU_FTRS_POWER8_DD1 | CPU_FTRS_CELL | \
 -	     CPU_FTRS_PA6T | CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | \
 -	     CPU_FTRS_POWER9 | CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
 +	     CPU_FTRS_POWER8 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
 +	     CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | CPU_FTRS_POWER9 | \
- 	     CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1 | \
- 	     CPU_FTRS_POWER9_DD2_2)
++	     CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
  #endif /* CONFIG_CPU_LITTLE_ENDIAN */
  #endif
  #else
@@@ -565,17 -561,17 +560,15 @@@ enum 
  #ifdef CONFIG_CPU_LITTLE_ENDIAN
  #define CPU_FTRS_ALWAYS \
  	    (CPU_FTRS_POSSIBLE & ~CPU_FTR_HVMODE & CPU_FTRS_POWER7 & \
- 	     CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & \
- 	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
 -	     CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & CPU_FTRS_POWER8_DD1 & \
 -	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD2_1 & \
--	     CPU_FTRS_DT_CPU_BASE)
++	     CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & CPU_FTRS_POWER9 & \
++	     CPU_FTRS_POWER9_DD2_1 & CPU_FTRS_DT_CPU_BASE)
  #else
  #define CPU_FTRS_ALWAYS		\
  	    (CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
  	     CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
  	     CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
- 	     ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
- 	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
 -	     CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
 -	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD2_1 & \
--	     CPU_FTRS_DT_CPU_BASE)
++	     ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & CPU_FTRS_POWER9 & \
++	     CPU_FTRS_POWER9_DD2_1 & CPU_FTRS_DT_CPU_BASE)
  #endif /* CONFIG_CPU_LITTLE_ENDIAN */
  #endif
  #else
diff --cc arch/powerpc/platforms/powernv/pci.h
index 44dfbc37f547,0020937fc694..8b37b28e3831
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@@ -257,4 -247,43 +242,33 @@@ extern void pnv_npu_take_ownership(stru
  extern void pnv_npu_release_ownership(struct pnv_ioda_pe *npe);
  extern int pnv_npu2_init(struct pnv_phb *phb);
  
 -/* cxl functions */
 -extern bool pnv_cxl_enable_device_hook(struct pci_dev *dev);
 -extern void pnv_cxl_disable_device(struct pci_dev *dev);
 -extern int pnv_cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
 -extern void pnv_cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
 -
 -
 -/* phb ops (cxl switches these when enabling the kernel api on the phb) */
 -extern const struct pci_controller_ops pnv_cxl_cx4_ioda_controller_ops;
 -
+ /* pci-ioda-tce.c */
+ #define POWERNV_IOMMU_DEFAULT_LEVELS	1
+ #define POWERNV_IOMMU_MAX_LEVELS	5
+ 
+ extern int pnv_tce_build(struct iommu_table *tbl, long index, long npages,
+ 		unsigned long uaddr, enum dma_data_direction direction,
+ 		unsigned long attrs);
+ extern void pnv_tce_free(struct iommu_table *tbl, long index, long npages);
+ extern int pnv_tce_xchg(struct iommu_table *tbl, long index,
+ 		unsigned long *hpa, enum dma_data_direction *direction,
+ 		bool alloc);
+ extern __be64 *pnv_tce_useraddrptr(struct iommu_table *tbl, long index,
+ 		bool alloc);
+ extern unsigned long pnv_tce_get(struct iommu_table *tbl, long index);
+ 
+ extern long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
+ 		__u32 page_shift, __u64 window_size, __u32 levels,
+ 		bool alloc_userspace_copy, struct iommu_table *tbl);
+ extern void pnv_pci_ioda2_table_free_pages(struct iommu_table *tbl);
+ 
+ extern long pnv_pci_link_table_and_group(int node, int num,
+ 		struct iommu_table *tbl,
+ 		struct iommu_table_group *table_group);
+ extern void pnv_pci_unlink_table_and_group(struct iommu_table *tbl,
+ 		struct iommu_table_group *table_group);
+ extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
+ 		void *tce_mem, u64 tce_size,
+ 		u64 dma_offset, unsigned int page_shift);
+ 
  #endif /* __POWERNV_PCI_H */