From: Lucas De Marchi <lucas.demarchi@intel.com>
Date: Sat, 9 Mar 2019 03:57:23 +0000 (-0800)
Subject: drm/i915/icl: split combo and mg pll enable
X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=d2ab5ebf46b4b2c71e94cc08e098b0686cb9db18;p=openwrt%2Fstaging%2Fblogic.git

drm/i915/icl: split combo and mg pll enable

Let's start using the vfuncs to differentiate MG and Combo PLLs. The end
goal is to decouple the type of the PLL from the IDs since the latter
are likely to change from one platform to another. This also makes the
code easier to read by not having lots of if/else chains on leaf
functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-2-lucas.demarchi@intel.com
---

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index b3fb221c2532..af0b176854ba 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -3117,10 +3117,10 @@ static void icl_mg_pll_write(struct drm_i915_private *dev_priv,
 }
 
 static void icl_pll_enable(struct drm_i915_private *dev_priv,
-			   struct intel_shared_dpll *pll)
+			   struct intel_shared_dpll *pll,
+			   i915_reg_t enable_reg)
 {
 	const enum intel_dpll_id id = pll->info->id;
-	i915_reg_t enable_reg = icl_pll_id_to_enable_reg(id);
 	u32 val;
 
 	val = I915_READ(enable_reg);
@@ -3157,6 +3157,23 @@ static void icl_pll_enable(struct drm_i915_private *dev_priv,
 	/* DVFS post sequence would be here. See the comment above. */
 }
 
+static void combo_pll_enable(struct drm_i915_private *dev_priv,
+			     struct intel_shared_dpll *pll)
+{
+	i915_reg_t enable_reg = icl_pll_id_to_enable_reg(pll->info->id);
+
+	icl_pll_enable(dev_priv, pll, enable_reg);
+}
+
+static void mg_pll_enable(struct drm_i915_private *dev_priv,
+			  struct intel_shared_dpll *pll)
+{
+	i915_reg_t enable_reg =
+		MG_PLL_ENABLE(icl_pll_id_to_tc_port(pll->info->id));
+
+	icl_pll_enable(dev_priv, pll, enable_reg);
+}
+
 static void icl_pll_disable(struct drm_i915_private *dev_priv,
 			    struct intel_shared_dpll *pll)
 {
@@ -3218,13 +3235,13 @@ static void icl_dump_hw_state(struct drm_i915_private *dev_priv,
 }
 
 static const struct intel_shared_dpll_funcs icl_pll_funcs = {
-	.enable = icl_pll_enable,
+	.enable = combo_pll_enable,
 	.disable = icl_pll_disable,
 	.get_hw_state = icl_pll_get_hw_state,
 };
 
 static const struct intel_shared_dpll_funcs mg_pll_funcs = {
-	.enable = icl_pll_enable,
+	.enable = mg_pll_enable,
 	.disable = icl_pll_disable,
 	.get_hw_state = mg_pll_get_hw_state,
 };