From: Tomi Valkeinen Date: Mon, 24 Sep 2012 06:34:52 +0000 (+0300) Subject: OMAPDSS: DSI: fix tlpx_half reg field length X-Git-Url: http://git.cdn.openwrt.org/?a=commitdiff_plain;h=e84dc1cc1503150e3bc37268a0b0f0bc0097622c;p=openwrt%2Fstaging%2Fblogic.git OMAPDSS: DSI: fix tlpx_half reg field length tlpx_half bit field in DSI_DSIPHY_CFG1 is [20,16], not [22,16] as accessed in the code currently. Fix this. The bug should not have caused any problems on OMAP3/4, as the bits 21,22 are unused. They are used on OMAP5, though. Signed-off-by: Tomi Valkeinen --- diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 4d748139315d..abe335abca53 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -2289,7 +2289,7 @@ static void dsi_cio_timings(struct platform_device *dsidev) dsi_write_reg(dsidev, DSI_DSIPHY_CFG0, r); r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1); - r = FLD_MOD(r, tlpx_half, 22, 16); + r = FLD_MOD(r, tlpx_half, 20, 16); r = FLD_MOD(r, tclk_trail, 15, 8); r = FLD_MOD(r, tclk_zero, 7, 0); @@ -4107,7 +4107,7 @@ static void dsi_proto_timings(struct omap_dss_device *dssdev) ths_exit = FLD_GET(r, 7, 0); r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1); - tlpx = FLD_GET(r, 22, 16) * 2; + tlpx = FLD_GET(r, 20, 16) * 2; tclk_trail = FLD_GET(r, 15, 8); tclk_zero = FLD_GET(r, 7, 0);