openwrt/staging/blogic.git
7 years agoMerge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Thu, 6 Apr 2017 19:41:42 +0000 (05:41 +1000)]
Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more things for 4.12:
- ttm and amdgpu support for non-contiguous vram CPU mappings
- lots of bug fixes and cleanups for vega10
- misc bug fixes and code cleanups

[airlied: fix do_div error on 32-bit arm, not sure it's 100% correct]

* 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits)
  drm/amdgpu: use uintptr_t instead of unsigned long to store pointer
  drm/amdgpu: Avoid using signed integer to store pointer value
  drm/amdgpu:invoke new implemented AI MB func
  drm/amdgpu/vega10:timeout set to equal with VI
  drm/amdgpu:implement the reset MB func for vega10
  drm/amdgpu:fix typo for mxgpu_ai
  drm/amdgpu:no need to involv HDP in KIQ
  drm/amdgpu:add PSP block only load_type=PSP (v2)
  drm/amdgpu/smu9: update to latest driver interface
  drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
  drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
  drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
  drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
  drm/amd/amdgpu: Drop gfx_v9_0_print_status()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
  drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
  drm/amdgpu: Move function amdgpu_has_atpx near other similar functions
  ...

7 years agoMerge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm...
Dave Airlie [Thu, 6 Apr 2017 19:38:27 +0000 (05:38 +1000)]
Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next

Highlights:
- Cooling device support from Russell, to allow GPU throttling on system
thermal overload.
- Explicit fencing support from Philipp, implemented in a similar way to
drm/msm.

* 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux:
  drm/etnaviv: submit support for out-fences
  drm/etnaviv: return GPU fence through the submit structure
  drm/etnaviv: submit support for in-fences
  drm/etnaviv: add etnaviv cooling device
  drm/etnaviv: switch to postclose
  drm/etnaviv: add lockdep assert to fence allocation

7 years agoMerge tag 'imx-drm-next-2017-04-04' of git://git.pengutronix.de/git/pza/linux into...
Dave Airlie [Thu, 6 Apr 2017 19:34:46 +0000 (05:34 +1000)]
Merge tag 'imx-drm-next-2017-04-04' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm module/dependency changes

- The PRE/PRG drivers added an unwanted DRM dependency to the ipu-v3 driver.
  Remove the dependency by conditionally disabling PRE/PRG support depending
  on CONFIG_DRM.
- Merge the imx-ipuv3-crtc module into the imxdrm module. There is no reason
  anymore for a separation between core drm driver and crtc/plane drivers,
  especially since commit eb8c88808c83 ("drm/imx: add deferred plane
  disabling"), which added a dependency on imx-ipuv3-crtc to the imxdrm
  module.

* tag 'imx-drm-next-2017-04-04' of git://git.pengutronix.de/git/pza/linux:
  drm/imx: merge imx-drm-core and ipuv3-crtc in one module
  gpu: ipu-v3: don't depend on DRM being enabled

7 years agoMerge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next
Dave Airlie [Thu, 6 Apr 2017 19:20:06 +0000 (05:20 +1000)]
Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-next

A bit more for 4.12:
- GP10B support
- GP107 acceleration support

* 'linux-4.12' of git://github.com/skeggsb/linux: (23 commits)
  drm/nouveau/gpio: enable interrupts on cards with 32 gpio lines
  drm/nouveau/gr/gp107: initial support
  drm/nouveau/core: recognise GP10B chipset
  drm/nouveau/platform: support for probing GP10B
  drm/nouveau/platform: make VDD regulator optional
  drm/nouveau/gr: support for GP10B
  drm/nouveau/ibus: add GP10B support
  drm/nouveau/mc: add GP10B support
  drm/nouveau/fb: add GP10B support
  drm/nouveau/fifo: add GP10B support
  drm/nouveau/msgqueue: support for GP10B PMU firmware
  drm/nouveau/secboot: add GP10B support
  drm/nouveau/secboot/gm20b: specify MC base address as argument
  drm/nouveau/secboot: start LS firmware in post-run hook
  drm/nouveau/secboot: let LS post_run hooks return error
  drm/nouveau/secboot: pass instance to LS firmware loaders
  drm/nouveau/secboot: allow to boot multiple falcons
  drm/nouveau/imem/gk20a: Turn instmem lock into mutex
  drm/nouveau: initial support (display-only) for GP107
  drm/nouveau/kms/nv50: fix double dma_fence_put() when destroying plane state
  ...

7 years agodrm/amdgpu: use uintptr_t instead of unsigned long to store pointer
Alex Xie [Wed, 5 Apr 2017 20:54:34 +0000 (16:54 -0400)]
drm/amdgpu: use uintptr_t instead of unsigned long to store pointer

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Avoid using signed integer to store pointer value
Alex Xie [Wed, 5 Apr 2017 20:33:00 +0000 (16:33 -0400)]
drm/amdgpu: Avoid using signed integer to store pointer value

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:invoke new implemented AI MB func
Monk Liu [Wed, 5 Apr 2017 05:04:50 +0000 (13:04 +0800)]
drm/amdgpu:invoke new implemented AI MB func

Implement the sr-iov mailbox for soc15 asics.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vega10:timeout set to equal with VI
Monk Liu [Wed, 5 Apr 2017 04:17:39 +0000 (12:17 +0800)]
drm/amdgpu/vega10:timeout set to equal with VI

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:implement the reset MB func for vega10
Monk Liu [Wed, 5 Apr 2017 04:17:18 +0000 (12:17 +0800)]
drm/amdgpu:implement the reset MB func for vega10

they are lack in the bringup stage, we need them for GPU reset
feature.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:fix typo for mxgpu_ai
Monk Liu [Wed, 5 Apr 2017 04:16:44 +0000 (12:16 +0800)]
drm/amdgpu:fix typo for mxgpu_ai

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:no need to involv HDP in KIQ
Monk Liu [Wed, 5 Apr 2017 08:39:11 +0000 (16:39 +0800)]
drm/amdgpu:no need to involv HDP in KIQ

1,KIQ won't touch VRAM so no need to involv HDP flush/invalidate at all.
2,According to CP hw designer KIQ better not use any PM4 package lead to wait behave.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:add PSP block only load_type=PSP (v2)
Monk Liu [Thu, 30 Mar 2017 10:00:20 +0000 (18:00 +0800)]
drm/amdgpu:add PSP block only load_type=PSP (v2)

SRIOV currently only can load ucode directly, and PSP
block is not supported by VF temporarily.

will remove this restrict and use PSP load all ucode
even for SRIOV later

v2: squash in check against module parameter

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/smu9: update to latest driver interface
Evan Quan [Wed, 5 Apr 2017 03:54:43 +0000 (11:54 +0800)]
drm/amdgpu/smu9: update to latest driver interface

Signed-off-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()
Tom St Denis [Wed, 5 Apr 2017 13:16:01 +0000 (09:16 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init()

Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()
Tom St Denis [Wed, 5 Apr 2017 13:06:13 +0000 (09:06 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset()

Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()
Tom St Denis [Wed, 5 Apr 2017 13:04:50 +0000 (09:04 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start()

Use new WREG32_FIELD15 macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()
Tom St Denis [Wed, 5 Apr 2017 13:03:08 +0000 (09:03 -0400)]
drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()
Tom St Denis [Wed, 5 Apr 2017 12:59:16 +0000 (08:59 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register()

Use new WREG32_FIELD macro

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Drop gfx_v9_0_print_status()
Tom St Denis [Wed, 5 Apr 2017 12:54:11 +0000 (08:54 -0400)]
drm/amd/amdgpu: Drop gfx_v9_0_print_status()

It's not used in gfx 6/7/8 so drop it from gfx 9 as well.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()
Tom St Denis [Wed, 5 Apr 2017 12:51:02 +0000 (08:51 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state()

Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()
Tom St Denis [Wed, 5 Apr 2017 12:49:00 +0000 (08:49 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state()

Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()
Tom St Denis [Wed, 5 Apr 2017 12:46:12 +0000 (08:46 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state()

Use new WREG32_FIELD15 macro.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: cleanup gfx_v9_0_init_queue()
Tom St Denis [Wed, 5 Apr 2017 12:32:13 +0000 (08:32 -0400)]
drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()

Introduce WREG32_FIELD15 macro for SOC15 architectures.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Move function amdgpu_has_atpx near other similar functions
Alex Xie [Wed, 5 Apr 2017 15:07:13 +0000 (11:07 -0400)]
drm/amdgpu: Move function amdgpu_has_atpx near other similar functions

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix over allocating of IRQ sources
Christian König [Wed, 5 Apr 2017 09:46:12 +0000 (11:46 +0200)]
drm/amdgpu: fix over allocating of IRQ sources

We need an array of pointers to IRQ sources, not an array of sources.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up psp reload_quirk()
Tom St Denis [Tue, 4 Apr 2017 15:40:13 +0000 (11:40 -0400)]
drm/amd/amdgpu: Clean up psp reload_quirk()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Fix psp_v3_1 compare sram
Tom St Denis [Tue, 4 Apr 2017 15:36:20 +0000 (11:36 -0400)]
drm/amd/amdgpu: Fix psp_v3_1 compare sram

Had the wrong sense in the loop

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup get_invalidate_req v2
Christian König [Tue, 4 Apr 2017 14:07:45 +0000 (16:07 +0200)]
drm/amdgpu: cleanup get_invalidate_req v2

The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: keep the function pointer

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix vm size and block size for VMPT (v5)
Zhang, Jerry [Wed, 29 Mar 2017 08:08:32 +0000 (16:08 +0800)]
drm/amdgpu: fix vm size and block size for VMPT (v5)

Set reasonable defaults per family.

v2: set both of them in gmc
v3: move vm size and block size in vm manager
v4: squash in warning fix from Alex Xie
v5: squash in min() warning fix

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Fix srbm_indexing in init/inactive hqd code
Tom St Denis [Tue, 4 Apr 2017 14:24:19 +0000 (10:24 -0400)]
drm/amd/amdgpu: Fix srbm_indexing in init/inactive hqd code

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up gfx_v8_0_mqd_init()
Tom St Denis [Tue, 4 Apr 2017 13:48:32 +0000 (09:48 -0400)]
drm/amd/amdgpu: Clean up gfx_v8_0_mqd_init()

Clean up a toggle with ?:.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: de-numberify HQD_ACTIVE check.
Tom St Denis [Tue, 4 Apr 2017 13:43:18 +0000 (09:43 -0400)]
drm/amd/amdgpu: de-numberify HQD_ACTIVE check.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: clean up gfx_v8_0_kiq_init_register()
Tom St Denis [Tue, 4 Apr 2017 13:39:16 +0000 (09:39 -0400)]
drm/amd/amdgpu: clean up gfx_v8_0_kiq_init_register()

Swap read/write pattern for WREG32_FIELD()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up gfx_v8_0_inactive_hqd()
Tom St Denis [Tue, 4 Apr 2017 13:27:28 +0000 (09:27 -0400)]
drm/amd/amdgpu: Clean up gfx_v8_0_inactive_hqd()

Swap read/write pattern for WREG32_FIELD()

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Clean up gfx_v8_0_kiq_set_interrupt_state()
Tom St Denis [Tue, 4 Apr 2017 13:14:13 +0000 (09:14 -0400)]
drm/amd/amdgpu: Clean up gfx_v8_0_kiq_set_interrupt_state()

Use new WREG32_FIELD_OFFSET() to clean up code.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: KIQ is also disabled when MEC is disabled
Alex Deucher [Thu, 30 Mar 2017 17:03:07 +0000 (13:03 -0400)]
drm/amdgpu/gfx8: KIQ is also disabled when MEC is disabled

Set the ready flag to reflect this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup VMHUB bit definitions v2
Christian König [Thu, 30 Mar 2017 13:31:13 +0000 (15:31 +0200)]
drm/amdgpu: cleanup VMHUB bit definitions v2

The two hubs are just instances of the same hardware,
so the register bits are identical.

v2: only remove get_vm_protection_bits for now

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: handle CPU access for split VRAM buffers (v2)
Christian König [Wed, 29 Mar 2017 09:16:05 +0000 (11:16 +0200)]
drm/amdgpu: handle CPU access for split VRAM buffers (v2)

This avoids merging them together on page fault.

v2: squash in 64-bit division fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/nouveau/gpio: enable interrupts on cards with 32 gpio lines
Adam Borowski [Sun, 2 Apr 2017 05:03:28 +0000 (07:03 +0200)]
drm/nouveau/gpio: enable interrupts on cards with 32 gpio lines

The code attempts to enable them, but hits an undefined behaviour by
shifting by the entire register's width:

    int lines = 32;
    u32 mask = (1 << lines) - 1;    // 00000000 on x86
    u32 mask = (1 << lines) - 1;    // ffffffff on arm (32)
    u32 mask = (1 << lines) - 1;    // 00000000 on arm64
    u32 mask = (1ULL << lines) - 1; // ffffffff everywhere

Signed-off-by: Adam Borowski <kilobyte@angband.pl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr/gp107: initial support
Ben Skeggs [Thu, 30 Mar 2017 06:12:30 +0000 (16:12 +1000)]
drm/nouveau/gr/gp107: initial support

Forked from GP106 implementation.

Differences:
- 1 PPC/GPC
- Slightly different grctx magics

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/core: recognise GP10B chipset
Alexandre Courbot [Wed, 29 Mar 2017 09:31:23 +0000 (18:31 +0900)]
drm/nouveau/core: recognise GP10B chipset

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/platform: support for probing GP10B
Alexandre Courbot [Wed, 29 Mar 2017 09:31:22 +0000 (18:31 +0900)]
drm/nouveau/platform: support for probing GP10B

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/platform: make VDD regulator optional
Alexandre Courbot [Wed, 29 Mar 2017 09:31:21 +0000 (18:31 +0900)]
drm/nouveau/platform: make VDD regulator optional

GP10B's power is managed by generic PM domains, so it does not require a
VDD regulator. Add this option into the chip function structure.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr: support for GP10B
Alexandre Courbot [Wed, 29 Mar 2017 09:31:20 +0000 (18:31 +0900)]
drm/nouveau/gr: support for GP10B

GR is similar to GP100, with a few unavailable registers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/ibus: add GP10B support
Alexandre Courbot [Wed, 29 Mar 2017 09:31:19 +0000 (18:31 +0900)]
drm/nouveau/ibus: add GP10B support

GP10B requires a specific initialization sequence due to the absence of
devinit.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/mc: add GP10B support
Alexandre Courbot [Wed, 29 Mar 2017 09:31:18 +0000 (18:31 +0900)]
drm/nouveau/mc: add GP10B support

GP10B's MC is compatible with GP100's, but engines need to be explicitly
put out of ELPG during init.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/fb: add GP10B support
Alexandre Courbot [Wed, 29 Mar 2017 09:31:17 +0000 (18:31 +0900)]
drm/nouveau/fb: add GP10B support

GP10B's FB is largely compatible with the GP100 implementation.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/fifo: add GP10B support
Alexandre Courbot [Wed, 29 Mar 2017 09:31:16 +0000 (18:31 +0900)]
drm/nouveau/fifo: add GP10B support

GP10B's FIFO is similar to GP100's, but only allows 512 channels.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/msgqueue: support for GP10B PMU firmware
Alexandre Courbot [Wed, 29 Mar 2017 09:31:15 +0000 (18:31 +0900)]
drm/nouveau/msgqueue: support for GP10B PMU firmware

The GP10B firmware is very close to GM20B's. The only difference is that
it supports booting multiple falcons. In order to avoid having too much
functions and structures shared, implement its support in the same
source file as GM20B firmware.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: add GP10B support
Alexandre Courbot [Wed, 29 Mar 2017 09:31:14 +0000 (18:31 +0900)]
drm/nouveau/secboot: add GP10B support

GP10B's secboot is largely similar to GM20B's. Only differences are MC
base address and the fact that GPCCS is also securely managed.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot/gm20b: specify MC base address as argument
Alexandre Courbot [Wed, 29 Mar 2017 09:31:13 +0000 (18:31 +0900)]
drm/nouveau/secboot/gm20b: specify MC base address as argument

Allow the MC base address to be specified as an argument for the WPR
region reading function. GP10B uses a different address layout as GM20B,
so this is necessary. Also export the function to be used by GP10B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: start LS firmware in post-run hook
Alexandre Courbot [Wed, 29 Mar 2017 09:31:12 +0000 (18:31 +0900)]
drm/nouveau/secboot: start LS firmware in post-run hook

The LS firmware post-run hook is the right place to start said LS
firmware. Moving it here also allows to remove special handling in the
ACR code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: let LS post_run hooks return error
Alexandre Courbot [Wed, 29 Mar 2017 09:31:11 +0000 (18:31 +0900)]
drm/nouveau/secboot: let LS post_run hooks return error

A LS post-run hook can meet an error meaning the failure of secure boot.
Make sure this can be reported.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: pass instance to LS firmware loaders
Alexandre Courbot [Wed, 29 Mar 2017 09:31:10 +0000 (18:31 +0900)]
drm/nouveau/secboot: pass instance to LS firmware loaders

Having access to the secboot instance loading a LS firmware can be
useful to LS firmware handlers. At least more useful than just having an
out-of-context subdev pointer.

GP10B's firmware will also need to know the WPR address, which can be
obtained from the secboot instance.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: allow to boot multiple falcons
Alexandre Courbot [Wed, 29 Mar 2017 09:31:09 +0000 (18:31 +0900)]
drm/nouveau/secboot: allow to boot multiple falcons

Change the secboot and msgqueue interfaces to take a mask of falcons to
reset instead of a single falcon. The GP10B firmware interface requires
FECS and GPCCS to be booted in a single firmware command.

For firmwares that only support single falcon boot, it is trivial to
loop over the mask and boot each falcons individually.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/imem/gk20a: Turn instmem lock into mutex
Thierry Reding [Mon, 30 Jan 2017 20:03:07 +0000 (21:03 +0100)]
drm/nouveau/imem/gk20a: Turn instmem lock into mutex

The gk20a implementation of instance memory uses vmap()/vunmap() to map
memory regions into the kernel's virtual address space. These functions
may sleep, so protecting them by a spin lock is not safe. This triggers
a warning if the DEBUG_ATOMIC_SLEEP Kconfig option is enabled. Fix this
by using a mutex instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau: initial support (display-only) for GP107
Ben Skeggs [Thu, 6 Apr 2017 00:35:26 +0000 (10:35 +1000)]
drm/nouveau: initial support (display-only) for GP107

Forked from GP106 implementation.

Split out from commit enabling secboot/gr support so that it can be
added to earlier kernels.

Cc: stable@vger.kernel.org [4.10+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/kms/nv50: fix double dma_fence_put() when destroying plane state
Ben Skeggs [Wed, 5 Apr 2017 08:16:14 +0000 (18:16 +1000)]
drm/nouveau/kms/nv50: fix double dma_fence_put() when destroying plane state

When the atomic support was added to nouveau, the DRM core did not do this.

However, later in the same merge window, a commit (drm/fence: add in-fences
support) was merged that added it, leading to use-after-frees of the fence
object.

Cc: stable@vger.kernel.org [4.10+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/kms/nv50: fix setting of HeadSetRasterVertBlankDmi method
Ben Skeggs [Tue, 4 Apr 2017 23:12:54 +0000 (09:12 +1000)]
drm/nouveau/kms/nv50: fix setting of HeadSetRasterVertBlankDmi method

Cc: stable@vger.kernel.org [4.10+]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/mmu/nv4a: use nv04 mmu rather than the nv44 one
Ilia Mirkin [Sat, 18 Mar 2017 20:23:10 +0000 (16:23 -0400)]
drm/nouveau/mmu/nv4a: use nv04 mmu rather than the nv44 one

The NV4A (aka NV44A) is an oddity in the family. It only comes in AGP
and PCI varieties, rather than a core PCIE chip with a bridge for
AGP/PCI as necessary. As a result, it appears that the MMU is also
non-functional. For AGP cards, the vast majority of the NV4A lineup,
this worked out since we force AGP cards to use the nv04 mmu. However
for PCI variants, this did not work.

Switching to the NV04 MMU makes it work like a charm. Thanks to mwk for
the suggestion. This should be a no-op for NV4A AGP boards, as they were
using it already.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70388
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/mpeg: mthd returns true on success now
Ilia Mirkin [Sun, 19 Mar 2017 01:53:05 +0000 (21:53 -0400)]
drm/nouveau/mpeg: mthd returns true on success now

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Fixes: 590801c1a3 ("drm/nouveau/mpeg: remove dependence on namedb/engctx lookup")
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/amdgpu: use TTM_PL_FLAG_CONTIGUOUS v2
Christian König [Wed, 29 Mar 2017 11:41:57 +0000 (13:41 +0200)]
drm/amdgpu: use TTM_PL_FLAG_CONTIGUOUS v2

Implement AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS using TTM_PL_FLAG_CONTIGUOUS
instead of a placement limit. That allows us to better handle CPU
accessible placements.

v2: prevent virtual BO start address from overflowing

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move adjust_mc_addr into amdgpu_gart_funcs
Christian König [Thu, 30 Mar 2017 13:55:07 +0000 (15:55 +0200)]
drm/amdgpu: move adjust_mc_addr into amdgpu_gart_funcs

We should probably rename amdgpu_gart_funcs sooner or later.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup logic in amdgpu_vm_flush
Christian König [Mon, 3 Apr 2017 12:28:26 +0000 (14:28 +0200)]
drm/amdgpu: cleanup logic in amdgpu_vm_flush

Remove some of the extra checks where they don't hurt us.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup coding style in amdgpu_vm_flush
Christian König [Mon, 3 Apr 2017 12:16:07 +0000 (14:16 +0200)]
drm/amdgpu: cleanup coding style in amdgpu_vm_flush

Abort early if there is nothing todo and correctly indent the "if"s.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: coding style of amdgpu_vm_is_gpu_reset
Christian König [Mon, 3 Apr 2017 11:59:25 +0000 (13:59 +0200)]
drm/amdgpu: coding style of amdgpu_vm_is_gpu_reset

The name is a bit confusing and the extra "? true : false" is superflous.

Additional to that remove setting the reset counter directly after checking it.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove VMID first tracking
Christian König [Thu, 30 Mar 2017 12:53:05 +0000 (14:53 +0200)]
drm/amdgpu: remove VMID first tracking

Not used any more.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move VM related defines into amdgpu_vm.h
Christian König [Thu, 30 Mar 2017 12:41:19 +0000 (14:41 +0200)]
drm/amdgpu: move VM related defines into amdgpu_vm.h

Try to clean up amdgpu.h.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix VMHUB order to match the hardware
Christian König [Thu, 30 Mar 2017 12:37:23 +0000 (14:37 +0200)]
drm/amdgpu: fix VMHUB order to match the hardware

Match our defines with what the hw uses.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: drop alpha support
Christian König [Tue, 28 Mar 2017 18:00:20 +0000 (20:00 +0200)]
drm/amdgpu: drop alpha support

We will probably never see this combination.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: add TTM_PL_FLAG_CONTIGUOUS v2
Christian König [Wed, 29 Mar 2017 10:13:54 +0000 (12:13 +0200)]
drm/ttm: add TTM_PL_FLAG_CONTIGUOUS v2

This allows drivers to specify if they need a contiguous allocation or not.

v2: use space instead of tab

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: add io_mem_pfn callback
Christian König [Tue, 28 Mar 2017 14:54:50 +0000 (16:54 +0200)]
drm/ttm: add io_mem_pfn callback

This allows the driver to handle io_mem mappings on their own.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: cleanup and optimize ttm_bo_mem_compat v2
Christian König [Wed, 29 Mar 2017 09:47:04 +0000 (11:47 +0200)]
drm/ttm: cleanup and optimize ttm_bo_mem_compat v2

No need to implement the same logic twice. Also check if the busy placements
are identical to the already scanned placements before checking them.

v2: improve check even more as suggested by Michel.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: add defines for KIQ packets
Alex Deucher [Thu, 30 Mar 2017 16:24:59 +0000 (12:24 -0400)]
drm/amdgpu/vi: add defines for KIQ packets

Make it clearer how these packets work.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/soc15: Fix static checker warnings
Alex Deucher [Mon, 3 Apr 2017 20:56:08 +0000 (16:56 -0400)]
drm/amdgpu/soc15: Fix static checker warnings

vega10 is the only soc15 asic at the moment so these
warnings are invalid, but add a default case to silence
the warnings.

Fixes: 220ab9bd1ccf: "drm/amdgpu: soc15 enable (v3)"
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoMerge branch 'drm/next/du' of git://linuxtv.org/pinchartl/media into drm-next
Dave Airlie [Tue, 4 Apr 2017 21:17:12 +0000 (07:17 +1000)]
Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/media into drm-next

RCAR GEN3 DU HDMI support.

* 'drm/next/du' of git://linuxtv.org/pinchartl/media: (22 commits)
  drm: rcar-du: Add HDMI outputs to R8A7795 device description
  drm: rcar-du: Add DPLL support
  drm: rcar-du: Skip disabled outputs
  drm: rcar-du: Add Gen3 HDMI encoder support
  dt-bindings: display: renesas: Add R-Car Gen3 HDMI TX DT bindings
  drm: rcar-du: Hardcode encoders types to DRM_MODE_ENCODER_NONE
  drm: rcar-du: Replace manual bridge implementation with DRM bridge
  drm: rcar-du: Add support for LVDS mode selection
  drm: rcar-du: Use the DRM panel API
  drm: rcar-du: Document the vsps property in the DT bindings
  drm: rcar-du: Remove wait field from rcar_du_device structure
  drm: rcar-du: Make sure the VSP is initialized on platforms that need it
  drm: rcar-du: Use DRM core's atomic commit helper
  drm: rcar-du: Clear handled event pointer in CRTC state
  drm: rcar-du: Handle event when disabling CRTCs
  drm: rcar-du: Don't open code of_device_get_match_data()
  drm: rcar-du: Switch to encoder .atomic_mode_set() helper function
  drm: panels: Add LVDS panel driver
  drm: Add data transmission order bus flag
  devicetree/bindings: display: Add bindings for two Mitsubishi panels
  ...

7 years agodrm/amdgpu: Read vram width from integrated system info table
Harry Wentland [Sat, 1 Apr 2017 00:14:33 +0000 (20:14 -0400)]
drm/amdgpu: Read vram width from integrated system info table

On KB, KV, CZ we should read the vram width from integrated system
table, if we can. The NOOFCHAN in MC_SHARED_CHMAP is not accurate.

With this change we can enable two 4k displays on CZ again. This use
case was broken sometime in January when we started looking at
vram_width for bandwidth calculations instead of hardcoding this value.

v2:
  Return 0 if integrated system info table is not available.

Tested-by: Roman Li <roman.li@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: create a func to check vm size
Zhang, Jerry [Wed, 29 Mar 2017 08:08:31 +0000 (16:08 +0800)]
drm/amdgpu: create a func to check vm size

break it out from the check parameters function.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Fix a NULL deref in amdgpu_vm_add_prt_cb()
Dan Carpenter [Mon, 3 Apr 2017 18:41:39 +0000 (21:41 +0300)]
drm/amdgpu: Fix a NULL deref in amdgpu_vm_add_prt_cb()

We accidentally dereference "cb" if the kmalloc() fails.

Fixes: 451bc8eb8fe6 ("drm/amdgpu: fix PRT teardown on VM fini v3")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix a couple locking issues
Dan Carpenter [Mon, 3 Apr 2017 18:42:42 +0000 (21:42 +0300)]
drm/amd/powerplay: fix a couple locking issues

We should return unlock on the error path in pp_dpm_dispatch_tasks()
and there is a double lock bug in pp_dpm_set_sclk_od().

Fixes: 2a5071056e6a ("drm/amd/powerplay: add global PowerPlay mutex.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix pp_dpm_get_current_power_state() (v2)
Dan Carpenter [Mon, 3 Apr 2017 18:41:47 +0000 (21:41 +0300)]
drm/amd/powerplay: fix pp_dpm_get_current_power_state() (v2)

This switch statement is missing breaks.

v2: agd: break in default case as well

Fixes: 2a5071056e6a ("drm/amd/powerplay: add global PowerPlay mutex.")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: various cleanups for uvd/vce.
Rex Zhu [Thu, 30 Mar 2017 07:45:52 +0000 (15:45 +0800)]
drm/amdgpu: various cleanups for uvd/vce.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: when resume failed, return error to avoid system hang.
Rex Zhu [Thu, 30 Mar 2017 05:21:01 +0000 (13:21 +0800)]
drm/amdgpu: when resume failed, return error to avoid system hang.

Continuing if the GPU fails to resume will end in pain.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use a 64bit interval tree for VM management v2
Christian König [Thu, 30 Mar 2017 12:03:59 +0000 (14:03 +0200)]
drm/amdgpu: use a 64bit interval tree for VM management v2

This only makes a difference for 32-bit systems. The idea is to have a
fixed virtual address space size with 4-level page tables and to
minimize differences between 32 and 64-bit systems.

v2: Update commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix semicolon.cocci warnings
kbuild test robot [Fri, 31 Mar 2017 10:15:10 +0000 (18:15 +0800)]
drm/amdgpu: fix semicolon.cocci warnings

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:133:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Acked-by: Huang Rui <ray.huang@amd.com>
CC: Huang Rui <ray.huang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/powerplay: fix locking typo
Alex Deucher [Fri, 31 Mar 2017 14:51:29 +0000 (10:51 -0400)]
drm/amdgpu/powerplay: fix locking typo

Fixes: 2a5071056e6a601e ("drm/amd/powerplay: add global PowerPlay mutex.")
Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm: rcar-du: Add HDMI outputs to R8A7795 device description
Koji Matsuoka [Fri, 11 Nov 2016 17:07:39 +0000 (18:07 +0100)]
drm: rcar-du: Add HDMI outputs to R8A7795 device description

Update the device description with the two available HDMI outputs.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Add DPLL support
Koji Matsuoka [Fri, 11 Nov 2016 17:07:41 +0000 (18:07 +0100)]
drm: rcar-du: Add DPLL support

The implementation hardcodes a workaround for the H3 ES1.x SoC
regardless of the SoC revision, as the workaround can be safely applied
on all devices in the Gen3 family without any side effect.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Skip disabled outputs
Laurent Pinchart [Thu, 1 Dec 2016 11:07:49 +0000 (13:07 +0200)]
drm: rcar-du: Skip disabled outputs

When a DT node connected to a DU output is disabled no bridge will ever
be instantiated for it. Skip the output in that case.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Add Gen3 HDMI encoder support
Koji Matsuoka [Fri, 11 Nov 2016 17:07:40 +0000 (18:07 +0100)]
drm: rcar-du: Add Gen3 HDMI encoder support

The R-Car Gen3 SoCs include on-chip DesignWare HDMI encoders. Support
them with a platform driver to provide platform glue data to the dw-hdmi
driver.

The driver is a complete rewrite of code coming from the Renesas BSP,
save for the values in the PHY parameters table.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
7 years agodt-bindings: display: renesas: Add R-Car Gen3 HDMI TX DT bindings
Laurent Pinchart [Thu, 1 Dec 2016 23:02:53 +0000 (01:02 +0200)]
dt-bindings: display: renesas: Add R-Car Gen3 HDMI TX DT bindings

The Renesas R-Car Gen3 SoCs use a Synopsys DWC HDMI TX encoder IP. Add
corresponding device tree bindings based on the DWC HDMI TX bindings
model.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Rob Herring <robh@kernel.org>
7 years agodrm: rcar-du: Hardcode encoders types to DRM_MODE_ENCODER_NONE
Laurent Pinchart [Fri, 7 Oct 2016 14:39:21 +0000 (17:39 +0300)]
drm: rcar-du: Hardcode encoders types to DRM_MODE_ENCODER_NONE

Unlike the connector type, the encoder type is unused by userspace. As
it is equally unused in the driver, except in a single location where
the connector type can be used instead, hardcode it to
DRM_MODE_ENCODER_NONE. This allow removing all code that tries to
determine (unsuccessfully in case a bridge is used) the encoder type.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Replace manual bridge implementation with DRM bridge
Laurent Pinchart [Fri, 7 Oct 2016 13:01:41 +0000 (16:01 +0300)]
drm: rcar-du: Replace manual bridge implementation with DRM bridge

The rcar-du driver contains a manual implementation of HDMI and VGA
bridges. Use DRM bridges to replace it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Add support for LVDS mode selection
Laurent Pinchart [Mon, 3 Oct 2016 10:07:02 +0000 (13:07 +0300)]
drm: rcar-du: Add support for LVDS mode selection

Retrieve the LVDS mode from the panel and configure the LVDS encoder
accordingly. LVDS mode selection is static as LVDS panels can't be
hot-plugged on any of the device supported by the driver. Support for
dynamic mode selection can be implemented in the future when needed.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Use the DRM panel API
Laurent Pinchart [Fri, 18 Nov 2016 01:22:37 +0000 (03:22 +0200)]
drm: rcar-du: Use the DRM panel API

Instead of parsing the panel device tree node manually, use the panel
API to delegate panel handling to a panel driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Document the vsps property in the DT bindings
Laurent Pinchart [Mon, 27 Mar 2017 09:51:04 +0000 (12:51 +0300)]
drm: rcar-du: Document the vsps property in the DT bindings

The property is used by the driver but is missing from the DT bindings.
Document it.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Remove wait field from rcar_du_device structure
Laurent Pinchart [Sat, 4 Mar 2017 21:49:27 +0000 (23:49 +0200)]
drm: rcar-du: Remove wait field from rcar_du_device structure

The field is a left-over from the switch to the atomic commit helper.
It's unused, remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Make sure the VSP is initialized on platforms that need it
Jacopo Mondi [Fri, 3 Mar 2017 12:58:56 +0000 (13:58 +0100)]
drm: rcar-du: Make sure the VSP is initialized on platforms that need it

On Gen3 platforms planes are managed by the external VSP compositor on
behalf of DRM/KMS. If VSP compositor support is not enabled in the DU
driver, the VSP initialization stub routine is called. Return an error
from that stub to fail explicitly, otherwise the device won't be usable
and the driver will crash.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[Clarified commit message]
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Use DRM core's atomic commit helper
Laurent Pinchart [Fri, 10 Feb 2017 11:30:35 +0000 (13:30 +0200)]
drm: rcar-du: Use DRM core's atomic commit helper

The DRM core atomic helper now supports asynchronous commits natively.
The custom rcar-du implementation isn't needed anymore, remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
7 years agodrm: rcar-du: Clear handled event pointer in CRTC state
Laurent Pinchart [Sun, 12 Feb 2017 00:45:11 +0000 (02:45 +0200)]
drm: rcar-du: Clear handled event pointer in CRTC state

The atomic commit helper requires drivers to clear the event pointer
stored in the CRTC state when the event is handled. In preparation to
using the helper, fix the driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>