openwrt/staging/blogic.git
6 years agodrm/amd/display: Implement VEGAM device IDs in DC
Jerry (Fangzhi) Zuo [Wed, 11 Apr 2018 20:39:35 +0000 (15:39 -0500)]
drm/amd/display: Implement VEGAM device IDs in DC

Implement device IDs for VEGAM

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM pci ids
Leo Liu [Thu, 9 Nov 2017 18:25:31 +0000 (13:25 -0500)]
drm/amdgpu: add VEGAM pci ids

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM support to vi
Leo Liu [Wed, 11 Apr 2018 20:28:28 +0000 (15:28 -0500)]
drm/amdgpu: add VEGAM support to vi

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM to VCE harvest config
Leo Liu [Fri, 10 Nov 2017 17:32:04 +0000 (12:32 -0500)]
drm/amdgpu: add VEGAM to VCE harvest config

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM VCE firmware support
Leo Liu [Wed, 11 Apr 2018 20:25:57 +0000 (15:25 -0500)]
drm/amdgpu: add VEGAM VCE firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM UVD encode support
Leo Liu [Wed, 11 Apr 2018 20:24:01 +0000 (15:24 -0500)]
drm/amdgpu: add VEGAM UVD encode support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM UVD firmware support
Leo Liu [Fri, 10 Nov 2017 17:27:40 +0000 (12:27 -0500)]
drm/amdgpu: add VEGAM UVD firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: initialize VEGAM GFX
Leo Liu [Thu, 16 Nov 2017 18:49:56 +0000 (13:49 -0500)]
drm/amdgpu: initialize VEGAM GFX

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GFX golden settings
Leo Liu [Thu, 16 Nov 2017 18:41:03 +0000 (13:41 -0500)]
drm/amdgpu: add VEGAM GFX golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GFX firmware support
Leo Liu [Fri, 10 Nov 2017 16:04:09 +0000 (11:04 -0500)]
drm/amdgpu: add VEGAM GFX firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SDMA golden settings
Leo Liu [Wed, 11 Apr 2018 20:22:20 +0000 (15:22 -0500)]
drm/amdgpu: add VEGAM SDMA golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SDMA firmware support
Leo Liu [Thu, 9 Nov 2017 18:56:12 +0000 (13:56 -0500)]
drm/amdgpu: add VEGAM SDMA firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: initialize VEGAM GMC (v2)
Leo Liu [Wed, 11 Apr 2018 20:20:35 +0000 (15:20 -0500)]
drm/amdgpu: initialize VEGAM GMC (v2)

v2: use proper register rather than hardcoding.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GMC golden settings
Leo Liu [Wed, 11 Apr 2018 20:18:20 +0000 (15:18 -0500)]
drm/amdgpu: add VEGAM GMC golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: skip VEGAM MC firmware load
Leo Liu [Thu, 16 Nov 2017 18:15:12 +0000 (13:15 -0500)]
drm/amdgpu: skip VEGAM MC firmware load

Directly loaded by VBIOS

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM dc support check
Leo Liu [Wed, 8 Nov 2017 23:07:12 +0000 (18:07 -0500)]
drm/amdgpu: add VEGAM dc support check

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/virtual_dce: add VEGAM support
Leo Liu [Fri, 3 Nov 2017 18:22:16 +0000 (14:22 -0400)]
drm/amdgpu/virtual_dce: add VEGAM support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SMU firmware support
Leo Liu [Thu, 9 Nov 2017 18:24:47 +0000 (13:24 -0500)]
drm/amdgpu: add VEGAM SMU firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: specify VEGAM ucode SMU load method
Leo Liu [Thu, 9 Nov 2017 18:26:54 +0000 (13:26 -0500)]
drm/amdgpu: specify VEGAM ucode SMU load method

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set VEGAM to ASIC family and ip blocks
Leo Liu [Thu, 9 Nov 2017 18:22:54 +0000 (13:22 -0500)]
drm/amdgpu: set VEGAM to ASIC family and ip blocks

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: bypass GPU info firmware load for VEGAM
Leo Liu [Thu, 9 Nov 2017 18:19:58 +0000 (13:19 -0500)]
drm/amdgpu: bypass GPU info firmware load for VEGAM

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM ASIC type
Leo Liu [Thu, 9 Nov 2017 18:18:24 +0000 (13:18 -0500)]
drm/amdgpu: add VEGAM ASIC type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: Change the default to PCI on PowerPC
Mathieu Malaterre [Tue, 24 Apr 2018 19:55:11 +0000 (21:55 +0200)]
drm/radeon: Change the default to PCI on PowerPC

AGP mode is unstable on PowerPC. Symptoms are generally of the form:

[ 1228.795711] radeon 0000:00:10.0: ring 0 stalled for more than 10240msec

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add OVERDRIVE support on Vega10 (v2)
Rex Zhu [Wed, 18 Apr 2018 10:46:07 +0000 (18:46 +0800)]
drm/amd/pp: Add OVERDRIVE support on Vega10 (v2)

when bit14 in module parameter ppfeaturemask was set.
od feature will be enabled on Vega10 except vbios not support.

user can read od range by reading sysfs pp_od_clk_voltage,
cat pp_od_clk_voltage
OD_SCLK:
0:        852Mhz        800mV
1:        991Mhz        900mV
2:       1138Mhz        950mV
3:       1269Mhz       1000mV
4:       1348Mhz       1050mV
5:       1399Mhz       1100mV
6:       1440Mhz       1150mV
7:       1500Mhz       1200mV
OD_MCLK:
0:        167Mhz        800mV
1:        500Mhz        800mV
2:        800Mhz        950mV
3:        945Mhz       1000mV
OD_RANGE:
SCLK:     852MHz       2200MHz
MCLK:     167MHz       1500MHz
VDDC:     800mV        1200mV

and can configure the clock/voltage by writing pp_od_clk_voltage
for example:

echo "s 0 900 820">pp_od_clk_voltage to change the sclk/vddc
to 900MHz and 820 mV in dpm level0.

echo "r" to change the clk/voltage to  default value.

echo "c">pp_od_clk_voltage
to commit the change

v2: squash in warning fix (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/admgpu: fix mode_valid's return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:14:18 +0000 (15:14 +0200)]
drm/admgpu: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: fix mode_valid's return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:13 +0000 (15:15 +0200)]
drm/radeon: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: fix radeon_atpx_get_client_id()'s return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:41 +0000 (15:15 +0200)]
drm/radeon: fix radeon_atpx_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, radeon_atpx_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix amdgpu_atpx_get_client_id()'s return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:34 +0000 (15:15 +0200)]
drm/amdgpu: fix amdgpu_atpx_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, amdgpu_atpx_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: change pp_dpm clk/mclk/pcie input format.
welu [Tue, 24 Apr 2018 13:13:20 +0000 (09:13 -0400)]
drm/amdgpu: change pp_dpm clk/mclk/pcie input format.

1. support more than 8 values when setting get_pp_dpm_mclk/
sclk/pcie, the former design just parse command format like
"echo xxxx > pp_dpm_sclk" and current can parse "echo xx xxx
 xxxx > pp_dpm_sclk" whose operation is more user-friendly
and convinent and can offer more values;
2. be compatible with former design like "xx".
3. add DOC: pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie
Bug:KFD-385

Signed-off-by: welu <wei.lu2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders
Nicolai Hähnle [Thu, 12 Apr 2018 14:34:19 +0000 (16:34 +0200)]
drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders

Otherwise, the SQ may skip some of the register writes, or shader waves may
be allocated where we don't expect them, so that as a result we don't actually
reset all of the register SRAMs. This can lead to spurious ECC errors later on
if a shader uses an uninitialized register.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amdgpu: bo could be null when access in vm bo update
Junwei Zhang [Mon, 23 Apr 2018 09:21:21 +0000 (17:21 +0800)]
drm/amdgpu: bo could be null when access in vm bo update

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Enable scatter gather display support
Samuel Li [Wed, 18 Apr 2018 20:15:52 +0000 (16:15 -0400)]
drm/amdgpu: Enable scatter gather display support

Enables sg display if vram size <= THRESHOLD(256M); otherwise
still use vram as display buffer.
This patch fixed some potention issues introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto.
v3: Move some logic from amdgpu_display_framebuffer_domains()
    to pin function, suggested by Christian.
v4: Split into several patches.
v5: Drop module parameter for now.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay: actually return the power with the new query
Alex Deucher [Sat, 21 Apr 2018 19:09:59 +0000 (14:09 -0500)]
drm/amdgpu/powerplay: actually return the power with the new query

Set query to the power value so we actually return it.  Fixes
no power value returned on asics with the new query.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Print out voltage/clock range in sysfs
Rex Zhu [Thu, 19 Apr 2018 02:39:17 +0000 (10:39 +0800)]
drm/amd/pp: Print out voltage/clock range in sysfs

when user cat pp_od_clk_voltage
add display info about the sclk/mclk/vddc range that user can overdrive
output as:
OD_SCLK:
0:        300MHz        900mV
1:        400MHz        912mV
2:        500MHz        925mV
3:        600MHz        937mV
4:        700MHz        950mV
5:        800MHz        975mV
6:        900MHz        987mV
7:       1000MHz       1000mV
OD_MCLK:
0:        300MHz        900mV
1:       1500MHz        912mV
OD_RANGE:
SCLK:     300MHz       1200MHz
MCLK:     300MHz       1500MHz
VDDC:     700mV        1200mV

also
1. remove unnecessary whitespace before a quoted newline
2. change unit of frequency Mhz to MHz

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Change voltage/clk range for OD feature on VI
Rex Zhu [Wed, 18 Apr 2018 13:09:35 +0000 (21:09 +0800)]
drm/amd/pp: Change voltage/clk range for OD feature on VI

read vddc range from vbios.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Refine the OD state checking code in smu7
Rex Zhu [Wed, 18 Apr 2018 10:43:19 +0000 (18:43 +0800)]
drm/amd/pp: Refine the OD state checking code in smu7

if vddc restore to default value, driver clear the
bit of DPMTABLE_OD_UPDATE_VDDC and need to repopulate sclk
and mclk table.

1. Remove variable i checking code.
2. move clear DPMTABLE_OD_UPDATE_VDDC bit to the end of the
   function to avoid sclk table will not be updated.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Use dynamic gfx_clk rather than hardcoded values
Rex Zhu [Fri, 20 Apr 2018 05:03:15 +0000 (13:03 +0800)]
drm/amd/pp: Use dynamic gfx_clk rather than hardcoded values

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Change pstate_clk frequency unit to 10KHz on Rv
Rex Zhu [Fri, 20 Apr 2018 04:57:10 +0000 (12:57 +0800)]
drm/amd/pp: Change pstate_clk frequency unit to 10KHz on Rv

to keep consistent with other asics

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_od_clk_voltage
Alex Deucher [Thu, 19 Apr 2018 19:59:55 +0000 (14:59 -0500)]
drm/amdgpu/pm: document pp_od_clk_voltage

sysfs interface for fine grained clock and voltage control.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_power_profile_mode
Alex Deucher [Thu, 19 Apr 2018 19:38:31 +0000 (14:38 -0500)]
drm/amdgpu/pm: document pp_power_profile_mode

sysfs file for adjusting power level heuristics.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie (v2)
Alex Deucher [Thu, 19 Apr 2018 19:22:24 +0000 (14:22 -0500)]
drm/amdgpu/pm: document pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie (v2)

Used for manually masking dpm states.

v2: drop comment about current state (Rex)

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_table
Alex Deucher [Thu, 19 Apr 2018 19:02:52 +0000 (14:02 -0500)]
drm/amdgpu/pm: document pp_table

This file is for uploading new powerplay tables.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document power_dpm_state
Alex Deucher [Thu, 19 Apr 2018 18:56:41 +0000 (13:56 -0500)]
drm/amdgpu/pm: document power_dpm_state

This is a legacy file and is only provided for
backwards compatibility.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document power_dpm_force_performance_level
Alex Deucher [Thu, 19 Apr 2018 18:46:03 +0000 (13:46 -0500)]
drm/amdgpu/pm: document power_dpm_force_performance_level

Provide documentation for power_dpm_force_performance_level
which is used to adjust things related to GPU power states.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Remove VRAM from shared bo domains.
Samuel Li [Wed, 18 Apr 2018 20:26:18 +0000 (16:26 -0400)]
drm/amdgpu: Remove VRAM from shared bo domains.

This fixes an issue introduced by change "allow framebuffer in GART
memory as well" which could lead to a shared buffer ending up
pinned in vram.  Use GTT if it is included in the domain, otherwise
return an error.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Rename amdgpu_display_framebuffer_domains()
Samuel Li [Wed, 18 Apr 2018 19:06:02 +0000 (15:06 -0400)]
drm/amdgpu: Rename amdgpu_display_framebuffer_domains()

It returns supported domains for display, and domains actually used are to be
decided later when pinned.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: use the flag to decide whether send gfxoff smc message
Huang Rui [Thu, 14 Dec 2017 07:33:53 +0000 (15:33 +0800)]
drm/amd/powerplay: use the flag to decide whether send gfxoff smc message

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set CGPG if gfxoff is enabled for raven
Huang Rui [Fri, 15 Dec 2017 06:34:57 +0000 (14:34 +0800)]
drm/amdgpu: set CGPG if gfxoff is enabled for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix to disable powergating in hw_fini
Huang Rui [Tue, 27 Feb 2018 05:43:59 +0000 (13:43 +0800)]
drm/amdgpu: fix to disable powergating in hw_fini

We need enable CGPG and GFXOFF together. If only enable one of them, this system
will get hang after startx (do draw command). So when gfxoff is disabled, it
also need disable CGPG after that.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: it should disable gfxoff when system is going to suspend
Huang Rui [Tue, 13 Mar 2018 10:39:48 +0000 (18:39 +0800)]
drm/amdgpu: it should disable gfxoff when system is going to suspend

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add control gfxoff enabling in late init
Huang Rui [Tue, 13 Mar 2018 10:32:39 +0000 (18:32 +0800)]
drm/amd/powerplay: add control gfxoff enabling in late init

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: clear gfxoff feature mask if the asic is not raven
Huang Rui [Tue, 13 Mar 2018 09:59:12 +0000 (17:59 +0800)]
drm/amdgpu: clear gfxoff feature mask if the asic is not raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use pp_feature member to store the mask
Huang Rui [Tue, 27 Feb 2018 13:53:00 +0000 (21:53 +0800)]
drm/amdgpu: use pp_feature member to store the mask

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: enable/disable gfxoff through smu
Huang Rui [Fri, 2 Mar 2018 07:18:54 +0000 (15:18 +0800)]
drm/amd/powerplay: enable/disable gfxoff through smu

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add gfx off control function
Huang Rui [Fri, 2 Mar 2018 07:10:52 +0000 (15:10 +0800)]
drm/amd/powerplay: add gfx off control function

gfx_off_control is used to be called for sending enabling/disabling gfxoff
message.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set gfxoff disabled by default
Huang Rui [Fri, 2 Mar 2018 06:40:53 +0000 (14:40 +0800)]
drm/amdgpu: set gfxoff disabled by default

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add gfxoff feature mask
Huang Rui [Fri, 2 Mar 2018 06:16:06 +0000 (14:16 +0800)]
drm/amdgpu: add gfxoff feature mask

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move PP_FEATURE_MASK to amd_shared header
Huang Rui [Tue, 13 Mar 2018 07:13:46 +0000 (15:13 +0800)]
drm/amdgpu: move PP_FEATURE_MASK to amd_shared header

It will be used not only for powerplay but also on amdgpu part in future
patches. So move it into amd_shared header file.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: send CGPG smc message if PG is enabled for raven
Huang Rui [Thu, 14 Dec 2017 05:38:13 +0000 (13:38 +0800)]
drm/amd/powerplay: send CGPG smc message if PG is enabled for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add setting powergating method for gfx9
Huang Rui [Wed, 6 Dec 2017 01:23:50 +0000 (09:23 +0800)]
drm/amdgpu: add setting powergating method for gfx9

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: revise init_rlc_save_restore_list behavior to support latest register_lis...
Huang Rui [Thu, 21 Dec 2017 08:13:02 +0000 (16:13 +0800)]
drm/amdgpu: revise init_rlc_save_restore_list behavior to support latest register_list_format/register_restore table

RLC save/restore list will be used on CGPG and GFXOFF function, it loads two bin
table of register_list_format/register_restore in RLC firmware.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cleanup init power gating function
Huang Rui [Thu, 21 Dec 2017 07:48:27 +0000 (15:48 +0800)]
drm/amdgpu: cleanup init power gating function

Remove gfx_v9_0_enable_sck_slow_down_on_power_up/down and CP power gating
enabling functions because they only need to be called on setting power gating
behavior. We keep it in set_powergating callback to enable/disable PG in
late_init.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: enter rlc safe mode before set cgpg
Huang Rui [Thu, 21 Dec 2017 07:03:31 +0000 (15:03 +0800)]
drm/amdgpu: enter rlc safe mode before set cgpg

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add save restore list cntl gpm and srm firmware support
Huang Rui [Mon, 22 Jan 2018 12:48:14 +0000 (20:48 +0800)]
drm/amdgpu: add save restore list cntl gpm and srm firmware support

RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff
function.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add new rlc firmware header format v2.1
Huang Rui [Mon, 22 Jan 2018 09:51:35 +0000 (17:51 +0800)]
drm/amdgpu: add new rlc firmware header format v2.1

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update psp gfx if header
Huang Rui [Tue, 5 Dec 2017 10:48:48 +0000 (18:48 +0800)]
drm/amdgpu: update psp gfx if header

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add registry key to disable ACG
Kenneth Feng [Fri, 20 Apr 2018 05:55:39 +0000 (13:55 +0800)]
drm/amd/powerplay: add registry key to disable ACG

For the dummy ACG fuses,need to disable ACG, otherwise
corruption will be caused.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: print DMA-buf status in debugfs
Christian König [Sun, 25 Mar 2018 08:10:25 +0000 (10:10 +0200)]
drm/amdgpu: print DMA-buf status in debugfs

Just note if a BO was imported/exported.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: header file interface to SMU update
Kenneth Feng [Tue, 17 Apr 2018 13:49:51 +0000 (21:49 +0800)]
drm/amd/powerplay: header file interface to SMU update

update vega12 smu interface.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: simplify bo_va list when vm bo update (v2)
Junwei Zhang [Thu, 19 Apr 2018 05:17:26 +0000 (13:17 +0800)]
drm/amdgpu: simplify bo_va list when vm bo update (v2)

v2: fix compiling warning

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: init gfx9 aperture settings
Flora Cui [Wed, 18 Apr 2018 09:12:19 +0000 (17:12 +0800)]
drm/amdgpu: init gfx9 aperture settings

fix settings.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix NULL point check error in smu_set_watermarks_for_clocks_ranges
Rex Zhu [Thu, 19 Apr 2018 04:40:15 +0000 (12:40 +0800)]
drm/amd/pp: Fix NULL point check error in smu_set_watermarks_for_clocks_ranges

It is caused by
'commit d6c9a7dc86cd ("drm/amd/pp: Move common code to smu_helper.c")'

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix list not initialized
Chunming Zhou [Wed, 18 Apr 2018 10:35:09 +0000 (18:35 +0800)]
drm/amdgpu: fix list not initialized

Otherwise, cpu stuck for 22s with kernel panic.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences
Marek Olšák [Tue, 3 Apr 2018 17:05:03 +0000 (13:05 -0400)]
drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences

There is a new IB flag that enables this new behavior.
Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense
when draw calls from two adjacent gfx IBs run in parallel. This will be
the new default for Mesa.

v2: bump the version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: handle domain mask checking v2
Chunming Zhou [Tue, 17 Apr 2018 10:34:40 +0000 (18:34 +0800)]
drm/amdgpu: handle domain mask checking v2

if domain is illegal, we should return error.
v2:
  remove duplicated domain checking.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set preferred_domain independent of fallback handling
Chunming Zhou [Tue, 17 Apr 2018 03:52:53 +0000 (11:52 +0800)]
drm/amdgpu: set preferred_domain independent of fallback handling

When GEM needs to fallback to GTT for VRAM BOs we still want the
preferred domain to be untouched so that the BO has a cance to move back
to VRAM in the future.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2
Christian König [Tue, 17 Apr 2018 12:47:42 +0000 (14:47 +0200)]
drm/amdgpu: limit reg_write_reg_wait workaround to SRIOV v2

Turned out that this locks up some bare metal Vega10.

v2: fix stupid typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: move last_sched fence updating prior to job popping (v2)
Pixel Ding [Wed, 18 Apr 2018 08:37:40 +0000 (04:37 -0400)]
drm/scheduler: move last_sched fence updating prior to job popping (v2)

Make sure main thread won't update last_sched fence when entity
is cleanup.

Fix a racing issue which is caused by putting last_sched fence
twice. Running vulkaninfo in tight loop can produce this issue
as seeing wild fence pointer.

v2: squash in build fix (Christian)

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: always put last_sched fence in entity_fini
Pixel Ding [Wed, 18 Apr 2018 08:33:26 +0000 (04:33 -0400)]
drm/scheduler: always put last_sched fence in entity_fini

Fix the potential memleak since scheduler main thread always
hold one last_sched fence.

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: print the vbios version in the debugfs firmware info
Alex Deucher [Tue, 17 Apr 2018 13:55:44 +0000 (08:55 -0500)]
drm/amdgpu: print the vbios version in the debugfs firmware info

Useful for info gathering about what firmwares are in use in
the driver.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix bug voltage can't be OD separately on VI
Rex Zhu [Tue, 17 Apr 2018 09:26:26 +0000 (17:26 +0800)]
drm/amd/pp: Fix bug voltage can't be OD separately on VI

Make sure to update the MCLK and SCLK flags when setting the VDDC
flags due to dependencies.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove dead interface
Rex Zhu [Fri, 13 Apr 2018 08:16:49 +0000 (16:16 +0800)]
drm/amd/pp: Remove dead interface

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Reserved vram for smu to save debug info.
Rex Zhu [Fri, 13 Apr 2018 08:13:41 +0000 (16:13 +0800)]
drm/amdgpu: Reserved vram for smu to save debug info.

v2: check reserved vram size before allocate.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use amdgpu_bo_param for amdgpu_bo_create v2
Chunming Zhou [Mon, 16 Apr 2018 10:27:50 +0000 (18:27 +0800)]
drm/amdgpu: use amdgpu_bo_param for amdgpu_bo_create v2

After that, we can easily add new parameter when need.

v2:
a) rebase.
b) Initialize struct amdgpu_bo_param, future new
member could only be used in some one case, but all member
should have its own initial value.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com> (v1)
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Cc: christian.koenig@amd.com
Cc: Felix.Kuehling@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add amdgpu_bo_param
Chunming Zhou [Mon, 16 Apr 2018 09:57:19 +0000 (17:57 +0800)]
drm/amdgpu: add amdgpu_bo_param

amdgpu_bo_create has too many parameters, and used in
too many places. Collect them to one structure.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Use dig enable to determine fast boot optimization.
Yongqiang Sun [Mon, 9 Apr 2018 20:15:20 +0000 (16:15 -0400)]
drm/amd/display: Use dig enable to determine fast boot optimization.

Linux doesn't know lid state, better to check dig enable
value from register.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add missing colorspace for set black color
Yue Hin Lau [Mon, 9 Apr 2018 18:46:32 +0000 (14:46 -0400)]
drm/amd/display: add missing colorspace for set black color

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add calculated clock logging to DTN
Dmytro Laktyushkin [Wed, 4 Apr 2018 20:03:38 +0000 (16:03 -0400)]
drm/amd/display: add calculated clock logging to DTN

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add rq/dlg/ttu to dtn log
Dmytro Laktyushkin [Thu, 29 Mar 2018 12:43:02 +0000 (08:43 -0400)]
drm/amd/display: add rq/dlg/ttu to dtn log

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Check SCRATCH reg to determine S3 resume.
Yongqiang Sun [Sat, 7 Apr 2018 01:38:10 +0000 (21:38 -0400)]
drm/amd/display: Check SCRATCH reg to determine S3 resume.

Use lid state only to determine fast boot optimization is not enough.
For S3/Resume, due to bios isn't involved in boot, eDP wasn't
light up, while lid state is open, if do fast boot optimization,
eDP panel will skip enable link and result in black screen after boot.
And becasue of bios isn't involved, no matter UEFI or Legacy boot,
BIOS_SCRATCH_3 value should be 0, use this to determine the case.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: HDMI has no sound after Panel power off/on
Charlene Liu [Sat, 7 Apr 2018 03:03:12 +0000 (23:03 -0400)]
drm/amd/display: HDMI has no sound after Panel power off/on

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move DCC support functions into dchubbub
Eric Bernstein [Thu, 5 Apr 2018 21:09:20 +0000 (17:09 -0400)]
drm/amd/display: Move DCC support functions into dchubbub

Added dchububu.h header file for common enum/struct definitions.
Added new interface functions get_dcc_compression_cap,
dcc_support_swizzle, dcc_support_pixel_format.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Do not create memory allocation if stats not enabled
Anthony Koo [Fri, 6 Apr 2018 16:07:19 +0000 (12:07 -0400)]
drm/amd/display: Do not create memory allocation if stats not enabled

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Check lid state to determine fast boot optimization.
Yongqiang Sun [Wed, 4 Apr 2018 21:27:18 +0000 (17:27 -0400)]
drm/amd/display: Check lid state to determine fast boot optimization.

For legacy enable boot up with lid closed, eDP information couldn't be
read correctly via SBIOS_SCRATCH_3 results in eDP cannot be light up
properly when open lid.
Check lid state instead can resolve the issue.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: change dml init to use default structs
Dmytro Laktyushkin [Fri, 23 Mar 2018 19:25:43 +0000 (15:25 -0400)]
drm/amd/display: change dml init to use default structs

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix segfault on insufficient TG during validation
Dmytro Laktyushkin [Thu, 29 Mar 2018 20:39:10 +0000 (16:39 -0400)]
drm/amd/display: fix segfault on insufficient TG during validation

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix regamma not affecting full-intensity color values
Leo (Sunpeng) Li [Tue, 3 Apr 2018 20:07:16 +0000 (16:07 -0400)]
drm/amd/display: Fix regamma not affecting full-intensity color values

Hardware understands the regamma LUT as a piecewise linear function,
with points spaced exponentially along the range. We previously
programmed the LUT for range [2^-10, 2^0). This causes (normalized)
color values of 1 (=2^0) to miss the programmed LUT, and fall onto the
end region.

For DCE, the end region is extrapolated using a single (base, slope)
pair, using the max y-value from the last point in the curve as base.
This presents a problem, since this value affects all three color
channels. Scaling down the intensity of say - the blue regamma curve -
will not affect it's end region. This is especially noticiable when
using RedShift. It scales down the blue and green channels, but leaves
full-intensity colors unshifted.

Therefore, extend the range to cover [2^-10, 2^1) by programming another
hardware segment, containing only one point. That way, we won't be
hitting the end region.

Note that things are a bit different for DCN, since the end region can
be set per-channel.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move dp_pixel_encoding_type to stream_encoder include
Eric Bernstein [Tue, 3 Apr 2018 15:23:11 +0000 (11:23 -0400)]
drm/amd/display: Move dp_pixel_encoding_type to stream_encoder include

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix brightness level after resume from suspend
Roman Li [Thu, 29 Mar 2018 14:56:17 +0000 (10:56 -0400)]
drm/amd/display: fix brightness level after resume from suspend

Adding missing call to cache current backlight values.
Otherwise the brightness resets to default value on resume.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.42
Eric Yang [Tue, 3 Apr 2018 15:36:14 +0000 (11:36 -0400)]
drm/amd/display: dal 3.1.42

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>