openwrt/staging/blogic.git
9 years agoMIPS: Alchemy: Migrate to new 'set-state' interface
Viresh Kumar [Mon, 6 Jul 2015 11:11:52 +0000 (16:41 +0530)]
MIPS: Alchemy: Migrate to new 'set-state' interface

Migrate alchemy driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in the ->set_mode() callback. So, this patch
doesn't provide any set-state callbacks.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: linaro-kernel@lists.linaro.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Patchwork: https://patchwork.linux-mips.org/patch/10599/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Kconfig: Separate 32BIT and 64BIT config block by blank line.
Ralf Baechle [Thu, 23 Jul 2015 10:02:09 +0000 (12:02 +0200)]
MIPS: Kconfig: Separate 32BIT and 64BIT config block by blank line.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: math-emu: Move from deprecated __initcall to arch_initcall.
Ralf Baechle [Mon, 20 Jul 2015 07:10:20 +0000 (09:10 +0200)]
MIPS: math-emu: Move from deprecated __initcall to arch_initcall.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Lasat: Move from deprecated __initcall to arch_initcall.
Ralf Baechle [Mon, 20 Jul 2015 07:09:40 +0000 (09:09 +0200)]
MIPS: Lasat: Move from deprecated __initcall to arch_initcall.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: unaligned: Move from deprecated __initcall to arch_initcall.
Ralf Baechle [Mon, 20 Jul 2015 07:04:41 +0000 (09:04 +0200)]
MIPS: unaligned: Move from deprecated __initcall to arch_initcall.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Sibyte: Move bus watcher from deprecated __initcall to device_initcall
Ralf Baechle [Mon, 20 Jul 2015 06:58:20 +0000 (08:58 +0200)]
MIPS: Sibyte: Move bus watcher from deprecated __initcall to device_initcall

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Rearrange ENTRYLO field definitions
James Hogan [Wed, 15 Jul 2015 15:17:47 +0000 (16:17 +0100)]
MIPS: Rearrange ENTRYLO field definitions

The generic field definitions (i.e. present before MIPS32/MIPS64) in
mipsregs.h are conventionally not prefixed with MIPS_, so rename the
recently added MIPS_ENTRYLO_* definitions for the G, V, D, and C fields
to ENTRYLO_*. Also rearrange to put the EntryLo and EntryHi definitions
in the right place in the file.

Fixes: 8ab6abcb6aa4 ("MIPS: mipsregs.h: Add EntryLo bit definitions")
Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10725/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: dump_tlb: Dump FrameMask register if exists
James Hogan [Wed, 15 Jul 2015 15:17:46 +0000 (16:17 +0100)]
MIPS: dump_tlb: Dump FrameMask register if exists

The FrameMask register is relevant to the TLB so it should be dumped by
dump_tlb_regs(), however it is only present in certain cores (r10000,
r12000, r14000, r16000). Add dumping of it, conditional upon
current_cpu_type().

Suggested-by: Joshua Kinard <kumba@gentoo.org>
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10724/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: dump_tlb: Only dump PageGrain if interesting
James Hogan [Wed, 15 Jul 2015 15:17:45 +0000 (16:17 +0100)]
MIPS: dump_tlb: Only dump PageGrain if interesting

The PageGrain register may not exist if certain architectural features
aren't present, therefore only print out its value when dumping the TLB
registers if it is expected to contain fields relevant to the TLB.

Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Reported-by: Joshua Kinard <kumba@gentoo.org>
Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Joshua Kinard <kumba@gentoo.org>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10723/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Probe for small (1KiB) page support
James Hogan [Wed, 15 Jul 2015 15:17:44 +0000 (16:17 +0100)]
MIPS: Probe for small (1KiB) page support

Probe Config3 for small page support. This will be useful to give clues
as to whether the PageGrain register exists.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10722/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Refactor dumping of TLB registers for r3k/r4k
James Hogan [Wed, 15 Jul 2015 15:17:43 +0000 (16:17 +0100)]
MIPS: Refactor dumping of TLB registers for r3k/r4k

The TLB registers are dumped in a couble of places:
 - sysrq_tlbdump_single() - when dumping TLB state.
 - do_mcheck() - in response to a machine check error.

The main TLB registers also differ between r3k and r4k, but r4k appears
to be assumed.

Refactor this code into a dump_tlb_regs() function, implemented for both
r3k and r4k, and used by both of the above functions.

Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10721/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoDocumentation/sysrq.txt: Mention MIPS TLB dump (x)
James Hogan [Wed, 15 Jul 2015 15:17:42 +0000 (16:17 +0100)]
Documentation/sysrq.txt: Mention MIPS TLB dump (x)

Commit d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all
CPUs") added the 'x' sysrq key for dumping MIPS TLB entries, but didn't
document it in Documentation/sysrq.txt.

Add mention of the MIPS use of the 'x' SysRq key.

Reported-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Jonathan Corbet <corbet@lwn.net>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-doc@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10720/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions
Markos Chandras [Fri, 17 Jul 2015 09:38:32 +0000 (10:38 +0100)]
MIPS: math-emu: Emulate missing BC1{EQ,NE}Z instructions

Commit c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
added support for emulating the new R6 BC1{EQ,NE}Z branches but it missed
the case where the instruction that caused the exception was not on a DS.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
Cc: <stable@vger.kernel.org> # 4.0+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10738/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: math-emu: Allow m{f,t}hc emulation on MIPS R6
Markos Chandras [Fri, 17 Jul 2015 09:36:03 +0000 (10:36 +0100)]
MIPS: math-emu: Allow m{f,t}hc emulation on MIPS R6

The mfhc/mthc instructions are supported on MIPS R6 so emulate
them if needed.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # 4.0+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10737/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: math-emu: Fix indentation
Markos Chandras [Thu, 16 Jul 2015 15:43:33 +0000 (16:43 +0100)]
MIPS: math-emu: Fix indentation

Fix indentation for the final 'else' blocks.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10735/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: cp1emu: Fix closing bracket for the d_fmt case
Markos Chandras [Thu, 16 Jul 2015 13:06:45 +0000 (14:06 +0100)]
MIPS: cp1emu: Fix closing bracket for the d_fmt case

The double format (d_fmt) case uses an opening bracket which then
closes at the end of the word format (w_fmt). This can be rather confusing
so add the closing bracket at the end of the d_fmt case and use another one
for the w_fmt one.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10733/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Kconfig: Drop the EXPERIMENTAL tag from MIPS R6
Markos Chandras [Thu, 16 Jul 2015 12:24:46 +0000 (13:24 +0100)]
MIPS: Kconfig: Drop the EXPERIMENTAL tag from MIPS R6

The MIPS R6 ISA support has been part of mainline since v4.0
and it should be in a good shape nowadays so it is not an
experimental feature anymore.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10731/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Treat CP1 control registers as unsigned ints.
Ralf Baechle [Wed, 15 Jul 2015 09:48:15 +0000 (11:48 +0200)]
MIPS: Treat CP1 control registers as unsigned ints.

These are bitfields and treating them as signed values doesn't make
any sense.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Chris Packham <judge.packham@gmail.com>
9 years agoMIPS: Use unsigned int when reading CP0 registers
Chris Packham [Tue, 14 Jul 2015 22:44:30 +0000 (10:44 +1200)]
MIPS: Use unsigned int when reading CP0 registers

Update __read_32bit_c0_register() and __read_32bit_c0_ctrl_register() to
use "unsigned int res;" instead of "int res;". There is little reason to
treat these register values as signed. They are either counters (which
by definition are unsigned) or are made up of various bit fields to be
interpreted as per the CPU datasheet.

This has come up via u-boot[1] which sync's asm/mipsregs.h with the
kernel. In u-boots case the value read from read_c0_count() is assigned
to an unsigned long [2] which triggers a sign extension and causes a
bug.

U-boot should probably be more explicit about the types used for the
timer_read_counter() API but that aside is there any reason to treat
these values as signed integers? A quick grep around the arch/mips makes
me thing that there may be some bugs lurking when read_c0_count() starts
to yield a negative value but I haven't really explored any of them.

[1] - http://lists.denx.de/pipermail/u-boot/2015-July/219086.html
[2] - http://git.denx.de/?p=u-boot.git;a=blob;f=arch/mips/cpu/time.c#l11

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10718/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: malta: Use generic platform_maar_init
Paul Burton [Fri, 10 Jul 2015 15:52:39 +0000 (16:52 +0100)]
MIPS: malta: Use generic platform_maar_init

The default implementation of platform_maar_init is sufficient for Malta
boards where we want to allow speculation in the regions of memory
corresponding to DDR & disallow it elsewhere. Drop the custom
implementation such that the default is used, reducing the duplication
of information provided by the Malta platform code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10677/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mm: default platform_maar_init using bootmem data
Paul Burton [Fri, 10 Jul 2015 15:52:38 +0000 (16:52 +0100)]
MIPS: mm: default platform_maar_init using bootmem data

Introduce a default weak implementation of platform_maar_init which
makes use of the data that platforms already provide to the bootmem
allocator. This should hopefully cover the most common configurations,
reduce the duplication of information provided by platforms & leaves
platforms with the option of providing a custom implementation if
required.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Patchwork: https://patchwork.linux-mips.org/patch/10676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: MSA unaligned memory access support
Leonid Yegoshin [Mon, 22 Jun 2015 11:21:00 +0000 (12:21 +0100)]
MIPS: MSA unaligned memory access support

The MSA architecture specification allows for hardware to not implement
unaligned vector memory accesses in some or all cases. A typical example
of this is the I6400 core which does not implement unaligned vector
memory access when the memory crosses a page boundary. The architecture
also requires that such memory accesses complete successfully as far as
userland is concerned, so the kernel is required to emulate them.

This patch implements support for emulating unaligned MSA ld & st
instructions by copying between the user memory & the tasks FP context
in struct thread_struct, updating hardware registers from there as
appropriate in order to avoid saving & restoring the entire vector
context for each unaligned memory access.

Tested both using an I6400 CPU and with a QEMU build hacked to produce
AdEL exceptions for unaligned vector memory accesses.

[paul.burton@imgtec.com:
  - Remove #ifdef's
  - Move msa_op into enum major_op rather than #define
  - Replace msa_{to,from}_wd with {read,write}_msa_wr_{b,h,w,l} and the
    format-agnostic wrappers, removing the custom endian mangling for
    big endian systems.
  - Restructure the msa_op case in emulate_load_store_insn to share
    more code between the load & store cases.
  - Avoid the need for a temporary union fpureg on the stack by simply
    reusing the already suitably aligned context in struct
    thread_struct.
  - Use sizeof(*fpr) rather than hardcoding 16 as the size for user
    memory checks & copies.
  - Stop recalculating the address of the unaligned vector memory access
    and rely upon the value read from BadVAddr as we do for other
    unaligned memory access instructions.
  - Drop the now unused val8 & val16 fields in union fpureg.
  - Rewrite commit message.
  - General formatting cleanups.]

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-kernel@vger.kernel.org
Cc: Jie Chen <chenj@lemote.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10573/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Introduce accessors for MSA vector registers
Paul Burton [Mon, 22 Jun 2015 11:20:59 +0000 (12:20 +0100)]
MIPS: Introduce accessors for MSA vector registers

Introduce accessor functions allowing the kernel to access arbitrary
vector registers using an arbitrary data format. The accessors are
implemented in assembly, using macros to avoid massive duplication, in
order to make use of the existing support for MSA with & without
toolchain support. The accessors will be used in a later patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10572/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Declare MSA MI10 instruction formats
Leonid Yegoshin [Mon, 22 Jun 2015 11:20:58 +0000 (12:20 +0100)]
MIPS: Declare MSA MI10 instruction formats

Declare a struct describing the MSA MI10 instruction format used for ld &
st instructions, for use by subsequent patches.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10571/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove "__weak" definition from arch-specific linkage.h
Bjorn Helgaas [Sun, 12 Jul 2015 23:12:03 +0000 (18:12 -0500)]
MIPS: Remove "__weak" definition from arch-specific linkage.h

"__weak" is defined in include/linux/compiler-gcc.h.  We shouldn't need an
arch-specific definition.

Remove the "__weak" definition from arch/mips/include/asm/linkage.h.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10689/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove "weak" from mips_cdmm_phys_base() declaration
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:54 +0000 (18:11 -0500)]
MIPS: Remove "weak" from mips_cdmm_phys_base() declaration

Weak header file declarations are error-prone because they make every
definition weak, and the linker chooses one based on link order (see
10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
decl")).

mips_cdmm_phys_base() is defined only in arch/mips/mti-malta/malta-memory.c
so there's no problem with multiple definitions.  But it works better to
have a weak default implementation and allow a strong function to override
it.  Then we don't have to test whether a definition is present, and if
there are ever multiple strong definitions, we get a link error instead of
calling a random definition.

Add a weak mips_cdmm_phys_base() definition and remove the weak annotation
from the declaration in arch/mips/include/asm/cdmm.h.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10688/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove "weak" from get_c0_fdc_int() declaration
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:46 +0000 (18:11 -0500)]
MIPS: Remove "weak" from get_c0_fdc_int() declaration

Weak header file declarations are error-prone because they make every
definition weak, and the linker chooses one based on link order (see
10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
decl")).

The most elegant solution is to have a weak default implementation and
allow a strong function to override it.  Then we don't have to test
whether a definition is present, and if there are ever multiple strong
definitions, we get a link error instead of calling a random definition.

Add a weak get_c0_fdc_int() definition with the default code and remove the
weak annotation from the declaration.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10687/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove "weak" from get_c0_compare_int() declaration
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:38 +0000 (18:11 -0500)]
MIPS: Remove "weak" from get_c0_compare_int() declaration

Weak header file declarations are error-prone because they make every
definition weak, and the linker chooses one based on link order (see
10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
decl")).

get_c0_compare_int() is defined in several files.  Each definition is weak,
so I assume Kconfig prevents two or more from being included.  The caller
contains default code used when get_c0_compare_int() isn't defined at all.

Add a weak get_c0_compare_int() definition with the default code and remove
the weak annotation from the declaration.

Then the platform implementations will be strong and will override the weak
default.  If multiple platforms are ever configured in, we'll get a link
error instead of calling a random platform's implementation.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10686/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: MT: Remove "weak" from vpe_run() declaration
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:20 +0000 (18:11 -0500)]
MIPS: MT: Remove "weak" from vpe_run() declaration

Weak header file declarations are error-prone because they make every
definition weak, and the linker chooses one based on link order (see
10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
decl")).

That's not a problem for vpe_run() because Kconfig ensures there's never
more than one definition:

  - vpe_run() is defined in arch/mips/kernel/vpe-mt.c if
    CONFIG_MIPS_VPE_LOADER_MT=y

  - vpe_run() is defined in arch/mips/mti-malta/malta-amon.c if
    CONFIG_MIPS_CMP=y

  - CONFIG_MIPS_VPE_LOADER_MT cannot be set if CONFIG_MIPS_CMP=y

But it's simpler to verify correctness if we remove "weak" from the picture
and test the config symbols directly.

Remove "weak" from the vpe_run() declaration and use #if to test whether a
definition should be present.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10684/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: VPE: Exit vpe_release() early if vpe_run() isn't defined
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:12 +0000 (18:11 -0500)]
MIPS: VPE: Exit vpe_release() early if vpe_run() isn't defined

vpe_run() is a weak symbol.  If there's no definition of it, its value is
zero.

If vpe_run is zero, return failure early.  We're going to fail anyway, so
there's no point in getting a VPE and attempting to load it.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10683/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove "weak" from platform_maar_init() declaration
Bjorn Helgaas [Sun, 12 Jul 2015 23:11:04 +0000 (18:11 -0500)]
MIPS: Remove "weak" from platform_maar_init() declaration

Weak header file declarations are error-prone because they make every
definition weak, and the linker chooses one based on link order (see
10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
decl")).

platform_maar_init() is defined in:

  - arch/mips/mm/init.c (where it is marked "weak")
  - arch/mips/mti-malta/malta-memory.c (without annotation)

The "weak" attribute on the platform_maar_init() extern declaration applies
to the platform-specific definition in arch/mips/mti-malta/malta-memory.c,
so both definitions are weak, and which one we get depends on link order.

Remove the "weak" attribute from the declaration.  That makes the malta
definition strong, so it will always be preferred if it is present.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: linux-mips@linux-mips.org
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10682/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CPC: Remove "weak" from mips_cpc_phys_base() and make it static
Bjorn Helgaas [Sun, 12 Jul 2015 23:10:56 +0000 (18:10 -0500)]
MIPS: CPC: Remove "weak" from mips_cpc_phys_base() and make it static

There's only one implementation of mips_cpc_phys_base(), and it's only used
within the same file, so it doesn't need to be weak, and it doesn't need an
extern declaration.

Remove the extern mips_cpc_phys_base() declaration and make it static.

[ralf@linux-mips.org: Fixed conflict.]

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: linux-mips@linux-mips.org
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10681/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Drop CONFIG_RUNTIME_DEBUG & debug.h
Paul Burton [Mon, 13 Jul 2015 16:14:22 +0000 (17:14 +0100)]
MIPS: Drop CONFIG_RUNTIME_DEBUG & debug.h

The debug.h header provided some MIPS-specific debug macros, which are
no longer used at all. Remove them.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10693/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ops-emma2rh: Drop nonsensical db_assert
Paul Burton [Mon, 13 Jul 2015 16:14:21 +0000 (17:14 +0100)]
MIPS: ops-emma2rh: Drop nonsensical db_assert

The db_assert call checks whether the bus_num pointer is non-NULL, but
does so after said pointer has been dereferenced by the assignment on
the previous line. Thus the check is pointless & likely to have been
optimised out by the compiler anyway. The check_args function is static
& only ever called from the local file with bus_num being a pointer to
an on-stack variable, so the check seems somewhat overzealous anyway.
Simply remove it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10692/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: rt3883: Prepare rt3883_pci_irq_handler for irq argument removal
Thomas Gleixner [Mon, 13 Jul 2015 20:46:10 +0000 (20:46 +0000)]
MIPS: rt3883: Prepare rt3883_pci_irq_handler for irq argument removal

The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.

Search and update was done with coccinelle and the invaluable help of
Julia Lawall.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: netlogic: Prepare ipi handlers for irq argument removal
Thomas Gleixner [Mon, 13 Jul 2015 20:46:09 +0000 (20:46 +0000)]
MIPS: netlogic: Prepare ipi handlers for irq argument removal

The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.

Search and update was done with coccinelle and the invaluable help of
Julia Lawall.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: octeon: Replace the homebrewn flow handler
Thomas Gleixner [Mon, 13 Jul 2015 20:46:07 +0000 (20:46 +0000)]
MIPS: octeon: Replace the homebrewn flow handler

The gpio interrupt handling of octeon contains a homebrewn flow
handler which calls either handle_level_irq or handle_edge_irq
depending on the trigger type. Thats an extra conditional and call in
the interrupt handling path. The proper way to handle different types
and therefor different flows is to update the handler in the
irq_set_type() callback.

Remove the extra indirection and add the handler update to
octeon_irq_ciu_gpio_set_type(). At mapping time it defaults to
handle_level_irq which gets updated if the device tree contains a
different trigger type.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: David Daney <david.daney@cavium.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10704/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ath91: Remove pointless irqdisable/enable
Thomas Gleixner [Mon, 13 Jul 2015 20:46:06 +0000 (20:46 +0000)]
MIPS: ath91: Remove pointless irqdisable/enable

The various interrupt flow handlers in ath79 are cascading interrupt
handlers. They all have a disable_irq_nosync()/enable_irq() pair
around the generic_handle_irq() call. The value of this disable/enable
is zero because its a complete noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: alchemy: Remove pointless irqdisable/enable
Thomas Gleixner [Mon, 13 Jul 2015 20:46:04 +0000 (20:46 +0000)]
MIPS: alchemy: Remove pointless irqdisable/enable

bcsr_csc_handler() is a cascading interrupt handler. It has a
disable_irq_nosync()/enable_irq() pair around the generic_handle_irq()
call. The value of this disable/enable is zero because its a complete
noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

[ralf@linux-mips.org: Fold in followup fix from Thomas Gleixner.]

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10702/
Patchwork: https://patchwork.linux-mips.org/patch/10708/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: bcm63xx: Use irq_set_handler_locked()
Thomas Gleixner [Mon, 13 Jul 2015 20:46:02 +0000 (20:46 +0000)]
MIPS: bcm63xx: Use irq_set_handler_locked()

Use irq_set_handler_locked() as it avoids a redundant lookup of the
irq descriptor.

Search and replacement was done with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Julia Lawall <julia.lawall@lip6.fr>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: alchemy: Use irq_set_chip_handler_name_locked()
Thomas Gleixner [Mon, 13 Jul 2015 20:46:01 +0000 (20:46 +0000)]
MIPS: alchemy: Use irq_set_chip_handler_name_locked()

Hand in irq_data and avoid the redundant lookup of irq_desc.

Originally-from: Jiang Liu <jiang.liu@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10700/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: irq: Use access helper irq_data_get_affinity_mask()
Jiang Liu [Mon, 13 Jul 2015 20:45:59 +0000 (20:45 +0000)]
MIPS: irq: Use access helper irq_data_get_affinity_mask()

This is a preparatory patch for moving irq_data struct members.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: pci-rt3883: Consolidate chained IRQ handler install/remove
Thomas Gleixner [Mon, 13 Jul 2015 20:45:58 +0000 (20:45 +0000)]
MIPS: pci-rt3883: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10698/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: pci-ar724x: Consolidate chained IRQ handler install/remove
Thomas Gleixner [Mon, 13 Jul 2015 20:45:56 +0000 (20:45 +0000)]
MIPS: pci-ar724x: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10697/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: pci-ar71xx: Consolidate chained IRQ handler install/remove
Thomas Gleixner [Mon, 13 Jul 2015 20:45:55 +0000 (20:45 +0000)]
MIPS: pci-ar71xx: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10696/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: jz4740: Consolidate chained IRQ handler install/remove
Thomas Gleixner [Mon, 13 Jul 2015 20:45:53 +0000 (20:45 +0000)]
MIPS: jz4740: Consolidate chained IRQ handler install/remove

Chained irq handlers usually set up handler data as well. We now have
a function to set both under irq_desc->lock. Replace the two calls
with one.

Search and conversion was done with coccinelle.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: linux-mips@linux-mips.org
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Patchwork: https://patchwork.linux-mips.org/patch/10695/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Set up FTLB probability for I6400
Markos Chandras [Thu, 9 Jul 2015 09:40:53 +0000 (10:40 +0100)]
MIPS: Set up FTLB probability for I6400

Set up the I6400 FTLB probability similar to P5600 and proAptiv.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10652/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: cpu-probe: Fix VTLB/FTLB configuration for R6
Markos Chandras [Thu, 9 Jul 2015 09:40:52 +0000 (10:40 +0100)]
MIPS: cpu-probe: Fix VTLB/FTLB configuration for R6

R6 has dropped the MMUExtDef field from the config4 register and it
now returns 0. However, the return value means nothing in that case
and the only supported configuration for R6 is the VTLB+FTLB
(MMUextDef == 3). As a result, rework the code so that the correct
value is set for R6 cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10651/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add default case for the FTLB enable/disable code
Markos Chandras [Thu, 9 Jul 2015 09:40:51 +0000 (10:40 +0100)]
MIPS: Add default case for the FTLB enable/disable code

Add a default case for the FTLB enable/disable code. This will be used
to detect that something went wrong in the set_ftlb_enable() function
either because that function knows nothing about the running core, or
simply because the core can't turn its FTLB on/off.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10650/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB
Markos Chandras [Thu, 9 Jul 2015 09:40:50 +0000 (10:40 +0100)]
MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB

We are so early in the boot process where we really don't want to
stall and wait for CP0 FTLB related changes become visible so just drop
the cp0 hazard barrier.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10649/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoIRQCHIP: irq-mips-gic: Add support for CM3 64-bit timer irqs
Markos Chandras [Thu, 9 Jul 2015 09:40:49 +0000 (10:40 +0100)]
IRQCHIP: irq-mips-gic: Add support for CM3 64-bit timer irqs

CM3 uses a 64-bit counter and compare registers so add support for
them in the GIC counter interrupt.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10648/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoIRQCHIP: irq-mips-gic: Extend GIC accessors for 64-bit CMs
Markos Chandras [Tue, 14 Jul 2015 09:26:09 +0000 (10:26 +0100)]
IRQCHIP: irq-mips-gic: Extend GIC accessors for 64-bit CMs

Previously, the GIC accessors were only accessing u32 registers but
newer CMs may actually be 64-bit on MIPS64 cores. As a result of which,
extended these accessors to support 64-bit reads and writes.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10709/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CM: Add support for reporting CM cache errors
Markos Chandras [Thu, 9 Jul 2015 09:40:47 +0000 (10:40 +0100)]
MIPS: CM: Add support for reporting CM cache errors

The CM cache error reporting code is not Malta specific and as such it
should live in the mips-cm.c file. Moreover, CM2 and CM3 differ in the
way cache errors are being recorded to the registers so extend the
previous code to add support for the CM3 as well.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10646/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CPC: Fix type for GCR CPC base reg for 64-bit
Markos Chandras [Thu, 9 Jul 2015 09:40:46 +0000 (10:40 +0100)]
MIPS: CPC: Fix type for GCR CPC base reg for 64-bit

The GCR CPC base register is 64-bit on 64-bit processors so use the
appropriate field.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10645/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.
Markos Chandras [Thu, 9 Jul 2015 09:40:45 +0000 (10:40 +0100)]
MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels.

The CMGCRBase register (CP0, 15, 3) register is 64-bit on MIPS64
so we change its type to unsigned long.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10644/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mips-cm: Extend CM accessors for 64-bit CPUs
Markos Chandras [Tue, 14 Jul 2015 08:14:12 +0000 (09:14 +0100)]
MIPS: mips-cm: Extend CM accessors for 64-bit CPUs

Previously, the CM accessors were only accessing CM registers as u32
types instead of using the native CM register with. However, newer CMs
may actually be 64-bit on MIPS64 cores. Fortunately, current 64-bit CMs
(CM3) hold all the useful configuration bits in the lower half of the
64-bit registers (at least most of them) so they can still be accessed
using the current 32-bit accessors.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add platform callback before initializing the L2 cache
Markos Chandras [Thu, 9 Jul 2015 09:40:43 +0000 (10:40 +0100)]
MIPS: Add platform callback before initializing the L2 cache

Allow platforms to perform platform-specific steps before configuring
the L2 cache. This is necessary for platforms with CM3 since the L2
parameters no longer live in the Config2 register.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10642/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CM3: Add support for CM3 L2 cache.
Paul Burton [Thu, 9 Jul 2015 09:40:42 +0000 (10:40 +0100)]
MIPS: CM3: Add support for CM3 L2 cache.

Detect the L2 cache configuration from GCR_L2_CONFIG when a CM3 is
present in the system, rather than from Config2 which does not expose
the L2 configuration on I6400.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10641/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: CM: Add GCR_L2_CONFIG register accessors
Paul Burton [Thu, 9 Jul 2015 09:40:40 +0000 (10:40 +0100)]
MIPS: CM: Add GCR_L2_CONFIG register accessors

Provide accessor functions for the GCR_L2_CONFIG register introduced
with CM3, and define the bits included in the register.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10639/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mips-cm: Implement mips_cm_revision
Paul Burton [Fri, 10 Jul 2015 09:12:52 +0000 (10:12 +0100)]
MIPS: mips-cm: Implement mips_cm_revision

Provide a function to trivially return the version of the CM present in
the system, or 0 if no CM is present. The mips_cm_revision() will be
used later on to determine the CM register width, so it must not use
the regular CM accessors to read the revision register since that will
lead to build failures due to recursive inlines.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10655/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Kconfig: Disable MIPS MT and SMP implementations for R6
Markos Chandras [Thu, 9 Jul 2015 09:40:38 +0000 (10:40 +0100)]
MIPS: Kconfig: Disable MIPS MT and SMP implementations for R6

R6 does not support the MIPS MT ASE and the CMP/SMP options so
restrict them in order to prevent users from selecting incompatible
SMP configuration for R6 cores. We also disable the CPS/SMP option
because its support hasn't been added to the CPS code yet.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10637/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add MIPS I6400 probe support
Markos Chandras [Thu, 9 Jul 2015 09:40:37 +0000 (10:40 +0100)]
MIPS: Add MIPS I6400 probe support

Add a case in cpu_probe_mips for the MIPS I6400 processor ID, which sets
the CPU type to the new CPU_I6400.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10636/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add cases for CPU_I6400
Markos Chandras [Thu, 9 Jul 2015 09:40:36 +0000 (10:40 +0100)]
MIPS: Add cases for CPU_I6400

Add a CPU_I6400 case to various switch statements, doing the same thing
as for CPU_P5600.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add MIPS I6400 PRid and cputype identifiers
Markos Chandras [Thu, 9 Jul 2015 09:40:35 +0000 (10:40 +0100)]
MIPS: Add MIPS I6400 PRid and cputype identifiers

Add a Processor ID and CPU type for the MIPS I6400 core.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ath79: irq: IRQCHIP_DECLARE moved to linux/irqchip.h
Alban Bedel [Thu, 9 Jul 2015 08:51:36 +0000 (10:51 +0200)]
MIPS: ath79: irq: IRQCHIP_DECLARE moved to linux/irqchip.h

Remove the ugly cross tree include now that IRQCHIP_DECLARE moved to
linux/irqchip.h.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10633/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoLinux 4.2-rc8
Linus Torvalds [Mon, 24 Aug 2015 03:52:59 +0000 (20:52 -0700)]
Linux 4.2-rc8

9 years agoMerge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Linus Torvalds [Mon, 24 Aug 2015 03:46:22 +0000 (20:46 -0700)]
Merge tag 'scsi-fixes' of git://git./linux/kernel/git/jejb/scsi

Pull SCSI fixes from James Bottomley:
 "A couple of major (hang and deadlock) fixes with fortunately fairly
  rare triggering conditions.  The PM oops is only really triggered by
  people using enclosure services (rare) and the fnic driver is mostly
  used in enterprise environments"

* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  SCSI: Fix NULL pointer dereference in runtime PM
  fnic: Use the local variable instead of I/O flag to acquire io_req_lock in fnic_queuecommand() to avoid deadloack

9 years agoMerge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Linus Torvalds [Sun, 23 Aug 2015 14:23:09 +0000 (07:23 -0700)]
Merge branch 'upstream' of git://git.linux-mips.org/ralf/upstream-linus

Pull MIPS bug fixes from Ralf Baechle:
 "Two more fixes for 4.2.

  One fixes a build issue with the LLVM assembler - LLVM assembler macro
  names are case sensitive, GNU as macro names are insensitive; the
  other corrects a license string (GPL v2, not GPLv2) such that the
  module loader will recognice the license correctly"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  FIRMWARE: bcm47xx_nvram: Fix module license.
  MIPS: Fix LLVM build issue.

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Linus Torvalds [Sun, 23 Aug 2015 03:22:11 +0000 (20:22 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/viro/vfs

Pull 9p regression fix from Al Viro:
 "Fix for breakage introduced when switching p9_client_{read,write}() to
  struct iov_iter * (went into 4.1)"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  9p: ensure err is initialized to 0 in p9_client_read/write

9 years ago9p: ensure err is initialized to 0 in p9_client_read/write
Vincent Bernat [Sat, 15 Aug 2015 13:49:13 +0000 (15:49 +0200)]
9p: ensure err is initialized to 0 in p9_client_read/write

Some use of those functions were providing unitialized values to those
functions. Notably, when reading 0 bytes from an empty file on a 9P
filesystem, the return code of read() was not 0.

Tested with this simple program:

    #include <assert.h>
    #include <sys/types.h>
    #include <sys/stat.h>
    #include <fcntl.h>
    #include <unistd.h>

    int main(int argc, const char **argv)
    {
        assert(argc == 2);
        char buffer[256];
        int fd = open(argv[1], O_RDONLY|O_NOCTTY);
        assert(fd >= 0);
        assert(read(fd, buffer, 0) == 0);
        return 0;
    }

Cc: stable@vger.kernel.org # v4.1
Signed-off-by: Vincent Bernat <vincent@bernat.im>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
9 years agoMerge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Linus Torvalds [Sat, 22 Aug 2015 22:48:04 +0000 (15:48 -0700)]
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "Another couple of small ARM fixes.

  A patch from Masahiro Yamada who noticed that "make -jN all zImage"
  would end up generating bad images where N > 1, and a patch from
  Nicolas to fix the Marvell CPU user access optimisation code when page
  faults are disabled"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8418/1: add boot image dependencies to not generate invalid images
  ARM: 8414/1: __copy_to_user_memcpy: fix mmap semaphore usage

9 years agoMerge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 22 Aug 2015 15:15:36 +0000 (08:15 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:
 "Various low level fixes: fix more fallout from the FPU rework and the
  asm entry code rework, plus an MSI rework fix, and an idle-tracing fix"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/fpu/math-emu: Fix crash in fork()
  x86/fpu/math-emu: Fix math-emu boot crash
  x86/idle: Restore trace_cpu_idle to mwait_idle() calls
  x86/irq: Build correct vector mapping for multiple MSI interrupts
  Revert "sched/x86_64: Don't save flags on context switch"

9 years agoMerge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 22 Aug 2015 15:06:28 +0000 (08:06 -0700)]
Merge branch 'perf-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull perf fixes from Ingo Molnar:
 "Tooling fixes: a 'perf record' deadlock fix plus debuggability fixes"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf top: Show backtrace when handling a SIGSEGV on --stdio mode
  perf tools: Fix buildid processing
  perf tools: Make fork event processing more resilient
  perf tools: Avoid deadlock when map_groups are broken

9 years agoMerge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 22 Aug 2015 14:45:36 +0000 (07:45 -0700)]
Merge branch 'irq-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A series of small fixlets for a regression visible on OMAP devices
  caused by the conversion of the OMAP interrupt chips to hierarchical
  interrupt domains.  Mostly one liners on the driver side plus a small
  helper function in the core to avoid open coded mess in the drivers"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/crossbar: Restore set_wake functionality
  irqchip/crossbar: Restore the mask on suspend behaviour
  ARM: OMAP: wakeupgen: Restore the irq_set_type() mechanism
  irqchip/crossbar: Restore the irq_set_type() mechanism
  genirq: Introduce irq_chip_set_type_parent() helper
  genirq: Don't return ENOSYS in irq_chip_retrigger_hierarchy

9 years agoMerge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sat, 22 Aug 2015 14:37:41 +0000 (07:37 -0700)]
Merge branch 'timers-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull timer fixes from Thomas Gleixner:
 "Two minimalistic fixes for 4.2 regressions:

   - Eric fixed a thinko in the timer_list base switching code caused by
     the overhaul of the timer wheel.  It can cause a cpu to see the
     wrong base for a timer while we move the timer around.

   - Guenter fixed a regression for IMX if booted w/o device tree, where
     the timer interrupt is not initialized and therefor the machine
     fails to boot"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/imx: Fix boot with non-DT systems
  timer: Write timer->flags atomically

9 years agox86/fpu/math-emu: Fix crash in fork()
Ingo Molnar [Wed, 27 May 2015 10:22:29 +0000 (12:22 +0200)]
x86/fpu/math-emu: Fix crash in fork()

During later stages of math-emu bootup the following crash triggers:

 math_emulate: 0060:c100d0a8
 Kernel panic - not syncing: Math emulation needed in kernel
 CPU: 0 PID: 1511 Comm: login Not tainted 4.2.0-rc7+ #1012
 [...]
 Call Trace:
  [<c181d50d>] dump_stack+0x41/0x52
  [<c181c918>] panic+0x77/0x189
  [<c1003530>] ? math_error+0x140/0x140
  [<c164c2d7>] math_emulate+0xba7/0xbd0
  [<c100d0a8>] ? fpu__copy+0x138/0x1c0
  [<c1109c3c>] ? __alloc_pages_nodemask+0x12c/0x870
  [<c136ac20>] ? proc_clear_tty+0x40/0x70
  [<c136ac6e>] ? session_clear_tty+0x1e/0x30
  [<c1003530>] ? math_error+0x140/0x140
  [<c1003575>] do_device_not_available+0x45/0x70
  [<c100d0a8>] ? fpu__copy+0x138/0x1c0
  [<c18258e6>] error_code+0x5a/0x60
  [<c1003530>] ? math_error+0x140/0x140
  [<c100d0a8>] ? fpu__copy+0x138/0x1c0
  [<c100c205>] arch_dup_task_struct+0x25/0x30
  [<c1048cea>] copy_process.part.51+0xea/0x1480
  [<c115a8e5>] ? dput+0x175/0x200
  [<c136af70>] ? no_tty+0x30/0x30
  [<c1157242>] ? do_vfs_ioctl+0x322/0x540
  [<c104a21a>] _do_fork+0xca/0x340
  [<c1057b06>] ? SyS_rt_sigaction+0x66/0x90
  [<c104a557>] SyS_clone+0x27/0x30
  [<c1824a80>] sysenter_do_call+0x12/0x12

The reason is the incorrect assumption in fpu_copy(), that FNSAVE
can be executed from math-emu kernels as well.

Don't try to copy the registers, the soft state will be copied
by fork anyway, so the child task inherits the parent task's
soft math state.

With this fix applied math-emu kernels boot up fine on modern
hardware and the 'no387 nofxsr' boot options.

Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Bobby Powers <bobbypowers@gmail.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agox86/fpu/math-emu: Fix math-emu boot crash
Ingo Molnar [Sat, 22 Aug 2015 07:52:06 +0000 (09:52 +0200)]
x86/fpu/math-emu: Fix math-emu boot crash

On a math-emu bootup the following crash occurs:

Initializing CPU#0
------------[ cut here ]------------
kernel BUG at arch/x86/kernel/traps.c:779!
invalid opcode: 0000 [#1] SMP
[...]
EIP is at do_device_not_available+0xe/0x70
[...]
Call Trace:
 [<c18238e6>] error_code+0x5a/0x60
 [<c1002bd0>] ? math_error+0x140/0x140
 [<c100bbd9>] ? fpu__init_cpu+0x59/0xa0
 [<c1012322>] cpu_init+0x202/0x330
 [<c104509f>] ? __native_set_fixmap+0x1f/0x30
 [<c1b56ab0>] trap_init+0x305/0x346
 [<c1b548af>] start_kernel+0x1a5/0x35d
 [<c1b542b4>] i386_start_kernel+0x82/0x86

The reason is that in the following commit:

  b1276c48e91b ("x86/fpu: Initialize fpregs in fpu__init_cpu_generic()")

I failed to consider math-emu's limitation that it cannot execute the
FNINIT instruction in kernel mode.

The long term fix might be to allow math-emu to execute (certain) kernel
mode FPU instructions, but for now apply the safe (albeit somewhat ugly)
fix: initialize the emulation state explicitly without trapping out to
the FPU emulator.

Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agoAdd hch to .get_maintainer.ignore
Christoph Hellwig [Fri, 21 Aug 2015 21:11:54 +0000 (14:11 -0700)]
Add hch to .get_maintainer.ignore

While the idea behind get_maintainer seems highly useful it's
unfortunately way to trigger happy to grab people that once had a few
commits to files.  For someone like me who does a lot of tree-wide API
work that leads to an incredible amount of Cc spam.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: Joe Perches <joe@perches.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
9 years agomm: make page pfmemalloc check more robust
Michal Hocko [Fri, 21 Aug 2015 21:11:51 +0000 (14:11 -0700)]
mm: make page pfmemalloc check more robust

Commit c48a11c7ad26 ("netvm: propagate page->pfmemalloc to skb") added
checks for page->pfmemalloc to __skb_fill_page_desc():

        if (page->pfmemalloc && !page->mapping)
                skb->pfmemalloc = true;

It assumes page->mapping == NULL implies that page->pfmemalloc can be
trusted.  However, __delete_from_page_cache() can set set page->mapping
to NULL and leave page->index value alone.  Due to being in union, a
non-zero page->index will be interpreted as true page->pfmemalloc.

So the assumption is invalid if the networking code can see such a page.
And it seems it can.  We have encountered this with a NFS over loopback
setup when such a page is attached to a new skbuf.  There is no copying
going on in this case so the page confuses __skb_fill_page_desc which
interprets the index as pfmemalloc flag and the network stack drops
packets that have been allocated using the reserves unless they are to
be queued on sockets handling the swapping which is the case here and
that leads to hangs when the nfs client waits for a response from the
server which has been dropped and thus never arrive.

The struct page is already heavily packed so rather than finding another
hole to put it in, let's do a trick instead.  We can reuse the index
again but define it to an impossible value (-1UL).  This is the page
index so it should never see the value that large.  Replace all direct
users of page->pfmemalloc by page_is_pfmemalloc which will hide this
nastiness from unspoiled eyes.

The information will get lost if somebody wants to use page->index
obviously but that was the case before and the original code expected
that the information should be persisted somewhere else if that is
really needed (e.g.  what SLAB and SLUB do).

[akpm@linux-foundation.org: fix blooper in slub]
Fixes: c48a11c7ad26 ("netvm: propagate page->pfmemalloc to skb")
Signed-off-by: Michal Hocko <mhocko@suse.com>
Debugged-by: Vlastimil Babka <vbabka@suse.com>
Debugged-by: Jiri Bohac <jbohac@suse.com>
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Cc: David Miller <davem@davemloft.net>
Acked-by: Mel Gorman <mgorman@suse.de>
Cc: <stable@vger.kernel.org> [3.6+]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
9 years agoMerge tag 'pci-v4.2-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Linus Torvalds [Fri, 21 Aug 2015 18:18:10 +0000 (11:18 -0700)]
Merge tag 'pci-v4.2-fixes-2' of git://git./linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:
 "These are fixes for ASPM-related NULL pointer dereference crashes on
  Sparc and PowerPC and 64-bit PCI address-related HPMC crashes on
  PA-RISC.  These are both caused by things we merged in the v4.2 merge
  window.  Details:

  Resource management
    - Don't use 64-bit bus addresses on PA-RISC

  Miscellaneous
    - Tolerate hierarchies with no Root Port"

* tag 'pci-v4.2-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: Don't use 64-bit bus addresses on PA-RISC
  PCI: Tolerate hierarchies with no Root Port

9 years agoMerge tag 'media/v4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
Linus Torvalds [Fri, 21 Aug 2015 18:03:06 +0000 (11:03 -0700)]
Merge tag 'media/v4.2-3' of git://git./linux/kernel/git/mchehab/linux-media

Pull media fixes from Mauro Carvalho Chehab:

 - a regression fix at the videobuf2 core driver

 - fix error handling at mantis probing code

 - revert the IR encode patches, as the API is not mature enough.
   So, better to postpone the changes to a latter Kernel

 - fix Kconfig breakages on some randconfig scenarios.

* tag 'media/v4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
  [media] mantis: Fix error handling in mantis_dma_init()
  Revert "[media] rc: rc-ir-raw: Add scancode encoder callback"
  Revert "[media] rc: rc-ir-raw: Add Manchester encoder (phase encoder) helper"
  Revert "[media] rc: ir-rc5-decoder: Add encode capability"
  Revert "[media] rc: ir-rc6-decoder: Add encode capability"
  Revert "[media] rc: rc-core: Add support for encode_wakeup drivers"
  Revert "[media] rc: rc-loopback: Add loopback of filter scancodes"
  Revert "[media] rc: nuvoton-cir: Add support for writing wakeup samples via sysfs filter callback"
  [media] vb2: Fix compilation breakage when !CONFIG_BUG
  [media] vb2: Only requeue buffers immediately once streaming is started
  [media] media/pci/cobalt: fix Kconfig and build when SND is not enabled
  [media] media/dvb: fix ts2020.c Kconfig and build

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Linus Torvalds [Fri, 21 Aug 2015 17:54:53 +0000 (10:54 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/dtor/input

Pull input layer fix from Dmitry Torokhov:
 "A small fixup to gpio_keys_polled driver"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
  Input: gpio_keys_polled - request GPIO pin as input.

9 years agoMerge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Linus Torvalds [Fri, 21 Aug 2015 17:46:56 +0000 (10:46 -0700)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "A bunch of i915 fixes, one revert a VBT fix that was a bit premature,
  and some braswell feature removal that the hw actually didn't support.

  One radeon race fix at boot, and one hlcdc build fix, one fix from
  Russell that fixes build as well with new audio features.

  This is hopefully all I have until -next"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon: fix hotplug race at startup
  drm/edid: add function to help find SADs
  drm/i915: Avoid TP3 on CHV
  drm/i915: remove HBR2 from chv supported list
  Revert "drm/i915: Add eDP intermediate frequencies for CHV"
  Revert "drm/i915: Allow parsing of variable size child device entries from VBT"
  drm/atmel-hlcdc: Compile suspend/resume for PM_SLEEP only
  drm/i915: Flag the execlists context object as dirty after every use

9 years agodrm/radeon: fix hotplug race at startup
Dave Airlie [Thu, 20 Aug 2015 00:13:55 +0000 (10:13 +1000)]
drm/radeon: fix hotplug race at startup

We apparantly get a hotplug irq before we've initialised
modesetting,

[drm] Loading R100 Microcode
BUG: unable to handle kernel NULL pointer dereference at   (null)
IP: [<c125f56f>] __mutex_lock_slowpath+0x23/0x91
*pde = 00000000
Oops: 0002 [#1]
Modules linked in: radeon(+) drm_kms_helper ttm drm i2c_algo_bit backlight pcspkr psmouse evdev sr_mod input_leds led_class cdrom sg parport_pc parport floppy intel_agp intel_gtt lpc_ich acpi_cpufreq processor button mfd_core agpgart uhci_hcd ehci_hcd rng_core snd_intel8x0 snd_ac97_codec ac97_bus snd_pcm usbcore usb_common i2c_i801 i2c_core snd_timer snd soundcore thermal_sys
CPU: 0 PID: 15 Comm: kworker/0:1 Not tainted 4.2.0-rc7-00015-gbf67402 #111
Hardware name: MicroLink                               /D850MV                         , BIOS MV85010A.86A.0067.P24.0304081124 04/08/2003
Workqueue: events radeon_hotplug_work_func [radeon]
task: f6ca5900 ti: f6d3e000 task.ti: f6d3e000
EIP: 0060:[<c125f56f>] EFLAGS: 00010282 CPU: 0
EIP is at __mutex_lock_slowpath+0x23/0x91
EAX: 00000000 EBX: f5e900fc ECX: 00000000 EDX: fffffffe
ESI: f6ca5900 EDI: f5e90100 EBP: f5e90000 ESP: f6d3ff0c
 DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068
CR0: 8005003b CR2: 00000000 CR3: 36f61000 CR4: 000006d0
Stack:
 f5e90100 00000000 c103c4c1 f6d2a5a0 f5e900fc f6df394c c125f162 f8b0faca
 f6d2a5a0 c138ca00 f6df394c f7395600 c1034741 00d40000 00000000 f6d2a5a0
 c138ca00 f6d2a5b8 c138ca10 c1034b58 00000001 f6d40000 f6ca5900 f6d0c940
Call Trace:
 [<c103c4c1>] ? dequeue_task_fair+0xa4/0xb7
 [<c125f162>] ? mutex_lock+0x9/0xa
 [<f8b0faca>] ? radeon_hotplug_work_func+0x17/0x57 [radeon]
 [<c1034741>] ? process_one_work+0xfc/0x194
 [<c1034b58>] ? worker_thread+0x18d/0x218
 [<c10349cb>] ? rescuer_thread+0x1d5/0x1d5
 [<c103742a>] ? kthread+0x7b/0x80
 [<c12601c0>] ? ret_from_kernel_thread+0x20/0x30
 [<c10373af>] ? init_completion+0x18/0x18
Code: 42 08 e8 8e a6 dd ff c3 57 56 53 83 ec 0c 8b 35 48 f7 37 c1 8b 10 4a 74 1a 89 c3 8d 78 04 8b 40 08 89 63

Reported-and-Tested-by: Meelis Roos <mroos@linux.ee>
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoMerge tag 'drm-intel-fixes-2015-08-20' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Fri, 21 Aug 2015 00:44:03 +0000 (10:44 +1000)]
Merge tag 'drm-intel-fixes-2015-08-20' of git://anongit.freedesktop.org/drm-intel into drm-fixes

Revert of a VBT parsing commit that should've been queued for drm-next,
not v4.2. The revert unbreaks Braswell among other things.

Also on Braswell removal of DP HBR2/TP3 and intermediate eDP frequency
support. The code was optimistically added based on incorrect
documentation; the platform does not support them. These are cc: stable.

Finally a gpu state fix from Chris, also cc: stable.

* tag 'drm-intel-fixes-2015-08-20' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Avoid TP3 on CHV
  drm/i915: remove HBR2 from chv supported list
  Revert "drm/i915: Add eDP intermediate frequencies for CHV"
  Revert "drm/i915: Allow parsing of variable size child device entries from VBT"
  drm/i915: Flag the execlists context object as dirty after every use

9 years agoMerge tag 'pm+acpi-4.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
Linus Torvalds [Fri, 21 Aug 2015 00:06:11 +0000 (17:06 -0700)]
Merge tag 'pm+acpi-4.2-rc8' of git://git./linux/kernel/git/rafael/linux-pm

Pull power management and ACPI fixes from Rafael Wysocki:
 "These fix a recent regression in the ACPI backlight code and a memory
  leak in the Exynos cpufreq driver.

  Specifics:

   - Fix a recently introduced issue in the ACPI backlight code which
     causes lockdep to complain about a circular lock dependency during
     initialization (Hans de Goede).

   - Fix a possible memory during initialization in the Exynos cpufreq
     driver (Shailendra Verma)"

* tag 'pm+acpi-4.2-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  cpufreq: exynos: Fix for memory leak in case SoC name does not match
  ACPI / video: Fix circular lock dependency issue in the video-detect code

9 years agoMerge branches 'acpi-video' and 'cpufreq-fixes'
Rafael J. Wysocki [Thu, 20 Aug 2015 22:19:29 +0000 (00:19 +0200)]
Merge branches 'acpi-video' and 'cpufreq-fixes'

* acpi-video:
  ACPI / video: Fix circular lock dependency issue in the video-detect code

* cpufreq-fixes:
  cpufreq: exynos: Fix for memory leak in case SoC name does not match

9 years agoPCI: Don't use 64-bit bus addresses on PA-RISC
Bjorn Helgaas [Thu, 20 Aug 2015 05:08:15 +0000 (00:08 -0500)]
PCI: Don't use 64-bit bus addresses on PA-RISC

Meelis and Helge reported that 3a9ad0b4fdcd ("PCI: Add pci_bus_addr_t")
caused HPMCs on A500 and hangs on rp5470.

PA-RISC does not set ARCH_DMA_ADDR_T_64BIT, even for 64-bit kernels, so
prior to 3a9ad0b4fdcd, we always used 32-bit PCI addresses.  After
3a9ad0b4fdcd, we do use 64-bit PCI addresses in 64-bit kernels, and
apparently there's some PA-RISC problem related to them.

Fixes: 3a9ad0b4fdcd ("PCI: Add pci_bus_addr_t")
Link: http://lkml.kernel.org/r/alpine.LRH.2.11.1507260929000.30065@math.ut.ee
Reported-by: Meelis Roos <mroos@linux.ee>
Reported-by: Helge Deller <deller@gmx.de>
Tested-by: Helge Deller <deller@gmx.de>
Based-on-idea-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Yinghai Lu <yinghai@kernel.org>
CC: stable@vger.kernel.org # v3.19+
9 years agox86/idle: Restore trace_cpu_idle to mwait_idle() calls
Jisheng Zhang [Thu, 20 Aug 2015 04:54:39 +0000 (12:54 +0800)]
x86/idle: Restore trace_cpu_idle to mwait_idle() calls

Commit b253149b843f ("sched/idle/x86: Restore mwait_idle() to fix boot
hangs, to improve power savings and to improve performance") restores
mwait_idle(), but the trace_cpu_idle related calls are missing. This
causes powertop on my old desktop powered by Intel Core2 E6550 to
report zero wakeups and zero events.

Add them back to restore the proper behaviour.

Fixes: b253149b843f ("sched/idle/x86: Restore mwait_idle() to ...")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Cc: <len.brown@intel.com>
Cc: stable@vger.kernel.org # 4.1
Link: http://lkml.kernel.org/r/1440046479-4262-1-git-send-email-jszhang@marvell.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
9 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Linus Torvalds [Thu, 20 Aug 2015 19:32:28 +0000 (12:32 -0700)]
Merge git://git./linux/kernel/git/davem/net

Pull networking fixes from David Miller:

 1) Out of bounds array access in 802.11 minstrel code, from Adrien
    Schildknecht.

 2) Don't use skb_get() in IGMP/MLD code paths, as this makes
    pskb_may_pull() BUG.  From Linus Luessing.

 3) Fix off by one in ipv4 route dumping code, from Andy Whitcroft.

 4) Fix deadlock in reqsk_queue_unlink(), from Eric Dumazet.

 5) Fix ppp device deregistration wrt.  netns deletion, from Guillaume
    Nault.

 6) Fix deadlock when creating per-cpu ipv6 routes, from Martin KaFai
    Lau.

 7) Fix memory leak in batman-adv code, from Sven Eckelmann.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net:
  batman-adv: Fix memory leak on tt add with invalid vlan
  net: phy: fix semicolon.cocci warnings
  net: qmi_wwan: add HP lt4111 LTE/EV-DO/HSPA+ Gobi 4G Module
  be2net: avoid vxlan offloading on multichannel configs
  ipv6: Fix a potential deadlock when creating pcpu rt
  ipv6: Add rt6_make_pcpu_route()
  ipv6: Remove un-used argument from ip6_dst_alloc()
  net: phy: workaround for buggy cable detection by LAN8700 after cable plugging
  net: ethernet: micrel: fix an error code
  ppp: fix device unregistration upon netns deletion
  net: phy: fix PHY_RUNNING in phy_state_machine
  Revert "net: limit tcp/udp rmem/wmem to SOCK_{RCV,SND}BUF_MIN"
  inet: fix potential deadlock in reqsk_queue_unlink()
  gianfar: Restore link state settings after MAC reset
  ipv4: off-by-one in continuation handling in /proc/net/route
  net: fix wrong skb_get() usage / crash in IGMP/MLD parsing code
  mac80211: fix invalid read in minstrel_sort_best_tp_rates()

9 years agoMerge tag 'for-linus-4.2-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Thu, 20 Aug 2015 19:21:26 +0000 (12:21 -0700)]
Merge tag 'for-linus-4.2-rc7-tag' of git://git./linux/kernel/git/xen/tip

Pull xen build fix from David Vrabel:
 "Fix i386 build with an (uncommon) configuration"

* tag 'for-linus-4.2-rc7-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  x86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC

9 years agoMerge tag 'sound-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Linus Torvalds [Thu, 20 Aug 2015 19:08:38 +0000 (12:08 -0700)]
Merge tag 'sound-4.2' of git://git./linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "Here are a small collecton of sound fix patches.

  The most significant one is the disablement of newly introduced
  topology API.  Its ABI couldn't be stabilized enough, so we decided to
  delay for 4.3 in the end.  Other than that, all oneliner fixes: a
  USB-audio runtime PM fix and a couple of HD-audio quirks"

* tag 'sound-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: hda - Add dock support for Thinkpad W541 (17aa:2211)
  ALSA: usb-audio: Fix runtime PM unbalance
  ASoC: topology: Disable use from userspace
  ASoC: topology: Add Kconfig option for topology
  ALSA: hda - Fix the white noise on Dell laptop

9 years agoInput: gpio_keys_polled - request GPIO pin as input.
Vincent Pelletier [Thu, 20 Aug 2015 19:00:19 +0000 (12:00 -0700)]
Input: gpio_keys_polled - request GPIO pin as input.

GPIOF_IN flag was lost in:
Commit 633a21d80b4a("input: gpio_keys_polled: Add support for GPIO
descriptors").

Without this flag, legacy code path (for non-descriptor GPIO declarations)
would configure GPIO as output (0 meaning GPIOF_DIR_OUT | GPIOF_INIT_LOW).

Cc: stable@vger.kernel.org
Signed-off-by: Vincent Pelletier <plr.vincent@gmail.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
9 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending
Linus Torvalds [Thu, 20 Aug 2015 18:39:11 +0000 (11:39 -0700)]
Merge git://git./linux/kernel/git/nab/target-pending

Pull SCSI target fixes from Nicholas Bellinger:
 "This contains a v4.2-rc specific RCU module unload regression bug-fix,
  a long-standing iscsi-target bug-fix for duplicate target_xfer_tags
  during NOP processing from Alexei, and two more small REPORT_LUNs
  emulation related patches to make Solaris FC host LUN scanning happy
  from Roland.

  There is also one patch not included that allows target-core to limit
  the number of fabric driver SGLs per I/O request using residuals, that
  is currently required as a work-around for FC hosts which don't honor
  EVPD block-limits settings.  At this point, it will most likely become
  for-next material"

* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
  target: Fix handling of small allocation lengths in REPORT LUNS
  target: REPORT LUNS should return LUN 0 even for dynamic ACLs
  target/iscsi: Fix double free of a TUR followed by a solicited NOPOUT
  target: Perform RCU callback barrier before backend/fabric unload

9 years agoMerge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux...
Linus Torvalds [Thu, 20 Aug 2015 18:32:33 +0000 (11:32 -0700)]
Merge branch 'fixes' of git://git./linux/kernel/git/evalenti/linux-soc-thermal

Pull thermal fixes from Eduardo Valentin:
 "Last minute fixes on the thermal-soc tree.  There is a fix of a long
  lasting bug in cpu cooling device, thanks for RMK for being pushing
  this"

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal:
  thermal/cpu_cooling: update policy limits if clipped_freq < policy->max
  thermal/cpu_cooling: rename max_freq as clipped_freq in notifier
  thermal/cpu_cooling: rename cpufreq_val as clipped_freq
  thermal/cpu_cooling: convert 'switch' block to 'if' block in notifier
  thermal/cpu_cooling: quit early after updating policy
  thermal/cpu_cooling: No need to initialize max_freq to 0
  thermal: cpu_cooling: fix lockdep problems in cpu_cooling
  thermal: power_allocator: do not use devm* interfaces

9 years agoclocksource/imx: Fix boot with non-DT systems
Guenter Roeck [Thu, 20 Aug 2015 10:27:21 +0000 (03:27 -0700)]
clocksource/imx: Fix boot with non-DT systems

Commit 6dd747825b20 ("ARM: imx: move timer resources into a structure")
moved initialization parameters into a data structure, but neglected to set
the irq field in that data structure for non-DT boots. This causes the system
to hang if a non-DT boot is attempted.

Fixes: 6dd747825b20 ("ARM: imx: move timer resources into a structure")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: http://lkml.kernel.org/r/1440066441-13930-1-git-send-email-linux@roeck-us.net
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
9 years agox86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC
David Vrabel [Thu, 20 Aug 2015 10:33:41 +0000 (11:33 +0100)]
x86/xen: make CONFIG_XEN depend on CONFIG_X86_LOCAL_APIC

Since commit feb44f1f7a4ac299d1ab1c3606860e70b9b89d69 (x86/xen:
Provide a "Xen PV" APIC driver to support >255 VCPUs) Xen guests need
a full APIC driver and thus should depend on X86_LOCAL_APIC.

This fixes an i386 build failure with !SMP && !CONFIG_X86_UP_APIC by
disabling Xen support in this configuration.

Users needing Xen support in a non-SMP i386 kernel will need to enable
CONFIG_X86_UP_APIC.

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Cc: <stable@vger.kernel.org>
9 years agoMerge tag 'perf-urgent-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git...
Ingo Molnar [Thu, 20 Aug 2015 09:47:14 +0000 (11:47 +0200)]
Merge tag 'perf-urgent-for-mingo' of git://git./linux/kernel/git/acme/linux into perf/urgent

Pull perf/urgent fixes from Arnaldo Carvalho de Melo:

  - Fix buildid processing done at the end of a 'perf record' session, a
    problem that happened in workloads involving lots of small short-lived
    processes.  That code was not asking the perf_session layer to order
    the events.

    Make the code more robust to handle some of the problems with such
    out-of-order events and fix 'perf record' to ask for ordered events
    on systems where we have perf_event_attr.sample_id_all.  (Adrian Hunter)

  - Show backtrace when handling a SIGSEGV in 'perf top --stdio' (Arnaldo Carvalho de Melo)

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agodrm/edid: add function to help find SADs
Russell King [Sat, 28 Mar 2015 18:13:52 +0000 (18:13 +0000)]
drm/edid: add function to help find SADs

Add a function to find the start of the SADs in the ELD.  This
complements the helper to retrieve the SAD count.

[airlied: this fixes a build problem with the alsa eld helper
which required this].

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoMerge branch 'drm-atmel-hlcdc-fixes' of https://github.com/bbrezillon/linux-at91...
Dave Airlie [Wed, 19 Aug 2015 23:40:06 +0000 (09:40 +1000)]
Merge branch 'drm-atmel-hlcdc-fixes' of https://github.com/bbrezillon/linux-at91 into drm-fixes

single atmel hlcdc fix.

* 'drm-atmel-hlcdc-fixes' of https://github.com/bbrezillon/linux-at91:
  drm/atmel-hlcdc: Compile suspend/resume for PM_SLEEP only