openwrt/staging/blogic.git
6 years agodrm/amd/display: dal 3.1.42
Eric Yang [Tue, 3 Apr 2018 15:36:14 +0000 (11:36 -0400)]
drm/amd/display: dal 3.1.42

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Don't program bypass on linear regamma LUT
Harry Wentland [Thu, 12 Apr 2018 20:37:09 +0000 (16:37 -0400)]
drm/amd/display: Don't program bypass on linear regamma LUT

Even though this is required for degamma since DCE HW only supports a
couple predefined LUTs we can just program the LUT directly for regamma.

This fixes dark screens which occurs when we program regamma to bypass
while degamma is using srgb LUT.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: defer test IBs on the rings at boot (V3)
Shirish S [Mon, 16 Apr 2018 06:47:57 +0000 (12:17 +0530)]
drm/amdgpu: defer test IBs on the rings at boot (V3)

amdgpu_ib_ring_tests() runs test IB's on rings at boot
contributes to ~500 ms of amdgpu driver's boot time.

This patch defers it and ensures that its executed
in amdgpu_info_ioctl() if it wasn't scheduled.

V2: Use queue_delayed_work() & flush_delayed_work().
V3: removed usage of separate wq, ensure ib tests is
    run before enabling clockgating.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Adding a function to store cc6 data in SMU10
Mikita Lipski [Wed, 11 Apr 2018 20:25:26 +0000 (16:25 -0400)]
drm/amd/pp: Adding a function to store cc6 data in SMU10

Filling the smu10_store_cc6_data based on the implementation
of Windows Powerplay.

There is an uncertainty with one of the parameters passed to the function
pstate_switch_disable - is not a part of smu10 private data structure.
So in the function its just ignored.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Adding set_watermarks_for_clocks_ranges for SMU10
Mikita Lipski [Tue, 10 Apr 2018 17:45:00 +0000 (13:45 -0400)]
drm/amd/pp: Adding set_watermarks_for_clocks_ranges for SMU10

The function is never implemented for raven on linux.
It follows similair implementation as on windows.

SMU still needs to notify SMC and copy WM table, which is added
here. But on other Asics such as Vega this step is not implemented.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: re-validate per VM BOs if required v2
Christian König [Mon, 19 Mar 2018 10:49:14 +0000 (11:49 +0100)]
drm/amdgpu: re-validate per VM BOs if required v2

If a per VM BO ends up in a allowed domain it never moves back into the
prefered domain.

v2: move the extra handling into amdgpu_vm_bo_update when we exit the
    state machine. Make memory type handling generic.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: revert "Don't change preferred domian when fallback GTT v6"
Christian König [Tue, 10 Apr 2018 11:42:38 +0000 (13:42 +0200)]
drm/amdgpu: revert "Don't change preferred domian when fallback GTT v6"

This reverts commit 7d1ca1325260a9e9329b10a21e3692e6f188936f.

Makes fallback handling to complicated. This is just a feature for the
GEM interface and shouldn't leak into the core BO create function.

The intended change to preserve the preferred domains is implemented in
a follow up patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)"
Christian König [Tue, 10 Apr 2018 11:42:29 +0000 (13:42 +0200)]
drm/amdgpu: revert "add new bo flag that indicates BOs don't need fallback (v2)"

This reverts commit 6f51d28bfe8e1a676de5cd877639245bed3cc818.

Makes fallback handling to complicated. This is just a feature for the
GEM interface and shouldn't leak into the core BO create function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Move common code to smu_helper.c
Rex Zhu [Sun, 8 Apr 2018 08:57:55 +0000 (16:57 +0800)]
drm/amd/pp: Move common code to smu_helper.c

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Clear smu response register before send smu message
Rex Zhu [Wed, 11 Apr 2018 10:11:49 +0000 (18:11 +0800)]
drm/amd/pp: Clear smu response register before send smu message

smu firmware do not update response register immediately under
some delay tasks, we may read out the original value.

so need to clear the register before send smu message.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove struct pp_gpu_power
Rex Zhu [Wed, 4 Apr 2018 07:37:35 +0000 (15:37 +0800)]
drm/amd/pp: Remove struct pp_gpu_power

Currently smu only calculate average gpu power in real time.

for vddc/vddci/max power,
User need to set start time and end time, firmware can calculate
the average vddc/vddci/max power. but the type of return values
is not unified. For Vi, return type is uint.
For vega, return type is float.

so this struct can't be suitable for all asics.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Refine get_gpu_power for VI
Rex Zhu [Wed, 4 Apr 2018 06:17:09 +0000 (14:17 +0800)]
drm/amd/pp: Refine get_gpu_power for VI

pkgpwr is the average gpu power of 100ms. it is calculated by
firmware in real time.

1. we can send smu message PPSMC_MSG_GetCurrPkgPwr to read currentpkgpwr directly.

2. On Fiji/tonga/bonaire/hawwii, without PPSMC_MSG_GetCurrPkgPwr support.
   Send PPSMC_MSG_PmStatusLogStart/Sample to let smu write currentpkgpwr
   to ixSMU_PM_STATUS_94. driver can read pkgpwr from ixSMU_PM_STATUS_94.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/amd/powerply: fix power reading on Fiji"
Rex Zhu [Wed, 4 Apr 2018 06:11:45 +0000 (14:11 +0800)]
Revert "drm/amd/powerply: fix power reading on Fiji"

we don't have limit of [50ms, 4sec] sampling period.
smu calculate average gpu power in real time.
we can read average gpu power through smu message or
read special register.

This reverts commit 462d8dcc9fec0d89f1ff6a1f93f1d4f670878c71.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/gpu-sched: fix force APP kill hang(v4)
Emily Deng [Mon, 16 Apr 2018 02:07:02 +0000 (10:07 +0800)]
drm/gpu-sched: fix force APP kill hang(v4)

issue:
there are VMC page fault occurred if force APP kill during
3dmark test, the cause is in entity_fini we manually signal
all those jobs in entity's queue which confuse the sync/dep
mechanism:

1)page fault occurred in sdma's clear job which operate on
shadow buffer, and shadow buffer's Gart table is cleaned by
ttm_bo_release since the fence in its reservation was fake signaled
by entity_fini() under the case of SIGKILL received.

2)page fault occurred in gfx' job because during the lifetime
of gfx job we manually fake signal all jobs from its entity
in entity_fini(), thus the unmapping/clear PTE job depend on those
result fence is satisfied and sdma start clearing the PTE and lead
to GFX page fault.

fix:
1)should at least wait all jobs already scheduled complete in entity_fini()
if SIGKILL is the case.

2)if a fence signaled and try to clear some entity's dependency, should
set this entity guilty to prevent its job really run since the dependency
is fake signaled.

v2:
splitting drm_sched_entity_fini() into two functions:
1)The first one is does the waiting, removes the entity from the
runqueue and returns an error when the process was killed.
2)The second one then goes over the entity, install it as
completion signal for the remaining jobs and signals all jobs
with an error code.

v3:
1)Replace the fini1 and fini2 with better name
2)Call the first part before the VM teardown in
amdgpu_driver_postclose_kms() and the second part
after the VM teardown
3)Keep the original function drm_sched_entity_fini to
refine the code.

v4:
1)Rename entity->finished to entity->last_scheduled;
2)Rename drm_sched_entity_fini_job_cb() to
drm_sched_entity_kill_jobs_cb();
3)Pass NULL to drm_sched_entity_fini_job_cb() if -ENOENT;
4)Replace the type of entity->fini_status with "int";
5)Remove the check about entity->finished.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Free VGA stolen memory as soon as possible.
Andrey Grodzovsky [Fri, 6 Apr 2018 19:54:10 +0000 (14:54 -0500)]
drm/amdgpu: Free VGA stolen memory as soon as possible.

Reserved VRAM is used to avoid overriding pre OS FB.
Once our display stack takes over we don't need the reserved
VRAM anymore.

v2:
Remove comment, we know actually why we need to reserve the stolen VRAM.
Fix return type for amdgpu_ttm_late_init.
v3:
Return 0 in amdgpu_bo_late_init, rebase on changes to previous patch
v4: rebase
v5:
For GMC9 reserve always just 9M and keep the stolem memory around
until GART table curruption on S3 resume is resolved.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gmc: steal the appropriate amount of vram for fw hand-over (v3)
Alex Deucher [Fri, 6 Apr 2018 19:54:09 +0000 (14:54 -0500)]
drm/amdgpu/gmc: steal the appropriate amount of vram for fw hand-over (v3)

Steal 9 MB for vga emulation and fb if vga is enabled, otherwise,
steal enough to cover the current display size as set by the vbios.

If no memory is used (e.g., secondary or headless card), skip
stolen memory reserve.

v2: skip reservation if vram is limited, address Christian's comments
v3: squash in fix from Harry

Reviewed-and-Tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> (v2)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
6 years agodrm/amdgpu/gmc9: use amdgpu_ring_emit_reg_write_reg_wait in gpu tlb flush
Alex Deucher [Tue, 27 Mar 2018 22:10:56 +0000 (17:10 -0500)]
drm/amdgpu/gmc9: use amdgpu_ring_emit_reg_write_reg_wait in gpu tlb flush

Use amdgpu_ring_emit_reg_write_reg_wait.  On engines that support it,
it provides a write and wait in a single packet which avoids a missed
ack if a world switch happens between the request and waiting for the
ack.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/vcn1: add emit_reg_write_reg_wait ring callback
Alex Deucher [Tue, 27 Mar 2018 22:06:52 +0000 (17:06 -0500)]
drm/amdgpu/vcn1: add emit_reg_write_reg_wait ring callback

This adds support for writing and reading back using the
helper since the engines doesn't have a oneshot packet.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/vce4: add emit_reg_write_reg_wait ring callback
Alex Deucher [Tue, 27 Mar 2018 22:06:33 +0000 (17:06 -0500)]
drm/amdgpu/vce4: add emit_reg_write_reg_wait ring callback

This adds support for writing and reading back using the
helper since the engines doesn't have a oneshot packet.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callback
Alex Deucher [Tue, 27 Mar 2018 22:05:19 +0000 (17:05 -0500)]
drm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callback

This adds support for writing and reading back using the
helper since the engines doesn't have a oneshot packet.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/sdma4: add emit_reg_write_reg_wait ring callback (v2)
Alex Deucher [Tue, 27 Mar 2018 21:51:41 +0000 (16:51 -0500)]
drm/amdgpu/sdma4: add emit_reg_write_reg_wait ring callback (v2)

This adds support for writing and reading back in a single
oneshot packet.  This is needed to send a tlb invalidation
and wait for ack in a single operation.

v2: squash sdma hang fix into this patch

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
6 years agodrm/amdgpu/gfx9: add emit_reg_write_reg_wait ring callback (v2)
Alex Deucher [Tue, 27 Mar 2018 20:07:50 +0000 (15:07 -0500)]
drm/amdgpu/gfx9: add emit_reg_write_reg_wait ring callback (v2)

This adds support for writing and reading back in a single
oneshot packet.  This is needed to send a tlb invalidation
and wait for ack in a single operation.

v2: squash the gfx ring stall fix

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
6 years agodrm/amdgpu: add emit_reg_write_reg_wait ring callback
Alex Deucher [Tue, 27 Mar 2018 16:58:14 +0000 (11:58 -0500)]
drm/amdgpu: add emit_reg_write_reg_wait ring callback

This callback writes a value to a register and then reads
back another register and waits for a value in a single
operation.

Provide a helper function using two operations for engines
that don't support this opertion.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay: rename smu7_upload_mc_firmware
Alex Deucher [Wed, 11 Apr 2018 23:09:39 +0000 (18:09 -0500)]
drm/amdgpu/powerplay: rename smu7_upload_mc_firmware

It doesn't actually upload any firmware is just
checks the version.  The actual upload happens in
the gmc modules.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay: fix smu7_get_memory_type for fiji
Alex Deucher [Wed, 11 Apr 2018 22:57:13 +0000 (17:57 -0500)]
drm/amdgpu/powerplay: fix smu7_get_memory_type for fiji

Fiji uses a different register than other smu7 asics, but
we already have this info in the base driver so just
use that.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/amd/display: disable CRTCs with NULL FB on their primary plane (V2)"
Harry Wentland [Thu, 12 Apr 2018 14:51:52 +0000 (10:51 -0400)]
Revert "drm/amd/display: disable CRTCs with NULL FB on their primary plane (V2)"

This seems to cause flickering and lock-ups for a wide range of users.
Revert until we've found a proper fix for the flickering and lock-ups.

This reverts commit 36cc549d59864b7161f0e23d710c1c4d1b9cf022.

Cc: Shirish S <shirish.s@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/amd/display: fix dereferencing possible ERR_PTR()"
Harry Wentland [Thu, 12 Apr 2018 14:51:51 +0000 (10:51 -0400)]
Revert "drm/amd/display: fix dereferencing possible ERR_PTR()"

This reverts commit cd2d6c92a8e39d7e50a5af9fcc67d07e6a89e91d.

Cc: Shirish S <shirish.s@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/gfx9: cache DB_DEBUG2 and make it available to userspace
Alex Deucher [Tue, 10 Apr 2018 15:15:26 +0000 (10:15 -0500)]
drm/amdgpu/gfx9: cache DB_DEBUG2 and make it available to userspace

Userspace needs to query this value to work around a hw bug in
certain cases.

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/ttm: keep a reference to transfer pipelined BOs
Christian König [Fri, 9 Mar 2018 12:39:47 +0000 (13:39 +0100)]
drm/ttm: keep a reference to transfer pipelined BOs

Make sure the transfered BO is never destroy before the transfer BO.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove useless smu7 running state check
Rex Zhu [Wed, 4 Apr 2018 10:41:08 +0000 (18:41 +0800)]
drm/amd/pp: Remove useless smu7 running state check

Only check smc running state before start smu.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Remove dead function in smu7_smumgr.c
Rex Zhu [Wed, 4 Apr 2018 10:33:15 +0000 (18:33 +0800)]
drm/amd/pp: Remove dead function in smu7_smumgr.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: initialzie the dpm intial enabled state
Kenneth Feng [Tue, 10 Apr 2018 09:05:36 +0000 (17:05 +0800)]
drm/amd/powerplay: initialzie the dpm intial enabled state

To expose the right dpm levels to the sysfs

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: Get more than 8 level gfxclk states
Kenneth Feng [Wed, 4 Apr 2018 07:17:22 +0000 (15:17 +0800)]
drm/amd/powerplay: Get more than 8 level gfxclk states

To apply on Vega12 for more than 8 gfx dpm levels

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamd/powerplay: implement the vega12_force_clock_level interface
Kenneth Feng [Mon, 9 Apr 2018 06:53:51 +0000 (14:53 +0800)]
amd/powerplay: implement the vega12_force_clock_level interface

pp_dpm_sclk/pp_dpm_mclk in sysfs implemented to force
gfxclk/uclk dpm level for Vega12

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add APU support in vi_set_vce_clocks
Rex Zhu [Tue, 10 Apr 2018 09:49:56 +0000 (17:49 +0800)]
drm/amdgpu: Add APU support in vi_set_vce_clocks

1. fix set vce clocks failed on Cz/St
   which lead 1s delay when boot up.
2. remove the workaround in vce_v3_0.c

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amdgpu: Add APU support in vi_set_uvd_clocks
Rex Zhu [Tue, 10 Apr 2018 09:17:22 +0000 (17:17 +0800)]
drm/amdgpu: Add APU support in vi_set_uvd_clocks

fix the issue set uvd clock failed on CZ/ST
which lead 1s delay when boot up.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/pp: Remove unnecessary forward declaration
Rex Zhu [Tue, 10 Apr 2018 02:58:43 +0000 (10:58 +0800)]
drm/amd/pp: Remove unnecessary forward declaration

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Move same macro definitions to hwmgr.h
Rex Zhu [Tue, 10 Apr 2018 02:58:43 +0000 (10:58 +0800)]
drm/amd/pp: Move same macro definitions to hwmgr.h

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: remove dummy is_blanked() to optimise boot time
Shirish S [Wed, 28 Mar 2018 06:52:22 +0000 (12:22 +0530)]
drm/amd/display: remove dummy is_blanked() to optimise boot time

is_blanked() hook is a dummy one for underlay pipe, hence
when called, it loops for ~300ms at boot.

This patch removes this dummy call and adds missing checks.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Don't spam debug messages
Harry Wentland [Mon, 9 Apr 2018 18:04:56 +0000 (14:04 -0400)]
drm/amd/display: Don't spam debug messages

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove PRE_VEGA flag
Harry Wentland [Mon, 9 Apr 2018 18:27:46 +0000 (14:27 -0400)]
drm/amd/display: Remove PRE_VEGA flag

We enabled this upstream by default now and no longer need the flag.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix 64-bit division in hwss_edp_power_control
Harry Wentland [Tue, 10 Apr 2018 20:08:44 +0000 (16:08 -0400)]
drm/amd/display: Fix 64-bit division in hwss_edp_power_control

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix and cleanup cpu visible VRAM handling
Christian König [Thu, 5 Apr 2018 14:42:03 +0000 (16:42 +0200)]
drm/amdgpu: fix and cleanup cpu visible VRAM handling

The detection if a BO was placed in CPU visible VRAM was incorrect.

Fix it and merge it with the correct detection in amdgpu_ttm.c

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use ctx bytes_moved
Christian König [Thu, 5 Apr 2018 12:46:41 +0000 (14:46 +0200)]
drm/amdgpu: use ctx bytes_moved

Instead of the global (inaccurate) counter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: fix the wrong readout engine clock in deep sleep
Evan Quan [Tue, 10 Apr 2018 05:05:49 +0000 (13:05 +0800)]
drm/amd/pp: fix the wrong readout engine clock in deep sleep

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: use soc15 common macros instead of vega10 specific
Evan Quan [Tue, 10 Apr 2018 04:32:16 +0000 (12:32 +0800)]
drm/amd/pp: use soc15 common macros instead of vega10 specific

pp_soc15.h is vega10 specific. Update powerplay code to use soc15 common
macros defined in soc15_common.h.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add MP1 and THM hw ip base reg offset
Evan Quan [Tue, 10 Apr 2018 04:30:59 +0000 (12:30 +0800)]
drm/amdgpu: add MP1 and THM hw ip base reg offset

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Refine pp_atomfwctrl_get_vbios_bootup_values
Rex Zhu [Wed, 4 Apr 2018 04:36:57 +0000 (12:36 +0800)]
drm/amd/pp: Refine pp_atomfwctrl_get_vbios_bootup_values

In order to share pp_atomfwctrl_get_vbios_bootup_values
on asics with different BIOS_CLKID.
Not call function pp_atomfwctrl_get_clk_information_by_clkid in
pp_atomfwctrl_get_vbios_bootup_values.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix null pointer panic with direct fw loading on gpu reset
Huang Rui [Sun, 8 Apr 2018 06:39:18 +0000 (14:39 +0800)]
drm/amdgpu: fix null pointer panic with direct fw loading on gpu reset

When system uses fw direct loading, then psp context structure won't be
initiliazed. And it is also unable to execute mode reset.

[  434.601474] amdgpu 0000:0c:00.0: GPU reset begin!
[  434.694326] amdgpu 0000:0c:00.0: GPU reset
[  434.743152] BUG: unable to handle kernel NULL pointer dereference at
0000000000000058
[  434.838474] IP: psp_gpu_reset+0xc/0x30 [amdgpu]
[  434.893532] PGD 406ed9067
[  434.893533] P4D 406ed9067
[  434.926376] PUD 400b46067
[  434.959217] PMD 0
[  435.033379] Oops: 0000 [#1] SMP
[  435.072573] Modules linked in: amdgpu(OE) chash(OE) gpu_sched(OE) ttm(OE)
drm_kms_helper(OE) drm(OE) fb_sys_fops syscopyarea sysfillrect sysimgblt
rpcsec_gss_krb5 auth_rpcgss nfsv4 nfs lockd grace fscache snd_hda_codec_realtek
snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec
snd_hda_core snd_hwdep snd_pcm edac_mce_amd snd_seq_midi snd_seq_midi_event
kvm_amd snd_rawmidi kvm irqbypass crct10dif_pclmul crc32_pclmul snd_seq
ghash_clmulni_intel snd_seq_device pcbc snd_timer eeepc_wmi aesni_intel snd
asus_wmi aes_x86_64 sparse_keymap crypto_simd glue_helper joydev soundcore
wmi_bmof cryptd video i2c_piix4 shpchp 8250_dw i2c_designware_platform mac_hid
i2c_designware_core sunrpc parport_pc ppdev lp parport autofs4 hid_generic igb
usbhid dca ptp mxm_wmi pps_core ahci hid i2c_algo_bit
[  435.931754]  libahci wmi

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: add PX quirk for Asus K73TK
Nico Sneck [Sat, 7 Apr 2018 15:13:04 +0000 (15:13 +0000)]
drm/radeon: add PX quirk for Asus K73TK

With this the dGPU turns on correctly.

Signed-off-by: Nico Sneck <nicosneck@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amd/display: Fix memleak on input transfer function
Leo (Sunpeng) Li [Wed, 4 Apr 2018 20:01:30 +0000 (16:01 -0400)]
drm/amd/display: Fix memleak on input transfer function

Input transfer function creation is now done when the plane is created.
This is done within the following change:

    Author: Anthony Koo <Anthony.Koo@amd.com>
        drm/amd/display: Have DC manage its own allocation of gamma

Therefore, we no longer need to create it when filling in the plane
attributes.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix dim display on DCE11
Leo (Sunpeng) Li [Thu, 29 Mar 2018 21:04:12 +0000 (17:04 -0400)]
drm/amd/display: Fix dim display on DCE11

Before programming the input gamma, check that we're not using the
identity correction.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Have DC manage its own allocation of gamma
Anthony Koo [Tue, 27 Mar 2018 20:43:56 +0000 (16:43 -0400)]
drm/amd/display: Have DC manage its own allocation of gamma

Creating plane will also allocate gamma and input TF
Creating stream will also allocate outputTF

Fix issue with gamma not applied
OS may call SetGamma before surface committed, so need to store
in target and apply later.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix structure initialization of hdmi_info_packet
Anthony Koo [Wed, 28 Mar 2018 03:12:21 +0000 (23:12 -0400)]
drm/amd/display: Fix structure initialization of hdmi_info_packet

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: move color_transfer_func to color mod
Anthony Koo [Mon, 26 Mar 2018 20:29:51 +0000 (16:29 -0400)]
drm/amd/display: move color_transfer_func to color mod

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor color module
Anthony Koo [Mon, 9 Apr 2018 19:57:47 +0000 (14:57 -0500)]
drm/amd/display: Refactor color module

Remove some unnecessary TF definitions from update structures

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: csc_transform to dc_csc_transform
Anthony Koo [Mon, 26 Mar 2018 20:19:18 +0000 (16:19 -0400)]
drm/amd/display: csc_transform to dc_csc_transform

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Do not use os types
Anthony Koo [Mon, 26 Mar 2018 20:14:31 +0000 (16:14 -0400)]
drm/amd/display: Do not use os types

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove unused fields
Anthony Koo [Sun, 25 Mar 2018 20:55:05 +0000 (16:55 -0400)]
drm/amd/display: Remove unused fields

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Get rid of unused input_tf
Anthony Koo [Sun, 25 Mar 2018 20:41:06 +0000 (16:41 -0400)]
drm/amd/display: Get rid of unused input_tf

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Updated HDR Static Metadata to directly take info packet raw
Anthony Koo [Mon, 9 Apr 2018 19:55:17 +0000 (14:55 -0500)]
drm/amd/display: Updated HDR Static Metadata to directly take info packet raw

Updated HDR Static Metadata to directly take info packet raw

Updating Infopacket does not require Passive

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.41
Yongqiang Sun [Thu, 29 Mar 2018 17:11:10 +0000 (13:11 -0400)]
drm/amd/display: dal 3.1.41

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix FBC text console corruption
Roman Li [Thu, 29 Mar 2018 15:14:25 +0000 (11:14 -0400)]
drm/amd/display: Fix FBC text console corruption

Signed-off-by: Roman Li <roman.li@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: csc updates require FULL update
Anthony Koo [Thu, 29 Mar 2018 15:23:37 +0000 (11:23 -0400)]
drm/amd/display: csc updates require FULL update

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Make DCN stream encoder shareable
Eric Bernstein [Mon, 26 Mar 2018 20:28:03 +0000 (16:28 -0400)]
drm/amd/display: Make DCN stream encoder shareable

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Update scaler v_active data if interlaced
Dmytro Laktyushkin [Mon, 26 Mar 2018 16:33:22 +0000 (12:33 -0400)]
drm/amd/display: Update scaler v_active data if interlaced

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Change disable backlight ramp change threshold from 0 to maximum...
Yongqiang Sun [Tue, 27 Mar 2018 14:05:10 +0000 (10:05 -0400)]
drm/amd/display: Change disable backlight ramp change threshold from 0 to maximum value.

Instead of user set brightness with range of percentage,
HLK test set brightness level with range of normal, this will result in
HLK test case set brightness from 0 to 255, DC set brightness with ramp is 0,
and disabled ramp change which will fail the HLK test.
Fix:
In case of unblank stream and turn on edp, change brightness level in
stream to 0xFFFFFFFF(actural maximum level is 0xFF), use that value as
a flag to recogonize this the case of resume from S3.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fill calcs date from stream src/dst if available
Jun Lei [Mon, 26 Mar 2018 18:01:41 +0000 (14:01 -0400)]
drm/amd/display: Fill calcs date from stream src/dst if available

We would otherwise fallback to the timing, which would always give us
identity.

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix link bw calculation for 422 and 420 encoding
Eric Yang [Fri, 23 Mar 2018 17:56:16 +0000 (13:56 -0400)]
drm/amd/display: fix link bw calculation for 422 and 420 encoding

Link bw required is reduced when we have chroma subsampling.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: remove unused enum
Jun Lei [Thu, 1 Mar 2018 13:58:02 +0000 (08:58 -0500)]
drm/amd/display: remove unused enum

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor stream encoder for HW review
Eric Bernstein [Mon, 19 Mar 2018 18:41:59 +0000 (14:41 -0400)]
drm/amd/display: Refactor stream encoder for HW review

Move DCN1 implementation of stream encoder to new file (instead
of common dce_stream_encoder.c).
Cleanup code related to different implementation due to register
definition differences.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set all update flags when we have full update
Eric Yang [Wed, 14 Mar 2018 21:56:58 +0000 (17:56 -0400)]
drm/amd/display: Set all update flags when we have full update

To prevent future optimization related bugs, just set all update
flags when we have a full update, since we know we want to reprogram
everything in that case.

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add delay between panel pwr off to on.
Charlene Liu [Tue, 20 Mar 2018 18:53:04 +0000 (14:53 -0400)]
drm/amd/display: add delay between panel pwr off to on.

As per eDP 1.4 spec, there must be at least 500ms delay
between eDP power off and on.
This change added time stamp when edp power off, which can
be used to calculate duration time when edp power on.
If duration less than 500ms, add a wait.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Implement dm_get_timestamp
Harry Wentland [Fri, 23 Mar 2018 17:39:27 +0000 (13:39 -0400)]
drm/amd/display: Implement dm_get_timestamp

We use this to ensure we wait at least 500ms in between eDP
disable/enable.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add vmax/min_sel prints to dcn10_log_hw_state
Anthony Koo [Thu, 15 Mar 2018 17:34:16 +0000 (13:34 -0400)]
drm/amd/display: Add vmax/min_sel prints to dcn10_log_hw_state

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add Dynamic debug prints
Bhawanpreet Lakha [Thu, 15 Mar 2018 17:01:46 +0000 (13:01 -0400)]
drm/amd/display: Add Dynamic debug prints

Created Macros for DC_LOG_XXX to pr_debug() & DRM_DEBUG_KMS.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix potential access beyond end of array in CM
Harry Wentland [Wed, 14 Mar 2018 19:54:27 +0000 (15:54 -0400)]
drm/amd/display: Fix potential access beyond end of array in CM

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
CC: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Non-HDMI DP active dongle should not support YUV pixel format
Hersen Wu [Mon, 19 Mar 2018 19:22:51 +0000 (15:22 -0400)]
drm/amd/display: Non-HDMI DP active dongle should not support YUV pixel format

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set ignore_msa_timing_param
Harry Wentland [Thu, 15 Mar 2018 19:08:04 +0000 (15:08 -0400)]
drm/amd/display: Set ignore_msa_timing_param

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Program v_total_min/max after v_total_cntl
Anthony Koo [Thu, 15 Mar 2018 17:46:50 +0000 (13:46 -0400)]
drm/amd/display: Program v_total_min/max after v_total_cntl

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Don't register backlight on connector_destroy
Harry Wentland [Mon, 12 Mar 2018 15:48:26 +0000 (11:48 -0400)]
drm/amd/display: Don't register backlight on connector_destroy

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Only register backlight device if embedded panel connected
Harry Wentland [Mon, 12 Mar 2018 15:16:47 +0000 (11:16 -0400)]
drm/amd/display: Only register backlight device if embedded panel connected

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Don't access legacy properties
Harry Wentland [Tue, 17 Oct 2017 16:02:01 +0000 (12:02 -0400)]
drm/amd/display: Don't access legacy properties

We're an atomic driver and shouldn't access legacy properties. Doing so
will only scare users with stack traces.

Instead save the prop in the state and access it directly. Much simpler.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Added support for MV packet
James Zhu [Tue, 3 Apr 2018 14:41:32 +0000 (10:41 -0400)]
drm/amdgpu: Added support for MV packet

Motion vector packet needs support in physical mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/sched: Extend the documentation.
Eric Anholt [Wed, 4 Apr 2018 22:32:51 +0000 (15:32 -0700)]
drm/sched: Extend the documentation.

These comments answer all the questions I had for myself when
implementing a driver using the GPU scheduler.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add new bo flag that indicates BOs don't need fallback (v2)
Chunming Zhou [Mon, 2 Apr 2018 03:20:44 +0000 (11:20 +0800)]
drm/amdgpu: add new bo flag that indicates BOs don't need fallback (v2)

user cases:
1. KFD wraps amdgpu_bo_create, they have no fallback case which is different
with amdgpu_gem_object_create.
since upstream branch has no amdgpu_amdkfd_gpuvm.c, which need KFD
guys add this flag to __alloc_memory_of_gpu:
+       flags |= AMDGPU_GEM_CREATE_NO_FALLBACK;
2. UMD can specify this flag for their allocation as well if they like.

v2: squash in merge conflict fix (Chunming)

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: felix.kuehling@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Don't change preferred domian when fallback GTT v6
Chunming Zhou [Fri, 16 Mar 2018 04:29:38 +0000 (12:29 +0800)]
drm/amdgpu: Don't change preferred domian when fallback GTT v6

v2: add sanity checking
v3: make code open
v4: also handle visible to invisible fallback
v5: Since two fallback cases, re-use goto retry
v6: avoid bo is unref when retry, and only user BO can fallback

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (v5)
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: felix.kuehling@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: move the tracepoints file from the include directory
Nayan Deshmukh [Thu, 29 Mar 2018 17:06:33 +0000 (22:36 +0530)]
drm/scheduler: move the tracepoints file from the include directory

Move it with the scheduler code. This is mostly a straight forward
rename with no code change except for updating the TRACE_INCLUDE_PATH

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: fix param documentation
Nayan Deshmukh [Thu, 29 Mar 2018 17:06:31 +0000 (22:36 +0530)]
drm/scheduler: fix param documentation

There is no @kernel parameter anymore and document the
@guilty parameter

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix spelling mistake: "Usupported" -> "Unsupported"
Colin Ian King [Fri, 30 Mar 2018 16:00:47 +0000 (17:00 +0100)]
drm/amd/display: fix spelling mistake: "Usupported" -> "Unsupported"

Trivial fix to spelling mistake in DRM_ERROR error message text

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use new asic need_full_reset callback
Alex Deucher [Thu, 29 Mar 2018 19:48:37 +0000 (14:48 -0500)]
drm/amdgpu: use new asic need_full_reset callback

Use the new callback to determine whether to use full
asic reset or per IP soft reset.  Enables reset to
actually proceed on asics which don't support soft
reset yet.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/soc15: implement asic need_full_reset callback
Alex Deucher [Thu, 29 Mar 2018 19:39:46 +0000 (14:39 -0500)]
drm/amdgpu/soc15: implement asic need_full_reset callback

Used to check on a per SoC basis whether the SoC needs
a full reset of a per IP soft reset.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/vi: implement asic need_full_reset callback
Alex Deucher [Thu, 29 Mar 2018 19:39:28 +0000 (14:39 -0500)]
drm/amdgpu/vi: implement asic need_full_reset callback

Used to check on a per SoC basis whether the SoC needs
a full reset of a per IP soft reset.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/cik: implement asic need_full_reset callback
Alex Deucher [Thu, 29 Mar 2018 19:39:10 +0000 (14:39 -0500)]
drm/amdgpu/cik: implement asic need_full_reset callback

Used to check on a per SoC basis whether the SoC needs
a full reset of a per IP soft reset.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/si: implement asic need_full_reset callback
Alex Deucher [Tue, 3 Apr 2018 18:27:14 +0000 (13:27 -0500)]
drm/amdgpu/si: implement asic need_full_reset callback

Used to check on a per SoC basis whether the SoC needs
a full reset of a per IP soft reset.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add asic need_full_reset callback
Alex Deucher [Thu, 29 Mar 2018 18:51:28 +0000 (13:51 -0500)]
drm/amdgpu: add asic need_full_reset callback

Allow us to determine at the soc level whether the
asic requires full reset or if soft reset will work.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add documentation on hwmon interfaces exposed (v3)
Alex Deucher [Mon, 26 Mar 2018 17:56:56 +0000 (12:56 -0500)]
drm/amdgpu: add documentation on hwmon interfaces exposed (v3)

Provide detail on the currently exposed hwmon interfaces
for temperature, power, voltage, and fan.

v2: add power cap documentation
v3: add a comment about sensors tool

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Move GEM BO to drm_framebuffer
Daniel Stone [Fri, 30 Mar 2018 14:11:38 +0000 (15:11 +0100)]
drm/amdgpu: Move GEM BO to drm_framebuffer

Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle and destroy functions the same as the GEM framebuffer
helper, we can reuse those.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: David (ChunMing) Zhou <David1.Zhou@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: radeon_framebuffer -> drm_framebuffer
Daniel Stone [Fri, 30 Mar 2018 14:11:37 +0000 (15:11 +0100)]
drm/radeon: radeon_framebuffer -> drm_framebuffer

Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle and destroy functions the same as the GEM framebuffer
helper, we can reuse those.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: David (ChunMing) Zhou <David1.Zhou@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: Move GEM BO to drm_framebuffer
Daniel Stone [Fri, 30 Mar 2018 14:11:36 +0000 (15:11 +0100)]
drm/radeon: Move GEM BO to drm_framebuffer

Since drm_framebuffer can now store GEM objects directly, place them
there rather than in our own subclass. As this makes the framebuffer
create_handle and destroy functions the same as the GEM framebuffer
helper, we can reuse those.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: David (ChunMing) Zhou <David1.Zhou@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>