openwrt/staging/blogic.git
5 years agodrm/amdgpu: add irq sources for gfx v10_1
Hawking Zhang [Wed, 5 Dec 2018 21:23:34 +0000 (05:23 +0800)]
drm/amdgpu: add irq sources for gfx v10_1

Add the interrupt source packet definitions.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gmc v10 ip block for navi10 (v6)
Hawking Zhang [Mon, 4 Mar 2019 08:27:14 +0000 (16:27 +0800)]
drm/amdgpu: add gmc v10 ip block for navi10 (v6)

GMC in the GPU memory controller.

v1: add place holder and initial basic implementation (Ray)
v2: retire unused amdgpu_gart_set_defaults (Hawking)
v3: re-work get_vm_pde function (Hawking)
v4: replace legacy amdgpu_vram/gtt_location with
    amdgpu_gmc_vram/gtt_location (Hawking)
v5: squash in updates (Alex)
v6: use get_vbios_fb_size (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add mmhub v2 block for navi10 (v4)
Hawking Zhang [Mon, 4 Mar 2019 05:49:28 +0000 (13:49 +0800)]
drm/amdgpu: add mmhub v2 block for navi10 (v4)

mmhub is the memory controller hub for multi-media (VCN).

v1: add place holder and initial functions (Ray)
v2: replace legacy amdgpu_mc structure with amdgpu_gmc (Hawking)
v3: switch to use amdgpu_gmc_pd_addr (Hawking)
v4: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gfxhub v2.0 block for navi10 (v4)
Hawking Zhang [Mon, 4 Mar 2019 08:18:27 +0000 (16:18 +0800)]
drm/amdgpu: add gfxhub v2.0 block for navi10 (v4)

gfxhub is the memory controller hub for gfx and sdma.

v1: add place holder and initial basic functions (Ray)
v2: replace the refernce to legacy mc structure with gmc structure
    remove the direct use of gart.table_addr (Hawking)
v3: switch to use amdgpu_gmc_pd_addr (Hawking)
v4: squash in updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: refine the PTE encoding of PRT for navi10
Jack Xiao [Fri, 22 Feb 2019 07:34:00 +0000 (15:34 +0800)]
drm/amdgpu: refine the PTE encoding of PRT for navi10

Due to GCR change from navi10, the PTE encoding of PRT
needs change VSCTL = 01111 (was 0XX1X).

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/gmc9: rename AMDGPU_PTE_MTYPE to AMDGPU_PTE_MTYPE_VG10
Hawking Zhang [Mon, 25 Jun 2018 13:03:40 +0000 (21:03 +0800)]
drm/amd/gmc9: rename AMDGPU_PTE_MTYPE to AMDGPU_PTE_MTYPE_VG10

To differentiate the mtypes across asics.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: correct pte mtype field for navi
Hawking Zhang [Fri, 12 Apr 2019 23:17:24 +0000 (18:17 -0500)]
drm/amdgpu: correct pte mtype field for navi

The MTYPE filed moves from bits 58:57 to 50:48 for NV10
And the size of MTYPE field is now 3bits

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/athub2: enable athub2 clock gating
Jack Xiao [Wed, 13 Feb 2019 10:43:03 +0000 (18:43 +0800)]
drm/amdgpu/athub2: enable athub2 clock gating

Enable athub2 clock gating and light sleep

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add flag to support IH clock gating
Hawking Zhang [Sat, 2 Feb 2019 07:03:11 +0000 (15:03 +0800)]
drm/amdgpu: add flag to support IH clock gating

Add new flag for IH (interrupt handler) clockgating.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add new HDP CG flags
Hawking Zhang [Wed, 29 Aug 2018 13:18:19 +0000 (21:18 +0800)]
drm/amdgpu: add new HDP CG flags

HDP 5.0 supports SRAM power gating. all the LS (Light Sleep)/
DS (Deep Sleep)/SD (Shut Down) modes are supported. However,
only one of these modes can be enabled at one time.

There is no dynamic power mode switch support. clock/power gating
has to be disabled before making any power mode change.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: create mqd for gfx queues on navi10
Hawking Zhang [Tue, 14 Aug 2018 12:54:35 +0000 (20:54 +0800)]
drm/amdgpu: create mqd for gfx queues on navi10

mqd is the memory queue descriptor for gfx and compute.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable async gfx ring by default
Jack Xiao [Thu, 21 Mar 2019 10:20:23 +0000 (18:20 +0800)]
drm/amdgpu: enable async gfx ring by default

VDDGFX requires gfx queue to be installed via MAP_QUEUES packet.
Hence, enable async gfx ring by default.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add module parameter for async_gfx_ring enablement
Hawking Zhang [Tue, 31 Jul 2018 07:00:40 +0000 (15:00 +0800)]
drm/amdgpu: add module parameter for async_gfx_ring enablement

0 means disable async_gfx_ring and is the default setting
1 means enable async_gfx_ring

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: enable gfx eop interrupt per gfx pipe
Hawking Zhang [Mon, 11 Mar 2019 14:04:44 +0000 (22:04 +0800)]
drm/amdgpu: enable gfx eop interrupt per gfx pipe

Navi10 has 2 gfx pipe and need to enable gfx eop interrupt
per pipe, instead of enable eop int for all gfx pipes at one
time.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: add special unmap_queues packet for preemption
Jack Xiao [Tue, 8 Jan 2019 05:33:46 +0000 (13:33 +0800)]
drm/amdgpu/gfx10: add special unmap_queues packet for preemption

CP introduced a special unmap_queues packet for gfx preemtion.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Move common code to amdgpu_gfx.c
Hawking Zhang [Tue, 5 Mar 2019 14:05:02 +0000 (22:05 +0800)]
drm/amdgpu: Move common code to amdgpu_gfx.c

move common code to amdgpu_gfx_enable_kcq,so
this function can be shared with gfx8 and gfx9

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add common gfx func Disable kcq via kiq
Rex Zhu [Wed, 22 Aug 2018 05:45:25 +0000 (13:45 +0800)]
drm/amdgpu: Add common gfx func Disable kcq via kiq

so can be shared with gfx8 and gfx9

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add struct kiq_pm4_funcs into kiq struct
Rex Zhu [Wed, 22 Aug 2018 03:44:20 +0000 (11:44 +0800)]
drm/amdgpu: Add struct kiq_pm4_funcs into kiq struct

kiq can support 4 pm4 scheduler packets
set_resource, map_queues, unmap_queues, query_status.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: rename amdgpu_gfx_compute_mqd_sw_init
Hawking Zhang [Wed, 1 Aug 2018 04:03:20 +0000 (12:03 +0800)]
drm/amdgpu: rename amdgpu_gfx_compute_mqd_sw_init

The function now will create mqd bos for both gfx queue and compute queue

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add helper function for gfx queue/bitmap transition
Hawking Zhang [Tue, 31 Jul 2018 07:43:10 +0000 (15:43 +0800)]
drm/amdgpu: add helper function for gfx queue/bitmap transition

Similar to what we do for compute already.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: acquire available gfx queues
Hawking Zhang [Wed, 8 Aug 2018 07:16:43 +0000 (15:16 +0800)]
drm/amdgpu: acquire available gfx queues

currently, amdgpu will owns the first gfx queue of each pipe
they are:
me:0 pipe:0 queue:0
me:0 pipe:1 queue:0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add members in amdgpu_me for gfx queue
Hawking Zhang [Fri, 3 Aug 2018 09:26:33 +0000 (17:26 +0800)]
drm/amdgpu: add members in amdgpu_me for gfx queue

Update the structure for gfx10.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <jack.xiao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: new approach to load gfx10 me fw (v4)
Hawking Zhang [Mon, 4 Sep 2017 09:17:39 +0000 (17:17 +0800)]
drm/amdgpu/gfx10: new approach to load gfx10 me fw (v4)

gfx10 allows to only upload me jumptable while save the whole
me image at gtt memory.

v2: program CP_ME_IC_BASE_CNTL to default value
v3: switch to use amdgpu_bo_create_reserved to create me fw bo
v4: split common code from gfx10 code

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: new approach to load ce fw (v4)
Hawking Zhang [Mon, 4 Sep 2017 09:14:47 +0000 (17:14 +0800)]
drm/amdgpu/gfx10: new approach to load ce fw (v4)

gfx10 allows to only upload ce jumptable while save the whole
ce image at gtt memory.

v2: program CP_CE_IC_BASE_CNTL to default value
v3: switch to use amdgpu_bo_create_reserved to create ce fw bo
v4: split common code from gfx10 code

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/gfx10: new approach to load pfp fw (v4)
Hawking Zhang [Wed, 10 Jan 2018 10:12:44 +0000 (18:12 +0800)]
drm/amdgpu/gfx10: new approach to load pfp fw (v4)

gfx10 allows to only upload pfp jumptable while save the whole
pfp image at gtt memory.

v2: program CP_PFP_IC_BASE_CNTL to default value
v3: switch to use amdgpu_bo_create_reserved to create pfp fw bo
v4: split common code from gfx10 code

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add nbio v2.3 for navi10 (v4)
Hawking Zhang [Fri, 12 Apr 2019 21:51:19 +0000 (16:51 -0500)]
drm/amdgpu: add nbio v2.3 for navi10 (v4)

nbio handles bus io functionality.

v1: add place holder and initial basic nbio v2.3 functions (Ray)
v2: implements and expose all functions in format of nbio_v2_3_funcs (Hawking)
v3: squash in updates (Alex)
v4: whitespace fix (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add nbio callbacks for vcn doorbell support
Leo Liu [Tue, 16 Oct 2018 13:54:20 +0000 (09:54 -0400)]
drm/amdgpu: add nbio callbacks for vcn doorbell support

For Navi10 VCN2.0, the engine supports Doorbell

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: query vram_width from vram_info table
Hawking Zhang [Mon, 10 Dec 2018 23:12:16 +0000 (07:12 +0800)]
drm/amdgpu: query vram_width from vram_info table

Driver will get channel_number and channel_width from
vram_info table, then calculate vram_width by multiply
channel_number by channel_width

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: query vram type from atomfirmware vram_info
Hawking Zhang [Mon, 10 Dec 2018 21:20:12 +0000 (05:20 +0800)]
drm/amdgpu: query vram type from atomfirmware vram_info

vram_type is saved in member vram_module[0].memory_type

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add navi pm4 header
Hawking Zhang [Mon, 4 Mar 2019 06:29:55 +0000 (14:29 +0800)]
drm/amdgpu: add navi pm4 header

A pm4 header for Navi. PM4 is the packet format used
by the compute and gfx engines.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add sdma v5 packet header file
Hawking Zhang [Sun, 3 Mar 2019 05:13:05 +0000 (13:13 +0800)]
drm/amdgpu: add sdma v5 packet header file

Defines the SDMA packet formats.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gfx v10 clear state header v2
Huang Rui [Wed, 9 Aug 2017 12:48:04 +0000 (20:48 +0800)]
drm/amdgpu: add gfx v10 clear state header v2

Clear state for gfx pipe.

v2: squash in updates

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add v10 structs header (v2)
Huang Rui [Thu, 14 Sep 2017 12:34:37 +0000 (20:34 +0800)]
drm/amdgpu: add v10 structs header (v2)

Header for CP structures (MQD, etc.)

V2: squash in updates

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: parse the new members added by gpu_info ucode v1_1
Hawking Zhang [Wed, 13 Jun 2018 04:19:43 +0000 (12:19 +0800)]
drm/amdgpu: parse the new members added by gpu_info ucode v1_1

Parse the new parameters for gfx10.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gpu_info_firmware v1_1 structure for navi10
Hawking Zhang [Wed, 13 Jun 2018 03:18:42 +0000 (11:18 +0800)]
drm/amdgpu: add gpu_info_firmware v1_1 structure for navi10

two new members that specific for navi10 are included in v2_0:
num_sc_per_sh and num_packer_per_sc

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add navi10 gpu info firmware
Huang Rui [Fri, 4 Aug 2017 03:10:15 +0000 (11:10 +0800)]
drm/amdgpu: add navi10 gpu info firmware

gpu info firmware stores configuration data for various
IP blocks.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gfx10 specific new member pa_sc_tile_steering_override
Hawking Zhang [Tue, 12 Jun 2018 09:10:19 +0000 (17:10 +0800)]
drm/amdgpu: add gfx10 specific new member pa_sc_tile_steering_override

New gfx config parameter.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add gfx10 specific config in amdgpu_gfx_config
Hawking Zhang [Tue, 12 Jun 2018 09:05:59 +0000 (17:05 +0800)]
drm/amdgpu: add gfx10 specific config in amdgpu_gfx_config

The two members are used to cache the values from gpu_info fw accordingly

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Add GDDR6 in vram_name arrary
Hawking Zhang [Wed, 2 May 2018 09:52:39 +0000 (17:52 +0800)]
drm/amdgpu: Add GDDR6 in vram_name arrary

For printing vram type.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add GDDR6 vram type
Huang Rui [Tue, 18 Jul 2017 10:59:24 +0000 (18:59 +0800)]
drm/amdgpu: add GDDR6 vram type

New vram type.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add NV series gpu family id
Huang Rui [Wed, 19 Jul 2017 01:43:26 +0000 (09:43 +0800)]
drm/amdgpu: add NV series gpu family id

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add navi10 asic type
Huang Rui [Tue, 18 Jul 2017 11:27:55 +0000 (19:27 +0800)]
drm/amdgpu: add navi10 asic type

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add navi10 ip offset header
Hawking Zhang [Mon, 4 Mar 2019 07:53:41 +0000 (15:53 +0800)]
drm/amdgpu: add navi10 ip offset header

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add doorbell assignement for navi10
Hawking Zhang [Fri, 12 Apr 2019 19:13:08 +0000 (14:13 -0500)]
drm/amdgpu: add doorbell assignement for navi10

Update mappings for Navi10.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: atomfirmware.h updates for navi10
Hawking Zhang [Fri, 12 Apr 2019 19:08:00 +0000 (14:08 -0500)]
drm/amdgpu: atomfirmware.h updates for navi10

Updated tables for Navi10.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add navi10 enums header
Hawking Zhang [Mon, 4 Mar 2019 07:51:48 +0000 (15:51 +0800)]
drm/amdgpu: add navi10 enums header

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add SMUIO 11.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:32:16 +0000 (11:32 +0800)]
drm/amdgpu: add SMUIO 11.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add OSS 5.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:30:47 +0000 (11:30 +0800)]
drm/amdgpu: add OSS 5.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add MMHUB 2.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:29:18 +0000 (11:29 +0800)]
drm/amdgpu: add MMHUB 2.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add GC 10.1 register headers (v4)
Hawking Zhang [Sun, 3 Mar 2019 03:27:27 +0000 (11:27 +0800)]
drm/amdgpu: add GC 10.1 register headers (v4)

v2: Update regs (Alex)
v3: More updates (Alex)
v4: more updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add VCN 2.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:23:35 +0000 (11:23 +0800)]
drm/amdgpu: add VCN 2.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add NBIO 2.3 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:17:25 +0000 (11:17 +0800)]
drm/amdgpu: add NBIO 2.3 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add MP 11.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:15:26 +0000 (11:15 +0800)]
drm/amdgpu: add MP 11.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add HDP 5.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:10:29 +0000 (11:10 +0800)]
drm/amdgpu: add HDP 5.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add DCN 2.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:05:29 +0000 (11:05 +0800)]
drm/amdgpu: add DCN 2.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add CLK 11.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 03:02:58 +0000 (11:02 +0800)]
drm/amdgpu: add CLK 11.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add ATHUB 2.0 register headers
Hawking Zhang [Sun, 3 Mar 2019 02:57:10 +0000 (10:57 +0800)]
drm/amdgpu: add ATHUB 2.0 register headers

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Copy stream updates onto streams"
Alex Deucher [Mon, 17 Jun 2019 18:10:48 +0000 (13:10 -0500)]
Revert "drm/amd/display: Copy stream updates onto streams"

This reverts commit 6e5155ae6b66054db35d8f3c64f9863b9d0466c1.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Use macro for invalid OPP ID"
Alex Deucher [Mon, 17 Jun 2019 18:08:58 +0000 (13:08 -0500)]
Revert "drm/amd/display: Use macro for invalid OPP ID"

This reverts commit 1760bd06c8e94e1b184139ae35201856403638cf.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Rework CRTC color management"
Alex Deucher [Mon, 17 Jun 2019 18:08:40 +0000 (13:08 -0500)]
Revert "drm/amd/display: Rework CRTC color management"

This reverts commit 7cd4b70091a5cfa1f58d3a529535304a116acc95.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: move vmid determination logic out of dc"
Alex Deucher [Mon, 17 Jun 2019 18:06:37 +0000 (13:06 -0500)]
Revert "drm/amd/display: move vmid determination logic out of dc"

This reverts commit 11cd74cdb98aa6f4d6f54a0082dd28e0d4743746.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Add Underflow Asserts to dc"
Alex Deucher [Mon, 17 Jun 2019 18:06:19 +0000 (13:06 -0500)]
Revert "drm/amd/display: Add Underflow Asserts to dc"

This reverts commit 9ed43ef84d9d1e668acdf43c95510fb7b11f8d71.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: make clk_mgr call enable_pme_wa"
Alex Deucher [Mon, 17 Jun 2019 18:04:43 +0000 (13:04 -0500)]
Revert "drm/amd/display: make clk_mgr call enable_pme_wa"

This reverts commit a1651530a3bacf1d796fdb7bc587faef9f305d36.

Revert this to apply the version that includes DCN2 support.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amd/display: Enable fast plane updates when state->allow_modeset = true"
Nicholas Kazlauskas [Thu, 20 Jun 2019 12:30:09 +0000 (08:30 -0400)]
Revert "drm/amd/display: Enable fast plane updates when state->allow_modeset = true"

This reverts commit ebc8c6f18322ad54275997a888ca1731d74b711f.

There are still missing corner cases with cursor interaction and these
fast plane updates on Picasso and Raven2 leading to endless PSTATE
warnings for typical desktop usage depending on the userspace.

This change should be reverted until these issues have been resolved.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110949
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <david.francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu/sriov: fix Tonga load driver failed
Jack Zhang [Thu, 20 Jun 2019 05:44:47 +0000 (13:44 +0800)]
drm/amdgpu/sriov: fix Tonga load driver failed

Tonga sriov need to use smu to load firmware.
Remove sriov flag because the default return value is zero.

Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Reviewed-by: Trigger Huang <Trigger.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: add pmu counters
Jonathan Kim [Thu, 20 Jun 2019 03:56:25 +0000 (23:56 -0400)]
drm/amdgpu: add pmu counters

adding perf event counters

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: update df_v3_6 for xgmi perfmons (v2)
Jonathan Kim [Thu, 20 Jun 2019 03:37:59 +0000 (23:37 -0400)]
drm/amdgpu: update df_v3_6 for xgmi perfmons (v2)

add pmu attribute groups and structures for perf events.
add sysfs to track available df perfmon counters
fix overflow handling in perfmon counter reads.

v2: squash in fix (Alex)

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Fix null-deref on vega20 with xgmi
Roman Li [Tue, 18 Jun 2019 15:25:25 +0000 (11:25 -0400)]
drm/amd/display: Fix null-deref on vega20 with xgmi

[Why]
After clkmgr rework it gets initialized after resource pool.
The clkmgr is used in resource pool init for xgmi path.
That causes driver crash on Vega20 with xgmi due to NULL deref.

[How]
Move xgmi compensation code to dce121_clk_mgr_construct()
That also allows to make dce121_clock_patch_xgmi_ss_info()
internal static function.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Add procfs-style information for KFD processes
Kent Russell [Thu, 13 Jun 2019 13:55:40 +0000 (09:55 -0400)]
drm/amdkfd: Add procfs-style information for KFD processes

Add a folder structure to /sys/class/kfd/kfd/ called proc which contains
subfolders, each representing an active KFD process' PID, containing 1
file: pasid.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: improve HMM error -ENOMEM and -EBUSY handling
Philip Yang [Fri, 14 Jun 2019 18:03:36 +0000 (14:03 -0400)]
drm/amdgpu: improve HMM error -ENOMEM and -EBUSY handling

Under memory pressure, hmm_range_fault may return error code -ENOMEM
or -EBUSY, change pr_info to pr_debug to remove unnecessary kernel log
message because we will retry restore again.

Call get_user_pages_done if TTM get user pages failed will have
WARN_ONCE kernel calling stack dump log.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: cast mem->num_pages to 64-bits when shifting (v2)
Tom St Denis [Fri, 14 Jun 2019 15:47:21 +0000 (11:47 -0400)]
drm/amd/amdgpu: cast mem->num_pages to 64-bits when shifting (v2)

On 32-bit hosts mem->num_pages is 32-bits and can overflow
when shifted.  Add a cast to avoid this.

(v2): Style fix.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Do error injection even vram reserve fails
xinhui pan [Fri, 14 Jun 2019 08:06:10 +0000 (16:06 +0800)]
drm/amdgpu: Do error injection even vram reserve fails

As long as the address is mapped with vram, we can do an error
injection.

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: wait to fetch the vbios until after common init
Alex Deucher [Mon, 17 Jun 2019 14:37:45 +0000 (09:37 -0500)]
drm/amdgpu: wait to fetch the vbios until after common init

We need the asic_funcs set for the get rom callbacks in some
cases.

Tested-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: Delete a redundant memory setting in vega20_set_default_od8_settti...
Markus Elfring [Mon, 17 Jun 2019 12:24:14 +0000 (14:24 +0200)]
drm/amd/powerplay: Delete a redundant memory setting in vega20_set_default_od8_setttings()

The memory was set to zero already by a call of the function “kzalloc”.
Thus remove an extra call of the function “memset” for this purpose.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Delete a redundant memory setting in amdgpu_dm_irq_register_interrupt()
Markus Elfring [Mon, 17 Jun 2019 11:56:39 +0000 (13:56 +0200)]
drm/amd/display: Delete a redundant memory setting in amdgpu_dm_irq_register_interrupt()

The memory was set to zero already by a call of the function “kzalloc”.
Thus remove an extra call of the function “memset” for this purpose.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: fix error handling in df_v3_6_pmc_start
Arnd Bergmann [Mon, 17 Jun 2019 12:51:45 +0000 (14:51 +0200)]
drm/amdgpu: fix error handling in df_v3_6_pmc_start

When df_v3_6_pmc_get_ctrl_settings() fails for some reason, we
store uninitialized data in a register, as gcc points out:

drivers/gpu/drm/amd/amdgpu/df_v3_6.c: In function 'df_v3_6_pmc_start':
drivers/gpu/drm/amd/amdgpu/amdgpu.h:1012:29: error: 'lo_val' may be used uninitialized in this function [-Werror=maybe-uninitialized]
 #define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v))
                             ^~~~
drivers/gpu/drm/amd/amdgpu/df_v3_6.c:334:39: note: 'lo_val' was declared here
  uint32_t lo_base_addr, hi_base_addr, lo_val, hi_val;
                                       ^~~~~~

Make it return a proper error code that we can catch in the caller.

Fixes: 992af942a6cf ("drm/amdgpu: add df perfmon regs and funcs for xgmi")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: Add missing newline at end of file
Geert Uytterhoeven [Mon, 17 Jun 2019 14:37:28 +0000 (16:37 +0200)]
drm/amd/display: Add missing newline at end of file

"git diff" says:

    \ No newline at end of file

after modifying the file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/powerplay: detect version of smu backend (v2)
Prike Liang [Fri, 14 Jun 2019 04:06:35 +0000 (12:06 +0800)]
drm/amd/powerplay: detect version of smu backend (v2)

Print the backend type.

v2: whitespace fixes (Alex)

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Fix sdma queue allocate race condition
Oak Zeng [Sat, 15 Jun 2019 00:27:58 +0000 (19:27 -0500)]
drm/amdkfd: Fix sdma queue allocate race condition

SDMA queue allocation requires the dqm lock as it modify
the global dqm members. Enclose it in the dqm_lock.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Fix a circular lock dependency
Oak Zeng [Sat, 15 Jun 2019 01:10:45 +0000 (20:10 -0500)]
drm/amdkfd: Fix a circular lock dependency

The idea to break the circular lock dependency is to temporarily drop
dqm lock before calling allocate_mqd. See callstack #1 below.

[   59.510149] [drm] Initialized amdgpu 3.30.0 20150101 for 0000:04:00.0 on minor 0

[  513.604034] ======================================================
[  513.604205] WARNING: possible circular locking dependency detected
[  513.604375] 4.18.0-kfd-root #2 Tainted: G        W
[  513.604530] ------------------------------------------------------
[  513.604699] kswapd0/611 is trying to acquire lock:
[  513.604840] 00000000d254022e (&dqm->lock_hidden){+.+.}, at: evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.605150]
               but task is already holding lock:
[  513.605307] 00000000961547fc (&anon_vma->rwsem){++++}, at: page_lock_anon_vma_read+0xe4/0x250
[  513.605540]
               which lock already depends on the new lock.

[  513.605747]
               the existing dependency chain (in reverse order) is:
[  513.605944]
               -> #4 (&anon_vma->rwsem){++++}:
[  513.606106]        __vma_adjust+0x147/0x7f0
[  513.606231]        __split_vma+0x179/0x190
[  513.606353]        mprotect_fixup+0x217/0x260
[  513.606553]        do_mprotect_pkey+0x211/0x380
[  513.606752]        __x64_sys_mprotect+0x1b/0x20
[  513.606954]        do_syscall_64+0x50/0x1a0
[  513.607149]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.607380]
               -> #3 (&mapping->i_mmap_rwsem){++++}:
[  513.607678]        rmap_walk_file+0x1f0/0x280
[  513.607887]        page_referenced+0xdd/0x180
[  513.608081]        shrink_page_list+0x853/0xcb0
[  513.608279]        shrink_inactive_list+0x33b/0x700
[  513.608483]        shrink_node_memcg+0x37a/0x7f0
[  513.608682]        shrink_node+0xd8/0x490
[  513.608869]        balance_pgdat+0x18b/0x3b0
[  513.609062]        kswapd+0x203/0x5c0
[  513.609241]        kthread+0x100/0x140
[  513.609420]        ret_from_fork+0x24/0x30
[  513.609607]
               -> #2 (fs_reclaim){+.+.}:
[  513.609883]        kmem_cache_alloc_trace+0x34/0x2e0
[  513.610093]        reservation_object_reserve_shared+0x139/0x300
[  513.610326]        ttm_bo_init_reserved+0x291/0x480 [ttm]
[  513.610567]        amdgpu_bo_do_create+0x1d2/0x650 [amdgpu]
[  513.610811]        amdgpu_bo_create+0x40/0x1f0 [amdgpu]
[  513.611041]        amdgpu_bo_create_reserved+0x249/0x2d0 [amdgpu]
[  513.611290]        amdgpu_bo_create_kernel+0x12/0x70 [amdgpu]
[  513.611584]        amdgpu_ttm_init+0x2cb/0x560 [amdgpu]
[  513.611823]        gmc_v9_0_sw_init+0x400/0x750 [amdgpu]
[  513.612491]        amdgpu_device_init+0x14eb/0x1990 [amdgpu]
[  513.612730]        amdgpu_driver_load_kms+0x78/0x290 [amdgpu]
[  513.612958]        drm_dev_register+0x111/0x1a0
[  513.613171]        amdgpu_pci_probe+0x11c/0x1e0 [amdgpu]
[  513.613389]        local_pci_probe+0x3f/0x90
[  513.613581]        pci_device_probe+0x102/0x1c0
[  513.613779]        driver_probe_device+0x2a7/0x480
[  513.613984]        __driver_attach+0x10a/0x110
[  513.614179]        bus_for_each_dev+0x67/0xc0
[  513.614372]        bus_add_driver+0x1eb/0x260
[  513.614565]        driver_register+0x5b/0xe0
[  513.614756]        do_one_initcall+0xac/0x357
[  513.614952]        do_init_module+0x5b/0x213
[  513.615145]        load_module+0x2542/0x2d30
[  513.615337]        __do_sys_finit_module+0xd2/0x100
[  513.615541]        do_syscall_64+0x50/0x1a0
[  513.615731]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.615963]
               -> #1 (reservation_ww_class_mutex){+.+.}:
[  513.616293]        amdgpu_amdkfd_alloc_gtt_mem+0xcf/0x2c0 [amdgpu]
[  513.616554]        init_mqd+0x223/0x260 [amdgpu]
[  513.616779]        create_queue_nocpsch+0x4d9/0x600 [amdgpu]
[  513.617031]        pqm_create_queue+0x37c/0x520 [amdgpu]
[  513.617270]        kfd_ioctl_create_queue+0x2f9/0x650 [amdgpu]
[  513.617522]        kfd_ioctl+0x202/0x350 [amdgpu]
[  513.617724]        do_vfs_ioctl+0x9f/0x6c0
[  513.617914]        ksys_ioctl+0x66/0x70
[  513.618095]        __x64_sys_ioctl+0x16/0x20
[  513.618286]        do_syscall_64+0x50/0x1a0
[  513.618476]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.618695]
               -> #0 (&dqm->lock_hidden){+.+.}:
[  513.618984]        __mutex_lock+0x98/0x970
[  513.619197]        evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.619459]        kfd_process_evict_queues+0x3b/0xb0 [amdgpu]
[  513.619710]        kgd2kfd_quiesce_mm+0x1c/0x40 [amdgpu]
[  513.620103]        amdgpu_amdkfd_evict_userptr+0x38/0x70 [amdgpu]
[  513.620363]        amdgpu_mn_invalidate_range_start_hsa+0xa6/0xc0 [amdgpu]
[  513.620614]        __mmu_notifier_invalidate_range_start+0x70/0xb0
[  513.620851]        try_to_unmap_one+0x7fc/0x8f0
[  513.621049]        rmap_walk_anon+0x121/0x290
[  513.621242]        try_to_unmap+0x93/0xf0
[  513.621428]        shrink_page_list+0x606/0xcb0
[  513.621625]        shrink_inactive_list+0x33b/0x700
[  513.621835]        shrink_node_memcg+0x37a/0x7f0
[  513.622034]        shrink_node+0xd8/0x490
[  513.622219]        balance_pgdat+0x18b/0x3b0
[  513.622410]        kswapd+0x203/0x5c0
[  513.622589]        kthread+0x100/0x140
[  513.622769]        ret_from_fork+0x24/0x30
[  513.622957]
               other info that might help us debug this:

[  513.623354] Chain exists of:
                 &dqm->lock_hidden --> &mapping->i_mmap_rwsem --> &anon_vma->rwsem

[  513.623900]  Possible unsafe locking scenario:

[  513.624189]        CPU0                    CPU1
[  513.624397]        ----                    ----
[  513.624594]   lock(&anon_vma->rwsem);
[  513.624771]                                lock(&mapping->i_mmap_rwsem);
[  513.625020]                                lock(&anon_vma->rwsem);
[  513.625253]   lock(&dqm->lock_hidden);
[  513.625433]
                *** DEADLOCK ***

[  513.625783] 3 locks held by kswapd0/611:
[  513.625967]  #0: 00000000f14edf84 (fs_reclaim){+.+.}, at: __fs_reclaim_acquire+0x5/0x30
[  513.626309]  #1: 00000000961547fc (&anon_vma->rwsem){++++}, at: page_lock_anon_vma_read+0xe4/0x250
[  513.626671]  #2: 0000000067b5cd12 (srcu){....}, at: __mmu_notifier_invalidate_range_start+0x5/0xb0
[  513.627037]
               stack backtrace:
[  513.627292] CPU: 0 PID: 611 Comm: kswapd0 Tainted: G        W         4.18.0-kfd-root #2
[  513.627632] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006
[  513.627990] Call Trace:
[  513.628143]  dump_stack+0x7c/0xbb
[  513.628315]  print_circular_bug.isra.37+0x21b/0x228
[  513.628581]  __lock_acquire+0xf7d/0x1470
[  513.628782]  ? unwind_next_frame+0x6c/0x4f0
[  513.628974]  ? lock_acquire+0xec/0x1e0
[  513.629154]  lock_acquire+0xec/0x1e0
[  513.629357]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.629587]  __mutex_lock+0x98/0x970
[  513.629790]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630047]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630309]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630562]  evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630816]  kfd_process_evict_queues+0x3b/0xb0 [amdgpu]
[  513.631057]  kgd2kfd_quiesce_mm+0x1c/0x40 [amdgpu]
[  513.631288]  amdgpu_amdkfd_evict_userptr+0x38/0x70 [amdgpu]
[  513.631536]  amdgpu_mn_invalidate_range_start_hsa+0xa6/0xc0 [amdgpu]
[  513.632076]  __mmu_notifier_invalidate_range_start+0x70/0xb0
[  513.632299]  try_to_unmap_one+0x7fc/0x8f0
[  513.632487]  ? page_lock_anon_vma_read+0x68/0x250
[  513.632690]  rmap_walk_anon+0x121/0x290
[  513.632875]  try_to_unmap+0x93/0xf0
[  513.633050]  ? page_remove_rmap+0x330/0x330
[  513.633239]  ? rcu_read_unlock+0x60/0x60
[  513.633422]  ? page_get_anon_vma+0x160/0x160
[  513.633613]  shrink_page_list+0x606/0xcb0
[  513.633800]  shrink_inactive_list+0x33b/0x700
[  513.633997]  shrink_node_memcg+0x37a/0x7f0
[  513.634186]  ? shrink_node+0xd8/0x490
[  513.634363]  shrink_node+0xd8/0x490
[  513.634537]  balance_pgdat+0x18b/0x3b0
[  513.634718]  kswapd+0x203/0x5c0
[  513.634887]  ? wait_woken+0xb0/0xb0
[  513.635062]  kthread+0x100/0x140
[  513.635231]  ? balance_pgdat+0x3b0/0x3b0
[  513.635414]  ? kthread_delayed_work_timer_fn+0x80/0x80
[  513.635626]  ret_from_fork+0x24/0x30
[  513.636042] Evicting PASID 32768 queues
[  513.936236] Restoring PASID 32768 queues
[  524.708912] Evicting PASID 32768 queues
[  524.999875] Restoring PASID 32768 queues

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amdkfd: Fix a circular lock dependency"
Oak Zeng [Sat, 15 Jun 2019 00:39:55 +0000 (19:39 -0500)]
Revert "drm/amdkfd: Fix a circular lock dependency"

This reverts commit 06b89b38f3cc518a761164f9f958a9607bbb3587.
This fix is not proper. allocate_mqd can't be moved before
allocate_sdma_queue as it depends on q->properties->sdma_id
set in later.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoRevert "drm/amdkfd: Fix sdma queue allocate race condition"
Oak Zeng [Sat, 15 Jun 2019 00:32:51 +0000 (19:32 -0500)]
Revert "drm/amdkfd: Fix sdma queue allocate race condition"

This reverts commit f77dac6cd62e5d4bcadd740620af1218bfb54cc6.
This fix is not proper. allocate_mqd can't be moved before
allocate_sdma_queue as it depends on q->properties->sdma_id
set in later.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: explicitly set mmGDS_VMID0_BASE to 0
James Zhu [Mon, 10 Jun 2019 17:23:41 +0000 (13:23 -0400)]
drm/amdgpu: explicitly set mmGDS_VMID0_BASE to 0

Explicitly set mmGDS_VMID0_BASE to 0. Also update
GDS_VMID0_BASE/_SIZE with direct register writes.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/display: fix compilation error
Hariprasad Kelam [Thu, 13 Jun 2019 02:32:08 +0000 (08:02 +0530)]
drm/amd/display: fix compilation error

this patch fixes below compilation error

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c: In
function ‘dcn10_apply_ctx_for_surface’:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2378:3:
error: implicit declaration of function ‘udelay’
[-Werror=implicit-function-declaration]
   udelay(underflow_check_delay_us);

Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdgpu_dm: no need to check return value of debugfs_create functions
Greg Kroah-Hartman [Thu, 13 Jun 2019 13:20:12 +0000 (15:20 +0200)]
amdgpu_dm: no need to check return value of debugfs_create functions

When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Leo Li <sunpeng.li@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Cc: David Francis <David.Francis@amd.com>
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Cc: Anthony Koo <Anthony.Koo@amd.com>
Cc: hersen wu <hersenxs.wu@amd.com>
Cc: "Leo (Hanghong) Ma" <hanghong.ma@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdkfd: no need to check return value of debugfs_create functions
Greg Kroah-Hartman [Thu, 13 Jun 2019 13:19:45 +0000 (15:19 +0200)]
amdkfd: no need to check return value of debugfs_create functions

When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Oded Gabbay <oded.gabbay@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoamdgpu: no need to check return value of debugfs_create functions
Greg Kroah-Hartman [Thu, 13 Jun 2019 13:19:19 +0000 (15:19 +0200)]
amdgpu: no need to check return value of debugfs_create functions

When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: xinhui pan <xinhui.pan@amd.com>
Cc: Evan Quan <evan.quan@amd.com>
Cc: Feifei Xu <Feifei.Xu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoradeon: no need to check return value of debugfs_create functions
Greg Kroah-Hartman [Thu, 13 Jun 2019 11:56:31 +0000 (13:56 +0200)]
radeon: no need to check return value of debugfs_create functions

When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: bump the DRM version for GDS ENOMEM fixes
Marek Olšák [Wed, 5 Jun 2019 02:48:29 +0000 (22:48 -0400)]
drm/amdgpu: bump the DRM version for GDS ENOMEM fixes

So userspace knows when this fix is available.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: return 0 by default in amdgpu_pm_load_smu_firmware
Alex Deucher [Tue, 11 Jun 2019 14:45:51 +0000 (09:45 -0500)]
drm/amdgpu: return 0 by default in amdgpu_pm_load_smu_firmware

Fixes SI cards running on amdgpu.

Fixes: 1929059893022 ("drm/amd/amdgpu: add RLC firmware to support raven1 refresh")
Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110883
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: Reserve space for shared fence
Oak Zeng [Tue, 11 Jun 2019 16:15:00 +0000 (11:15 -0500)]
drm/amdgpu: Reserve space for shared fence

Call reservation_object_reserve_shared to reserve
space for shared fence. Otherwise it will trigger
BUG_ON condition in reservation_object_add_shared_fence.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Acked-by: Christian Konig <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amd/amdgpu: Bail out of BO node creation if not enough VRAM (v3)
Tom St Denis [Mon, 10 Jun 2019 13:53:58 +0000 (09:53 -0400)]
drm/amd/amdgpu: Bail out of BO node creation if not enough VRAM (v3)

(v2): Return 0 and set mem->mm_node to NULL.
(v3): Use atomic64_add_return instead.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdgpu: register pm sysfs for sriov (v2)
Yintian Tao [Wed, 5 Jun 2019 12:40:08 +0000 (20:40 +0800)]
drm/amdgpu: register pm sysfs for sriov (v2)

we need register pm sysfs for virt in order
to support dpm level modification because
smu ip block will not be added under SRIOV

v2: whitespace fixes (Alex)

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Add device to topology after it is completely inited
Oak Zeng [Mon, 10 Jun 2019 19:44:07 +0000 (14:44 -0500)]
drm/amdkfd: Add device to topology after it is completely inited

We can't have devices that are not completely initialized in kfd topology.
Otherwise it is a race condition when user access not completely
initialized device. This also addresses a kfd_topology_add_device accessing
NULL dqm pointer issue.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Initialize HSA_CAP_ATS_PRESENT capability in topology codes
Oak Zeng [Mon, 10 Jun 2019 20:22:35 +0000 (15:22 -0500)]
drm/amdkfd: Initialize HSA_CAP_ATS_PRESENT capability in topology codes

Move HSA_CAP_ATS_PRESENT initialization logic from kfd iommu codes to
kfd topology codes. This removes kfd_iommu_device_init's dependency
on kfd_topology_add_device. Also remove duplicate code setting the
same.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Fix sdma queue allocate race condition
Oak Zeng [Thu, 6 Jun 2019 18:19:06 +0000 (13:19 -0500)]
drm/amdkfd: Fix sdma queue allocate race condition

SDMA queue allocation requires the dqm lock at it modify
the global dqm members. Move up the dqm_lock so sdma
queue allocation is enclosed in the critical section. Move
mqd allocation out of critical section to avoid circular
lock dependency.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Fix a circular lock dependency
Oak Zeng [Tue, 4 Jun 2019 02:44:55 +0000 (21:44 -0500)]
drm/amdkfd: Fix a circular lock dependency

The idea to break the circular lock dependency is to move allocate_mqd
out of dqm lock protection. See callstack #1 below.

[   59.510149] [drm] Initialized amdgpu 3.30.0 20150101 for 0000:04:00.0 on minor 0

[  513.604034] ======================================================
[  513.604205] WARNING: possible circular locking dependency detected
[  513.604375] 4.18.0-kfd-root #2 Tainted: G        W
[  513.604530] ------------------------------------------------------
[  513.604699] kswapd0/611 is trying to acquire lock:
[  513.604840] 00000000d254022e (&dqm->lock_hidden){+.+.}, at: evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.605150]
               but task is already holding lock:
[  513.605307] 00000000961547fc (&anon_vma->rwsem){++++}, at: page_lock_anon_vma_read+0xe4/0x250
[  513.605540]
               which lock already depends on the new lock.

[  513.605747]
               the existing dependency chain (in reverse order) is:
[  513.605944]
               -> #4 (&anon_vma->rwsem){++++}:
[  513.606106]        __vma_adjust+0x147/0x7f0
[  513.606231]        __split_vma+0x179/0x190
[  513.606353]        mprotect_fixup+0x217/0x260
[  513.606553]        do_mprotect_pkey+0x211/0x380
[  513.606752]        __x64_sys_mprotect+0x1b/0x20
[  513.606954]        do_syscall_64+0x50/0x1a0
[  513.607149]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.607380]
               -> #3 (&mapping->i_mmap_rwsem){++++}:
[  513.607678]        rmap_walk_file+0x1f0/0x280
[  513.607887]        page_referenced+0xdd/0x180
[  513.608081]        shrink_page_list+0x853/0xcb0
[  513.608279]        shrink_inactive_list+0x33b/0x700
[  513.608483]        shrink_node_memcg+0x37a/0x7f0
[  513.608682]        shrink_node+0xd8/0x490
[  513.608869]        balance_pgdat+0x18b/0x3b0
[  513.609062]        kswapd+0x203/0x5c0
[  513.609241]        kthread+0x100/0x140
[  513.609420]        ret_from_fork+0x24/0x30
[  513.609607]
               -> #2 (fs_reclaim){+.+.}:
[  513.609883]        kmem_cache_alloc_trace+0x34/0x2e0
[  513.610093]        reservation_object_reserve_shared+0x139/0x300
[  513.610326]        ttm_bo_init_reserved+0x291/0x480 [ttm]
[  513.610567]        amdgpu_bo_do_create+0x1d2/0x650 [amdgpu]
[  513.610811]        amdgpu_bo_create+0x40/0x1f0 [amdgpu]
[  513.611041]        amdgpu_bo_create_reserved+0x249/0x2d0 [amdgpu]
[  513.611290]        amdgpu_bo_create_kernel+0x12/0x70 [amdgpu]
[  513.611584]        amdgpu_ttm_init+0x2cb/0x560 [amdgpu]
[  513.611823]        gmc_v9_0_sw_init+0x400/0x750 [amdgpu]
[  513.612491]        amdgpu_device_init+0x14eb/0x1990 [amdgpu]
[  513.612730]        amdgpu_driver_load_kms+0x78/0x290 [amdgpu]
[  513.612958]        drm_dev_register+0x111/0x1a0
[  513.613171]        amdgpu_pci_probe+0x11c/0x1e0 [amdgpu]
[  513.613389]        local_pci_probe+0x3f/0x90
[  513.613581]        pci_device_probe+0x102/0x1c0
[  513.613779]        driver_probe_device+0x2a7/0x480
[  513.613984]        __driver_attach+0x10a/0x110
[  513.614179]        bus_for_each_dev+0x67/0xc0
[  513.614372]        bus_add_driver+0x1eb/0x260
[  513.614565]        driver_register+0x5b/0xe0
[  513.614756]        do_one_initcall+0xac/0x357
[  513.614952]        do_init_module+0x5b/0x213
[  513.615145]        load_module+0x2542/0x2d30
[  513.615337]        __do_sys_finit_module+0xd2/0x100
[  513.615541]        do_syscall_64+0x50/0x1a0
[  513.615731]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.615963]
               -> #1 (reservation_ww_class_mutex){+.+.}:
[  513.616293]        amdgpu_amdkfd_alloc_gtt_mem+0xcf/0x2c0 [amdgpu]
[  513.616554]        init_mqd+0x223/0x260 [amdgpu]
[  513.616779]        create_queue_nocpsch+0x4d9/0x600 [amdgpu]
[  513.617031]        pqm_create_queue+0x37c/0x520 [amdgpu]
[  513.617270]        kfd_ioctl_create_queue+0x2f9/0x650 [amdgpu]
[  513.617522]        kfd_ioctl+0x202/0x350 [amdgpu]
[  513.617724]        do_vfs_ioctl+0x9f/0x6c0
[  513.617914]        ksys_ioctl+0x66/0x70
[  513.618095]        __x64_sys_ioctl+0x16/0x20
[  513.618286]        do_syscall_64+0x50/0x1a0
[  513.618476]        entry_SYSCALL_64_after_hwframe+0x49/0xbe
[  513.618695]
               -> #0 (&dqm->lock_hidden){+.+.}:
[  513.618984]        __mutex_lock+0x98/0x970
[  513.619197]        evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.619459]        kfd_process_evict_queues+0x3b/0xb0 [amdgpu]
[  513.619710]        kgd2kfd_quiesce_mm+0x1c/0x40 [amdgpu]
[  513.620103]        amdgpu_amdkfd_evict_userptr+0x38/0x70 [amdgpu]
[  513.620363]        amdgpu_mn_invalidate_range_start_hsa+0xa6/0xc0 [amdgpu]
[  513.620614]        __mmu_notifier_invalidate_range_start+0x70/0xb0
[  513.620851]        try_to_unmap_one+0x7fc/0x8f0
[  513.621049]        rmap_walk_anon+0x121/0x290
[  513.621242]        try_to_unmap+0x93/0xf0
[  513.621428]        shrink_page_list+0x606/0xcb0
[  513.621625]        shrink_inactive_list+0x33b/0x700
[  513.621835]        shrink_node_memcg+0x37a/0x7f0
[  513.622034]        shrink_node+0xd8/0x490
[  513.622219]        balance_pgdat+0x18b/0x3b0
[  513.622410]        kswapd+0x203/0x5c0
[  513.622589]        kthread+0x100/0x140
[  513.622769]        ret_from_fork+0x24/0x30
[  513.622957]
               other info that might help us debug this:

[  513.623354] Chain exists of:
                 &dqm->lock_hidden --> &mapping->i_mmap_rwsem --> &anon_vma->rwsem

[  513.623900]  Possible unsafe locking scenario:

[  513.624189]        CPU0                    CPU1
[  513.624397]        ----                    ----
[  513.624594]   lock(&anon_vma->rwsem);
[  513.624771]                                lock(&mapping->i_mmap_rwsem);
[  513.625020]                                lock(&anon_vma->rwsem);
[  513.625253]   lock(&dqm->lock_hidden);
[  513.625433]
                *** DEADLOCK ***

[  513.625783] 3 locks held by kswapd0/611:
[  513.625967]  #0: 00000000f14edf84 (fs_reclaim){+.+.}, at: __fs_reclaim_acquire+0x5/0x30
[  513.626309]  #1: 00000000961547fc (&anon_vma->rwsem){++++}, at: page_lock_anon_vma_read+0xe4/0x250
[  513.626671]  #2: 0000000067b5cd12 (srcu){....}, at: __mmu_notifier_invalidate_range_start+0x5/0xb0
[  513.627037]
               stack backtrace:
[  513.627292] CPU: 0 PID: 611 Comm: kswapd0 Tainted: G        W         4.18.0-kfd-root #2
[  513.627632] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006
[  513.627990] Call Trace:
[  513.628143]  dump_stack+0x7c/0xbb
[  513.628315]  print_circular_bug.isra.37+0x21b/0x228
[  513.628581]  __lock_acquire+0xf7d/0x1470
[  513.628782]  ? unwind_next_frame+0x6c/0x4f0
[  513.628974]  ? lock_acquire+0xec/0x1e0
[  513.629154]  lock_acquire+0xec/0x1e0
[  513.629357]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.629587]  __mutex_lock+0x98/0x970
[  513.629790]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630047]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630309]  ? evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630562]  evict_process_queues_nocpsch+0x26/0x140 [amdgpu]
[  513.630816]  kfd_process_evict_queues+0x3b/0xb0 [amdgpu]
[  513.631057]  kgd2kfd_quiesce_mm+0x1c/0x40 [amdgpu]
[  513.631288]  amdgpu_amdkfd_evict_userptr+0x38/0x70 [amdgpu]
[  513.631536]  amdgpu_mn_invalidate_range_start_hsa+0xa6/0xc0 [amdgpu]
[  513.632076]  __mmu_notifier_invalidate_range_start+0x70/0xb0
[  513.632299]  try_to_unmap_one+0x7fc/0x8f0
[  513.632487]  ? page_lock_anon_vma_read+0x68/0x250
[  513.632690]  rmap_walk_anon+0x121/0x290
[  513.632875]  try_to_unmap+0x93/0xf0
[  513.633050]  ? page_remove_rmap+0x330/0x330
[  513.633239]  ? rcu_read_unlock+0x60/0x60
[  513.633422]  ? page_get_anon_vma+0x160/0x160
[  513.633613]  shrink_page_list+0x606/0xcb0
[  513.633800]  shrink_inactive_list+0x33b/0x700
[  513.633997]  shrink_node_memcg+0x37a/0x7f0
[  513.634186]  ? shrink_node+0xd8/0x490
[  513.634363]  shrink_node+0xd8/0x490
[  513.634537]  balance_pgdat+0x18b/0x3b0
[  513.634718]  kswapd+0x203/0x5c0
[  513.634887]  ? wait_woken+0xb0/0xb0
[  513.635062]  kthread+0x100/0x140
[  513.635231]  ? balance_pgdat+0x3b0/0x3b0
[  513.635414]  ? kthread_delayed_work_timer_fn+0x80/0x80
[  513.635626]  ret_from_fork+0x24/0x30
[  513.636042] Evicting PASID 32768 queues
[  513.936236] Restoring PASID 32768 queues
[  524.708912] Evicting PASID 32768 queues
[  524.999875] Restoring PASID 32768 queues

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Separate mqd allocation and initialization
Oak Zeng [Tue, 4 Jun 2019 02:25:52 +0000 (21:25 -0500)]
drm/amdkfd: Separate mqd allocation and initialization

Introduce a new mqd allocation interface and split the original
init_mqd function into two functions: allocate_mqd and init_mqd.
Also renamed uninit_mqd to free_mqd. This is preparation work to
fix a circular lock dependency.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Refactor create_queue_nocpsch
Oak Zeng [Fri, 31 May 2019 21:05:59 +0000 (16:05 -0500)]
drm/amdkfd: Refactor create_queue_nocpsch

This is prepare work to fix a circular lock dependency.
No logic change

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agodrm/amdkfd: Only load sdma mqd when queue is active
Oak Zeng [Mon, 3 Jun 2019 17:28:13 +0000 (12:28 -0500)]
drm/amdkfd: Only load sdma mqd when queue is active

Also calls load_mqd with current->mm struct. The mm
struct is used to read back user wptr of the queue.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>