openwrt/staging/blogic.git
10 years agodrm/nouveau: hold mutex while syncing to kernel channel
Maarten Lankhorst [Tue, 14 Jan 2014 15:48:58 +0000 (16:48 +0100)]
drm/nouveau: hold mutex while syncing to kernel channel

Not holding the mutex potentially causes corruption of the kernel
channel when page flipping.

Cc: stable@vger.kernel.org #3.13
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios
Ilia Mirkin [Tue, 14 Jan 2014 06:29:06 +0000 (16:29 +1000)]
drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/device: provide a way for devinit to mark engines as disabled
Ilia Mirkin [Fri, 10 Jan 2014 02:19:11 +0000 (21:19 -0500)]
drm/nouveau/device: provide a way for devinit to mark engines as disabled

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/devinit: tidy up the subdev class definition
Ben Skeggs [Tue, 14 Jan 2014 05:55:38 +0000 (15:55 +1000)]
drm/nouveau/devinit: tidy up the subdev class definition

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/bar: tidy up the subdev and object class definitions
Ben Skeggs [Sun, 22 Dec 2013 15:51:16 +0000 (01:51 +1000)]
drm/nouveau/bar: tidy up the subdev and object class definitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/instmem: tidy up the object class definition
Ben Skeggs [Sun, 22 Dec 2013 15:08:00 +0000 (01:08 +1000)]
drm/nouveau/instmem: tidy up the object class definition

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/instmem: tidy up the subdev class definition
Ben Skeggs [Sun, 22 Dec 2013 14:39:47 +0000 (00:39 +1000)]
drm/nouveau/instmem: tidy up the subdev class definition

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/pwr: implement a simple i2c stack
Ben Skeggs [Sat, 9 Nov 2013 01:58:13 +0000 (11:58 +1000)]
drm/nouveau/pwr: implement a simple i2c stack

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr
Ben Skeggs [Wed, 11 Dec 2013 23:41:45 +0000 (09:41 +1000)]
drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb: turn off some bits in 10f584 at init
Ben Skeggs [Tue, 3 Dec 2013 06:25:48 +0000 (16:25 +1000)]
drm/nve0/fb: turn off some bits in 10f584 at init

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings
Ben Skeggs [Tue, 3 Dec 2013 05:40:18 +0000 (15:40 +1000)]
drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings

Titan.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: yet another random 10f200 bit
Ben Skeggs [Tue, 3 Dec 2013 04:45:03 +0000 (14:45 +1000)]
drm/nve0/fb/gddr5: yet another random 10f200 bit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvc0-/fb: hook up skeleton interrupt handler
Ben Skeggs [Tue, 3 Dec 2013 04:10:42 +0000 (14:10 +1000)]
drm/nvc0-/fb: hook up skeleton interrupt handler

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: more 10f200 stuff
Ben Skeggs [Tue, 3 Dec 2013 03:09:34 +0000 (13:09 +1000)]
drm/nve0/fb/gddr5: more 10f200 stuff

Seen on Titan.  NFI what the condition to switch this on is yet, and,
hardcoding it to on currently causes master to report unknown intr
with a mask of 0x08002000.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/clk: report ddr memory frequency
Ben Skeggs [Tue, 3 Dec 2013 01:44:34 +0000 (11:44 +1000)]
drm/nve0/clk: report ddr memory frequency

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to
Ben Skeggs [Tue, 3 Dec 2013 01:09:55 +0000 (11:09 +1000)]
drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: 10f698/69c
Ben Skeggs [Tue, 3 Dec 2013 00:44:43 +0000 (10:44 +1000)]
drm/nve0/fb/gddr5: 10f698/69c

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb: it's now safe to obey the memory voltage setting properly
Ben Skeggs [Mon, 2 Dec 2013 23:00:47 +0000 (09:00 +1000)]
drm/nve0/fb: it's now safe to obey the memory voltage setting properly

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb: multi-stage reclock is required for certain transitions
Ben Skeggs [Mon, 2 Dec 2013 22:51:59 +0000 (08:51 +1000)]
drm/nve0/fb: multi-stage reclock is required for certain transitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock
Ben Skeggs [Mon, 2 Dec 2013 22:25:04 +0000 (08:25 +1000)]
drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: parse bios data into struct rather than using directly
Ben Skeggs [Mon, 2 Dec 2013 03:43:09 +0000 (13:43 +1000)]
drm/nve0/fb/gddr5: parse bios data into struct rather than using directly

Still essentially a struct of magic values with magic names and unknown
purposes.  But, we will shortly need to be able to mix and match bits of
the previous and next configurations to do a transition reclock, as such,
we can no longer directly use the vbios data with any ease.

This is probably nicer anyway in the long run, for a few reasons.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: found LP3 setting
Ben Skeggs [Mon, 2 Dec 2013 02:00:33 +0000 (12:00 +1000)]
drm/nve0/fb/gddr5: found LP3 setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb: note the memory voltage toggle, not using it yet
Ben Skeggs [Sun, 1 Dec 2013 23:25:54 +0000 (09:25 +1000)]
drm/nve0/fb: note the memory voltage toggle, not using it yet

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614
Ben Skeggs [Sat, 30 Nov 2013 05:15:28 +0000 (15:15 +1000)]
drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
fb/gddr5/nve0: 100770 is like 10f604

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: fixup delays a bit
Ben Skeggs [Sat, 30 Nov 2013 02:07:58 +0000 (12:07 +1000)]
drm/nve0/fb/gddr5: fixup delays a bit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/bios: timing 2.0 entries can have subentries
Ben Skeggs [Sat, 30 Nov 2013 01:40:55 +0000 (11:40 +1000)]
drm/nouveau/bios: timing 2.0 entries can have subentries

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: note another semi-unknown
Ben Skeggs [Thu, 28 Nov 2013 02:45:02 +0000 (12:45 +1000)]
drm/nve0/fb/gddr5: note another semi-unknown

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR
Ben Skeggs [Thu, 28 Nov 2013 02:37:56 +0000 (12:37 +1000)]
drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: fix calculation of RDQS setting
Ben Skeggs [Thu, 28 Nov 2013 02:34:13 +0000 (12:34 +1000)]
drm/nve0/fb/gddr5: fix calculation of RDQS setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: switch off some other random bit at some point
Ben Skeggs [Thu, 28 Nov 2013 02:23:52 +0000 (12:23 +1000)]
drm/nve0/fb/gddr5: switch off some other random bit at some point

As seen when comparing us vs nv on my GTX660

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train
Ben Skeggs [Thu, 28 Nov 2013 02:20:46 +0000 (12:20 +1000)]
drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: not all memory partitions are created equal
Ben Skeggs [Wed, 27 Nov 2013 05:12:53 +0000 (15:12 +1000)]
drm/nve0/fb/gddr5: not all memory partitions are created equal

As seen when comparing us vs nv on my GTX660.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb: typo in register name
Ben Skeggs [Wed, 27 Nov 2013 03:26:00 +0000 (13:26 +1000)]
drm/nve0/fb: typo in register name

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/bios: make common code to handle ramcfg strap etc
Ben Skeggs [Wed, 27 Nov 2013 01:28:19 +0000 (11:28 +1000)]
drm/nouveau/bios: make common code to handle ramcfg strap etc

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: fix an assumption of sane memory controller layout
Ben Skeggs [Tue, 26 Nov 2013 05:39:15 +0000 (15:39 +1000)]
drm/nve0/fb/gddr5: fix an assumption of sane memory controller layout

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fb/gddr5: fix behaviour of lp3 setting
Ben Skeggs [Tue, 26 Nov 2013 04:31:18 +0000 (14:31 +1000)]
drm/nve0/fb/gddr5: fix behaviour of lp3 setting

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: recover from mmu faults on bar1/bar3
Ben Skeggs [Thu, 9 Jan 2014 03:03:17 +0000 (13:03 +1000)]
drm/nve0/fifo: recover from mmu faults on bar1/bar3

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: keep mmu fault interrupts enabled at all times
Ben Skeggs [Thu, 9 Jan 2014 02:30:43 +0000 (12:30 +1000)]
drm/nve0/fifo: keep mmu fault interrupts enabled at all times

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: update human-readable mmu fault descriptions
Ben Skeggs [Wed, 8 Jan 2014 00:59:04 +0000 (10:59 +1000)]
drm/nve0/fifo: update human-readable mmu fault descriptions

Ordering from Android GK20A driver, names from binary driver strings.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: document more intr status bits
Ben Skeggs [Tue, 7 Jan 2014 23:46:55 +0000 (09:46 +1000)]
drm/nve0/fifo: document more intr status bits

As per Android GK20A driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: populate PBDMA status bitfield with more definitions
Ben Skeggs [Tue, 7 Jan 2014 23:06:17 +0000 (09:06 +1000)]
drm/nve0/fifo: populate PBDMA status bitfield with more definitions

As per Android GK20A driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: s/subfifo/PBDMA/
Ben Skeggs [Tue, 7 Jan 2014 22:54:29 +0000 (08:54 +1000)]
drm/nve0/fifo: s/subfifo/PBDMA/

As per Android GK20A driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nve0/fifo: s/playlist/runlist/
Ben Skeggs [Tue, 7 Jan 2014 22:47:52 +0000 (08:47 +1000)]
drm/nve0/fifo: s/playlist/runlist/

As per Android GK20A driver.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvf0/gr: enable acceleration with our chsw ucode
Ben Skeggs [Tue, 10 Dec 2013 04:26:31 +0000 (14:26 +1000)]
drm/nvf0/gr: enable acceleration with our chsw ucode

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv108/gr: enable acceleration with our chsw ucode
Ben Skeggs [Mon, 9 Dec 2013 23:18:31 +0000 (09:18 +1000)]
drm/nv108/gr: enable acceleration with our chsw ucode

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvc0-/gr: handle fwmthd interrupts in ucode
Ben Skeggs [Tue, 10 Dec 2013 04:08:10 +0000 (14:08 +1000)]
drm/nvc0-/gr: handle fwmthd interrupts in ucode

Compute code in mesa triggers one of these, hanging the engine.  Let's
at least ack the request for now to avoid the hang.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvc0-/gr: fiddle some magic around strand init
Ben Skeggs [Tue, 10 Dec 2013 01:05:41 +0000 (11:05 +1000)]
drm/nvc0-/gr: fiddle some magic around strand init

Fixes HUB_INIT timeout on GK110/GK208 when not using NVIDIA's ucode.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv108/gr: initial support (need external fuc)
Ben Skeggs [Tue, 5 Nov 2013 04:49:49 +0000 (14:49 +1000)]
drm/nv108/gr: initial support (need external fuc)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv108/ce: enable copy engines
Ben Skeggs [Tue, 5 Nov 2013 04:39:24 +0000 (14:39 +1000)]
drm/nv108/ce: enable copy engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv108/fifo: initial support
Ben Skeggs [Tue, 5 Nov 2013 04:36:45 +0000 (14:36 +1000)]
drm/nv108/fifo: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvf0/gr: remove a copy+pasto in ctx reglist
Ben Skeggs [Thu, 5 Dec 2013 22:25:22 +0000 (08:25 +1000)]
drm/nvf0/gr: remove a copy+pasto in ctx reglist

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nvc0-/gr: bring in some macros to abstract falcon isa differences
Ben Skeggs [Fri, 6 Dec 2013 04:12:34 +0000 (14:12 +1000)]
drm/nvc0-/gr: bring in some macros to abstract falcon isa differences

Need. A. Compiler...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/falcon: use vmalloc to create firwmare copies
Ilia Mirkin [Sat, 7 Dec 2013 16:42:19 +0000 (11:42 -0500)]
drm/nouveau/falcon: use vmalloc to create firwmare copies

Some firmware images may be large (64K), so using kmalloc memory is
inappropriate for them. Use vmalloc instead, to avoid high-order
allocation failures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: stable@vger.kernel.org
10 years agodrm/nouveau/gem: remove (now) unneeded pre-validate fence sync
Ben Skeggs [Fri, 22 Nov 2013 00:44:28 +0000 (10:44 +1000)]
drm/nouveau/gem: remove (now) unneeded pre-validate fence sync

Now that nouveau_bo.c can handle sync when it actually needs to, we can
remove this and avoid a double semaphore acquire when syncing in the
command submission path.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/ttm: explicitly wait for bo idle before memcpy buffer move
Ben Skeggs [Fri, 22 Nov 2013 00:52:54 +0000 (10:52 +1000)]
drm/nouveau/ttm: explicitly wait for bo idle before memcpy buffer move

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/ttm: explicity sync with kernel channel before moving buffer
Ben Skeggs [Fri, 22 Nov 2013 00:39:57 +0000 (10:39 +1000)]
drm/nouveau/ttm: explicity sync with kernel channel before moving buffer

The GEM code handles this currently, but that'll be removed.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/ttm: tidy up creation of temporary buffer move vmas
Ben Skeggs [Fri, 22 Nov 2013 00:35:25 +0000 (10:35 +1000)]
drm/nouveau/ttm: tidy up creation of temporary buffer move vmas

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv04/plane: add support for nv04/nv05 video overlay
Ilia Mirkin [Fri, 15 Nov 2013 16:26:45 +0000 (11:26 -0500)]
drm/nv04/plane: add support for nv04/nv05 video overlay

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv10/plane: add YUYV support
Ilia Mirkin [Fri, 15 Nov 2013 16:26:44 +0000 (11:26 -0500)]
drm/nv10/plane: add YUYV support

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nv50-: map TTM_PL_SYSTEM through a BAR for CPU access
Maarten Lankhorst [Tue, 12 Nov 2013 12:34:09 +0000 (13:34 +0100)]
drm/nv50-: map TTM_PL_SYSTEM through a BAR for CPU access

Moves bo's to TTM_PL_TT for BAR mapping, to hide tiling from user.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau: fix m2mf copy to tiled gart
Maarten Lankhorst [Tue, 12 Nov 2013 12:34:08 +0000 (13:34 +0100)]
drm/nouveau: fix m2mf copy to tiled gart

Commit de7b7d59d54852c introduced tiled GART, but a linear copy is
still performed. This may result in errors on eviction, fix it by
checking tiling from memtype.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Cc: stable@vger.kernel.org #3.10+
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/nouveau/vm: reduce number of entry-points to vm_map()
Ben Skeggs [Fri, 15 Nov 2013 01:56:49 +0000 (11:56 +1000)]
drm/nouveau/vm: reduce number of entry-points to vm_map()

Pretty much everywhere had to make the decision which to use, so it
makes a lot more sense to just have one entrypoint decide the path
to take instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 years agodrm/cirrus: correct register values for 16bpp
Takashi Iwai [Tue, 21 Jan 2014 22:34:51 +0000 (14:34 -0800)]
drm/cirrus: correct register values for 16bpp

When the mode is set with 16bpp on QEMU, the output gets totally broken.
The culprit is the bogus register values set for 16bpp, which was likely
copied from from a wrong place.

Addresses https://bugzilla.novell.com/show_bug.cgi?id=799216

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: David Airlie <airlied@linux.ie>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/nouveau: make vga_switcheroo code depend on VGA_SWITCHEROO
Jeff Mahoney [Tue, 21 Jan 2014 22:34:52 +0000 (14:34 -0800)]
drm/nouveau: make vga_switcheroo code depend on VGA_SWITCHEROO

Commit 8116188fdef594 ("nouveau/acpi: hook up to the MXM method for mux
switching.") broke the build on non-x86 architectures due to the new
dependency on MXM and MXM being an x86 platform driver.

It built previously since the vga switcheroo registration routines were
zereod out on !X86.  The code was built in but unused.

This patch makes all of the DSM code depend on CONFIG_VGA_SWITCHEROO,
allowing it to build on non-x86 and shrinking the module size as well.

[rdunlap@infradead.org: fix build eror when VGA_SWITCHEROO is not enabled]
Signed-off-by: Jeff Mahoney <jeffm@suse.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/mgag200: on cards with < 2MB VRAM default to 16-bit
Dave Airlie [Tue, 21 Jan 2014 06:47:46 +0000 (01:47 -0500)]
drm/mgag200: on cards with < 2MB VRAM default to 16-bit

This aligns with what the userspace -mga driver does in
the same situation.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agoMerge branch 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux into drm-next
Dave Airlie [Tue, 21 Jan 2014 23:13:13 +0000 (09:13 +1000)]
Merge branch 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux into drm-next

Here's the vblank timestamp pull request you wanted.

I addressed the few bugs that Mario pointed out and added
the r-bs.

As it has been a while since I made the changes, I gave it a
quick spin on a few different i915 machines. Fortunately
everything still seems to be fine.

* 'drm-vbl-timestamp' of git://gitorious.org/vsyrjala/linux:
  drm/i915: Add a kludge for DSL incrementing too late and ISR not working
  drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos()
  drm: Pass 'flags' from the caller to .get_scanout_position()
  drm: Fix vblank timestamping constants for interlaced modes
  drm/i915: Fix scanoutpos calculations for interlaced modes
  drm: Change {pixel,line,frame}dur_ns from s64 to int
  drm: Use crtc_clock in drm_calc_timestamping_constants()
  drm/radeon: Populate crtc_clock in radeon_atom_get_tv_timings()
  drm: Simplify the math in drm_calc_timestamping_constants()
  drm: Improve drm_calc_timestamping_constants() documentation
  drm/i915: Call drm_calc_timestamping_constants() earlier
  drm/i915: Kill hwmode save/restore
  drm: Pass the display mode to drm_calc_vbltimestamp_from_scanoutpos()
  drm: Pass the display mode to drm_calc_timestamping_constants()

10 years agoMerge branch 'topic/core-stuff' of git://people.freedesktop.org/~danvet/drm-intel...
Dave Airlie [Tue, 21 Jan 2014 23:11:39 +0000 (09:11 +1000)]
Merge branch 'topic/core-stuff' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

Some straggling drm core patches

* 'topic/core-stuff' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/gem: Always initialize the gem object in object_init
  drm/edid: Populate picture aspect ratio for CEA modes
  drm/edid: parse the list of additional 3D modes
  drm/edid: split VIC display mode lookup into a separate function
  drm: Make the connector mode_valid() vfunc return a drm_mode_status enum

10 years agoMerge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm...
Dave Airlie [Tue, 21 Jan 2014 23:11:09 +0000 (09:11 +1000)]
Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next

Just a single fix for sparse/smatch warnings introduced by the previous
vmwgfx-next pull.

* 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux:
  drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errors

10 years agodrm/vmwgfx: Fix recently introduced sparse / smatch warnings and errors
Thomas Hellstrom [Mon, 20 Jan 2014 10:33:04 +0000 (11:33 +0100)]
drm/vmwgfx: Fix recently introduced sparse / smatch warnings and errors

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrant <jakob@vmware.com>
10 years agodrm/gem: Always initialize the gem object in object_init
Daniel Vetter [Mon, 20 Jan 2014 07:21:54 +0000 (08:21 +0100)]
drm/gem: Always initialize the gem object in object_init

At least drm/i915 expects that the obj->dev pointer is set even in
failure paths. Specifically when the shmem initialization fails we
call i915_gem_object_free which needs to deref obj->base.dev to get at
the slab pointer in the device private structure. And the shmem
allocation can easily fail when userspace is hitting open file limits.

Doing the structure init even when the shmem file allocation fails
prevents this Oops.

This is a regression from

commit 89c8233f82d9c8af5b20e72e4a185a38a7d3c50b
Author: David Herrmann <dh.herrmann@gmail.com>
Date:   Thu Jul 11 11:56:32 2013 +0200

    drm/gem: simplify object initialization

v2: Add regression note which Chris supplied.

Testcase: igt/gem_fd_exhaustion
Reported-and-Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
References: http://lists.freedesktop.org/archives/intel-gfx/2014-January/038433.html
Cc: stable@vger.kernel.org
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agoMerge branch 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Tue, 21 Jan 2014 00:26:50 +0000 (10:26 +1000)]
Merge branch 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux into drm-next

New tree with the INFO ioctl merge fixed up.  This also adds a couple
of additional minor fixes.

A few more changes for 3.14, mostly just bug fixes.  Note that:
drm/radeon: add query to fetch the max engine clock.
will conflict with 3.13 final, but the fix is pretty obvious.

* 'drm-next-3.14' of git://people.freedesktop.org/~agd5f/linux: (22 commits)
  drm/radeon: add UVD support for OLAND
  drm/radeon: fix minor typos in si_dpm.c
  drm/radeon: set the full cache bit for fences on r7xx+
  drm/radeon: fix surface sync in fence on cayman (v2)
  drm/radeon/dpm: disable mclk switching on desktop RV770
  drm/radeon: fix endian handling in radeon_atom_init_mc_reg_table
  drm/radeon: write gfx pg bases even when gfx pg is disabled
  drm/radeon: bail early from enable ss in certain cases
  drm/radeon: handle ss percentage divider properly
  drm/radeon: add query to fetch the max engine clock (v2)
  drm/radeon/dp: sleep after powering up the display
  drm/radeon/dp: use usleep_range rather than udelay
  drm/radeon/dp: bump i2c-over-aux retries to 7
  drm/radeon: disable ss on DP for DCE3.x
  drm/radeon/cik: use hw defaults for TC_CFG registers
  drm/radeon: disable dpm on BTC
  drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flush
  drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flush
  drm/radeon: consolidate sdma hdp flushing code for CIK
  drm/radeon: consolidate cp hdp flushing code for CIK
  ...

10 years agodrm/radeon: add UVD support for OLAND
Alex Deucher [Mon, 20 Jan 2014 16:25:35 +0000 (11:25 -0500)]
drm/radeon: add UVD support for OLAND

It seems this got dropped when we merged UVD support
last year.  Add this back now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
10 years agodrm/radeon: fix minor typos in si_dpm.c
Alex Deucher [Fri, 17 Jan 2014 17:34:55 +0000 (12:34 -0500)]
drm/radeon: fix minor typos in si_dpm.c

Copy/paste typos from the ni code. Should not
have any functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: set the full cache bit for fences on r7xx+
Alex Deucher [Thu, 16 Jan 2014 23:11:47 +0000 (18:11 -0500)]
drm/radeon: set the full cache bit for fences on r7xx+

Needed to properly flush the read caches for fences.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
10 years agodrm/radeon: fix surface sync in fence on cayman (v2)
Alex Deucher [Thu, 16 Jan 2014 23:02:59 +0000 (18:02 -0500)]
drm/radeon: fix surface sync in fence on cayman (v2)

We need to set the engine bit to select the ME and
also set the full cache bit.  Should help stability
on TN and cayman.

V2: fix up surface sync in ib execute as well

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
10 years agodrm/radeon/dpm: disable mclk switching on desktop RV770
Alex Deucher [Tue, 7 Jan 2014 18:51:51 +0000 (13:51 -0500)]
drm/radeon/dpm: disable mclk switching on desktop RV770

Mclk switching doesn't seem to work reliably on these
cards.  Most RV770 boards specify the same mclk for all
performance levels anyway so in most cases, this has
no affect.

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=73067

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
10 years agodrm/radeon: fix endian handling in radeon_atom_init_mc_reg_table
Alex Deucher [Thu, 16 Jan 2014 15:53:50 +0000 (10:53 -0500)]
drm/radeon: fix endian handling in radeon_atom_init_mc_reg_table

Need to swap the data for big endian.
Notcied by sylware in IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: write gfx pg bases even when gfx pg is disabled
Alex Deucher [Thu, 16 Jan 2014 15:39:17 +0000 (10:39 -0500)]
drm/radeon: write gfx pg bases even when gfx pg is disabled

For consistency.  These buffers aren't used when pg is
disabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: bail early from enable ss in certain cases
Alex Deucher [Wed, 15 Jan 2014 18:59:47 +0000 (13:59 -0500)]
drm/radeon: bail early from enable ss in certain cases

If the ss percentage is 0 or we are using external ss,
just bail when enabling ss.  We disable it explicitly
earlier in the modeset already.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: handle ss percentage divider properly
Alex Deucher [Wed, 15 Jan 2014 18:41:31 +0000 (13:41 -0500)]
drm/radeon: handle ss percentage divider properly

It's either 100 or 1000 depending on the flags in the
table.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: add query to fetch the max engine clock (v2)
Alex Deucher [Mon, 20 Jan 2014 23:20:29 +0000 (18:20 -0500)]
drm/radeon: add query to fetch the max engine clock (v2)

This is needed for reporting the max GPU engine clock
in OpenCL.  This just reports the max possible engine
clock, it does not take into account current conditions
that may limit that clock.

v2: fix query number for merge with 3.13

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/edid: Populate picture aspect ratio for CEA modes
Vandana Kannan [Thu, 19 Dec 2013 10:04:07 +0000 (15:34 +0530)]
drm/edid: Populate picture aspect ratio for CEA modes

Adding picture aspect ratio for CEA modes based on CEA-861D Table 3 or
CEA-861E Table 4. This is useful for filling up the detail in AVI
infoframe.

v2: Ville's review comments incorporated
Added picture aspect ratio as part of edid_cea_modes instead of DRM_MODE

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm/radeon/dp: sleep after powering up the display
Alex Deucher [Tue, 14 Jan 2014 15:45:51 +0000 (10:45 -0500)]
drm/radeon/dp: sleep after powering up the display

According to the DP 1.1 spec, the sink must power
up within 1ms.  Noticed while reviewing Thierry's
drm/dp patches.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon/dp: use usleep_range rather than udelay
Alex Deucher [Tue, 14 Jan 2014 15:37:33 +0000 (10:37 -0500)]
drm/radeon/dp: use usleep_range rather than udelay

Based on common dp code proposed by Thierry Reding.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon/dp: bump i2c-over-aux retries to 7
Alex Deucher [Tue, 14 Jan 2014 15:29:59 +0000 (10:29 -0500)]
drm/radeon/dp: bump i2c-over-aux retries to 7

As per the DP1.2 spec.  Noticed while reviewing
Thierry's drm/dp patches. Also bump native aux
retries to 7 for consistency.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: disable ss on DP for DCE3.x
Alex Deucher [Mon, 13 Jan 2014 21:47:05 +0000 (16:47 -0500)]
drm/radeon: disable ss on DP for DCE3.x

Seems to cause problems with certain DP monitors.

Bug:
https://bugs.freedesktop.org/show_bug.cgi?id=40699

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
10 years agodrm/radeon/cik: use hw defaults for TC_CFG registers
Alex Deucher [Mon, 13 Jan 2014 15:18:03 +0000 (10:18 -0500)]
drm/radeon/cik: use hw defaults for TC_CFG registers

Use the hw power up values rather than 0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: disable dpm on BTC
Alex Deucher [Sat, 11 Jan 2014 15:55:55 +0000 (10:55 -0500)]
drm/radeon: disable dpm on BTC

Still unstable on some boards.

Bugs:
https://bugs.freedesktop.org/show_bug.cgi?id=73053
https://bugzilla.kernel.org/show_bug.cgi?id=68571

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: 3.13 <stable@vger.kernel.org> # 3.13
10 years agodrm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flush
Alex Deucher [Thu, 9 Jan 2014 21:51:56 +0000 (16:51 -0500)]
drm/radeon/cik: use WAIT_REG_MEM special op for CP HDP flush

This is the preferred flushing method on CIK.

Note, this only works on the PFP so the engine bit must be
set.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flush
Alex Deucher [Thu, 9 Jan 2014 21:35:39 +0000 (16:35 -0500)]
drm/radeon/cik: use POLL_REG_MEM special op for sDMA HDP flush

This is the preferred flushing method on CIK.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: consolidate sdma hdp flushing code for CIK
Alex Deucher [Thu, 9 Jan 2014 21:23:37 +0000 (16:23 -0500)]
drm/radeon: consolidate sdma hdp flushing code for CIK

It's used in several places so move to a common shared
function.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: consolidate cp hdp flushing code for CIK
Alex Deucher [Thu, 9 Jan 2014 21:18:11 +0000 (16:18 -0500)]
drm/radeon: consolidate cp hdp flushing code for CIK

It's used in several places so move to a common shared
function.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: don't power gate paused UVD streams
Christian König [Fri, 10 Jan 2014 15:05:05 +0000 (16:05 +0100)]
drm/radeon: don't power gate paused UVD streams

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agoRevert "drm/radeon: disable CIK CP semaphores for now"
Alex Deucher [Thu, 9 Jan 2014 15:59:56 +0000 (10:59 -0500)]
Revert "drm/radeon: disable CIK CP semaphores for now"

This reverts commit 99b4f25122f43210278cde17a9d100906235a074.

Semaphores work fine after further review and testing.
Cc: 3.13 <stable@vger.kernel.org> # 3.13
10 years agodrm/edid: parse the list of additional 3D modes
Thomas Wood [Fri, 29 Nov 2013 18:18:58 +0000 (18:18 +0000)]
drm/edid: parse the list of additional 3D modes

Parse 2D_VIC_order_X and 3D_Structure_X from the list at the end of the
HDMI Vendor Specific Data Block.

v2: Use an offset value depending on 3D_Multi_present and add
    detail_present. (Ville Syrjälä)
v3: Make sure the list is parsed even if 3D_Structure_ALL/MASK is not
    present. (Ville Syrjälä)
    Fix one length check and remove another. (Ville Syrjälä)

Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm/edid: split VIC display mode lookup into a separate function
Thomas Wood [Fri, 29 Nov 2013 15:33:27 +0000 (15:33 +0000)]
drm/edid: split VIC display mode lookup into a separate function

Signed-off-by: Thomas Wood <thomas.wood@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm: Make the connector mode_valid() vfunc return a drm_mode_status enum
Damien Lespiau [Thu, 28 Nov 2013 15:29:17 +0000 (15:29 +0000)]
drm: Make the connector mode_valid() vfunc return a drm_mode_status enum

To make it clear what exactly mode_valid() should return.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm/i915: Add a kludge for DSL incrementing too late and ISR not working
Ville Syrjälä [Mon, 28 Oct 2013 22:04:43 +0000 (00:04 +0200)]
drm/i915: Add a kludge for DSL incrementing too late and ISR not working

On pre-PCH platforms ISR doesn't seem to be an actual ISR, at least as
far as display interrupts are concerned. Instead it sort of looks like
some ISR bits just directly reflect the corresponding bit from PIPESTAT.
The bit appears in the ISR only if the PIPESTAT interrupt is enabled. So
in that sense it sort of looks a bit like the south interrupt scheme on
PCH platforms. So it goes something a bit like this:
PIPESTAT.status & PIPESTAT.enable -> ISR -> IMR -> IIR -> IER -> actual
interrupt

In any case that means the intel_pipe_in_vblank_locked() doesn't actually
work for pre-PCH platforms. As a last resort, add a similar kludge as radeon
has that fixes things up if we got called from the vblank interrupt,
but the scanline counter value indicates that we're not quite there yet.
We know that the scanline counter increments at hsync but is otherwise
accurate, so we can limit the kludge to the line just prior to vblank
start, instead of the relative distance that radeon uses.

Reviewed-by: mario.kleiner.de@gmail.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
10 years agodrm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos()
Ville Syrjälä [Mon, 28 Oct 2013 19:22:52 +0000 (21:22 +0200)]
drm/radeon: Move the early vblank IRQ fixup to radeon_get_crtc_scanoutpos()

i915 doesn't need this kludge for most platforms. Although we do
appear to need something similar on certain platforms, but we can
be more accurate when we apply the adjustment since we know exactly
why the scanline counter doesn't always quite match the vblank
status.

Also the current code doesn't handle interlaced modes correctly,
and we already deal with interlaced modes in i915 code.

So let's just move the current code to radeon_get_crtc_scanoutpos()
since that's why it was added. For i915 we'll add a more finely
targeted variant.

v2: Fix vpos vs. *vpos bug (Mario)

Reviewed-by: mario.kleiner.de@gmail.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
10 years agodrm: Pass 'flags' from the caller to .get_scanout_position()
Ville Syrjälä [Mon, 28 Oct 2013 18:50:48 +0000 (20:50 +0200)]
drm: Pass 'flags' from the caller to .get_scanout_position()

Preparation for moving the early vblank IRQ logic into
radeon_get_crtc_scanoutpos().

v2: Fix radeon_drv.c compile warning (Mario)

Reviewed-by: mario.kleiner.de@gmail.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>