From 1d6a27775762110d675f71d7192972c7357b99a7 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Thu, 11 Sep 2014 15:00:49 +0200 Subject: [PATCH] thermal: exynos: use correct offset for TMU_CONTROL register on Exynos5260 In exynos5260_tmu_registers tmu_ctrl entry is erroneously assigned twice. The second assignment (to EXYNOS_TMU_REG_CONTROL1 define which represents 0x24 value) overrides the first one (to EXYNOS_TMU_REG_CONTROL define which represents 0x20 value) which results in the wrong (according to the Exynos5260 SoC documentation that I have) offset being used for TMU_CONTROL register. Fix it by removing the wrong assignment and then remove no longer used EXYNOS_TMU_REG_CONTROL1 define. Cc: Naveen Krishna Chatradhi Cc: Amit Daniel Kachhap Cc: Lukasz Majewski Cc: Eduardo Valentin Cc: Zhang Rui Signed-off-by: Bartlomiej Zolnierkiewicz Acked-by: Kyungmin Park Signed-off-by: Eduardo Valentin --- drivers/thermal/samsung/exynos_tmu_data.c | 1 - drivers/thermal/samsung/exynos_tmu_data.h | 1 - 2 files changed, 2 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 2683d2897e90..1724f6cdaef8 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -264,7 +264,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = { static const struct exynos_tmu_registers exynos5260_tmu_registers = { .triminfo_data = EXYNOS_TMU_REG_TRIMINFO, .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, - .tmu_ctrl = EXYNOS_TMU_REG_CONTROL1, .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT, .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK, .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h index 65e2ea6a9579..63de598c9c2c 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.h +++ b/drivers/thermal/samsung/exynos_tmu_data.h @@ -75,7 +75,6 @@ #define EXYNOS_MAX_TRIGGER_PER_REG 4 /* Exynos5260 specific */ -#define EXYNOS_TMU_REG_CONTROL1 0x24 #define EXYNOS5260_TMU_REG_INTEN 0xC0 #define EXYNOS5260_TMU_REG_INTSTAT 0xC4 #define EXYNOS5260_TMU_REG_INTCLEAR 0xC8 -- 2.30.2