From 1dbfee19f1f44f180f118367f7e92a27e258fcb9 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@openwrt.org>
Date: Sun, 19 Mar 2006 05:20:55 +0000
Subject: [PATCH] clean up brcm-2.4 system code

SVN-Revision: 3410
---
 .../linux/brcm-2.4/patches/001-bcm47xx.patch  | 7268 ++++-------------
 1 file changed, 1607 insertions(+), 5661 deletions(-)

diff --git a/openwrt/target/linux/brcm-2.4/patches/001-bcm47xx.patch b/openwrt/target/linux/brcm-2.4/patches/001-bcm47xx.patch
index 9d919156b6..2e64b0fc3e 100644
--- a/openwrt/target/linux/brcm-2.4/patches/001-bcm47xx.patch
+++ b/openwrt/target/linux/brcm-2.4/patches/001-bcm47xx.patch
@@ -1194,433 +1194,6 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmendian.h linux-2.4.32-brcm/
 +)
 +
 +#endif /* _BCMENDIAN_H_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmenet47xx.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenet47xx.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bcmenet47xx.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenet47xx.h	2005-12-16 23:39:10.700821500 +0100
-@@ -0,0 +1,229 @@
-+/*
-+ * Hardware-specific definitions for
-+ * Broadcom BCM47XX 10/100 Mbps Ethernet cores.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.                
-+ *                                     
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;   
-+ * the contents of this file may not be disclosed to third parties, copied
-+ * or duplicated in any form, in whole or in part, without the prior      
-+ * written permission of Broadcom Corporation.                            
-+ * $Id$
-+ */
-+
-+#ifndef	_bcmenet_47xx_h_
-+#define	_bcmenet_47xx_h_
-+
-+#include <bcmenetmib.h>
-+#include <bcmenetrxh.h>
-+#include <bcmenetphy.h>
-+
-+#define	BCMENET_NFILTERS	64		/* # ethernet address filter entries */
-+#define	BCMENET_MCHASHBASE	0x200		/* multicast hash filter base address */
-+#define	BCMENET_MCHASHSIZE	256		/* multicast hash filter size in bytes */
-+#define	BCMENET_MAX_DMA		4096		/* chip has 12 bits of DMA addressing */
-+
-+/* power management event wakeup pattern constants */
-+#define	BCMENET_NPMP		4		/* chip supports 4 wakeup patterns */
-+#define	BCMENET_PMPBASE		0x400		/* wakeup pattern base address */
-+#define	BCMENET_PMPSIZE		0x80		/* 128bytes each pattern */
-+#define	BCMENET_PMMBASE		0x600		/* wakeup mask base address */
-+#define	BCMENET_PMMSIZE		0x10		/* 128bits each mask */
-+
-+/* cpp contortions to concatenate w/arg prescan */
-+#ifndef PAD
-+#define	_PADLINE(line)	pad ## line
-+#define	_XSTR(line)	_PADLINE(line)
-+#define	PAD		_XSTR(__LINE__)
-+#endif	/* PAD */
-+
-+/*
-+ * Host Interface Registers
-+ */
-+typedef volatile struct _bcmenettregs {
-+	/* Device and Power Control */
-+	uint32	devcontrol;
-+	uint32	PAD[2];
-+	uint32	biststatus;
-+	uint32	wakeuplength;
-+	uint32	PAD[3];
-+
-+	/* Interrupt Control */
-+	uint32	intstatus;
-+	uint32	intmask;
-+	uint32	gptimer;
-+	uint32	PAD[23];
-+
-+	/* Ethernet MAC Address Filtering Control */
-+	uint32	PAD[2];
-+	uint32	enetftaddr;
-+	uint32	enetftdata;
-+	uint32	PAD[2];
-+
-+	/* Ethernet MAC Control */
-+	uint32	emactxmaxburstlen;
-+	uint32	emacrxmaxburstlen;
-+	uint32	emaccontrol;
-+	uint32	emacflowcontrol;
-+
-+	uint32	PAD[20];
-+
-+	/* DMA Lazy Interrupt Control */
-+	uint32	intrecvlazy;
-+	uint32	PAD[63];
-+
-+	/* DMA engine */
-+	dma32regp_t	dmaregs;
-+	dma32diag_t	dmafifo;
-+	uint32	PAD[116];
-+
-+	/* EMAC Registers */
-+	uint32 rxconfig;
-+	uint32 rxmaxlength;
-+	uint32 txmaxlength;
-+	uint32 PAD;
-+	uint32 mdiocontrol;
-+	uint32 mdiodata;
-+	uint32 emacintmask;
-+	uint32 emacintstatus;
-+	uint32 camdatalo;
-+	uint32 camdatahi;
-+	uint32 camcontrol;
-+	uint32 enetcontrol;
-+	uint32 txcontrol;
-+	uint32 txwatermark;
-+	uint32 mibcontrol;
-+	uint32 PAD[49];
-+
-+	/* EMAC MIB counters */
-+	bcmenetmib_t	mib;
-+
-+	uint32	PAD[585];
-+
-+	/* Sonics SiliconBackplane config registers */
-+	sbconfig_t	sbconfig;
-+} bcmenetregs_t;
-+
-+/* device control */
-+#define	DC_PM		((uint32)1 << 7)	/* pattern filtering enable */
-+#define	DC_IP		((uint32)1 << 10)	/* internal ephy present (rev >= 1) */
-+#define	DC_ER		((uint32)1 << 15)	/* ephy reset */
-+#define	DC_MP		((uint32)1 << 16)	/* mii phy mode enable */
-+#define	DC_CO		((uint32)1 << 17)	/* mii phy mode: enable clocks */
-+#define	DC_PA_MASK	0x7c0000		/* mii phy mode: mdc/mdio phy address */
-+#define	DC_PA_SHIFT	18
-+#define	DC_FS_MASK	0x03800000		/* fifo size (rev >= 8) */
-+#define	DC_FS_SHIFT	23
-+#define	DC_FS_4K	0			/* 4Kbytes */
-+#define	DC_FS_512	1			/* 512bytes */
-+
-+/* wakeup length */
-+#define	WL_P0_MASK	0x7f			/* pattern 0 */
-+#define	WL_D0		((uint32)1 << 7)
-+#define	WL_P1_MASK	0x7f00			/* pattern 1 */
-+#define	WL_P1_SHIFT	8
-+#define	WL_D1		((uint32)1 << 15)
-+#define	WL_P2_MASK	0x7f0000		/* pattern 2 */
-+#define	WL_P2_SHIFT	16
-+#define	WL_D2		((uint32)1 << 23)
-+#define	WL_P3_MASK	0x7f000000		/* pattern 3 */
-+#define	WL_P3_SHIFT	24
-+#define	WL_D3		((uint32)1 << 31)
-+
-+/* intstatus and intmask */
-+#define	I_PME		((uint32)1 << 6)	/* power management event */
-+#define	I_TO		((uint32)1 << 7)	/* general purpose timeout */
-+#define	I_PC		((uint32)1 << 10)	/* descriptor error */
-+#define	I_PD		((uint32)1 << 11)	/* data error */
-+#define	I_DE		((uint32)1 << 12)	/* descriptor protocol error */
-+#define	I_RU		((uint32)1 << 13)	/* receive descriptor underflow */
-+#define	I_RO		((uint32)1 << 14)	/* receive fifo overflow */
-+#define	I_XU		((uint32)1 << 15)	/* transmit fifo underflow */
-+#define	I_RI		((uint32)1 << 16)	/* receive interrupt */
-+#define	I_XI		((uint32)1 << 24)	/* transmit interrupt */
-+#define	I_EM		((uint32)1 << 26)	/* emac interrupt */
-+#define	I_MW		((uint32)1 << 27)	/* mii write */
-+#define	I_MR		((uint32)1 << 28)	/* mii read */
-+
-+/* emaccontrol */
-+#define	EMC_CG		((uint32)1 << 0)	/* crc32 generation enable */
-+#define	EMC_EP		((uint32)1 << 2)	/* onchip ephy: powerdown (rev >= 1) */
-+#define	EMC_ED		((uint32)1 << 3)	/* onchip ephy: energy detected (rev >= 1) */
-+#define	EMC_LC_MASK	0xe0			/* onchip ephy: led control (rev >= 1) */
-+#define	EMC_LC_SHIFT	5
-+
-+/* emacflowcontrol */
-+#define	EMF_RFH_MASK	0xff			/* rx fifo hi water mark */
-+#define	EMF_PG		((uint32)1 << 15)	/* enable pause frame generation */
-+
-+/* interrupt receive lazy */
-+#define	IRL_TO_MASK	0x00ffffff		/* timeout */
-+#define	IRL_FC_MASK	0xff000000		/* frame count */
-+#define	IRL_FC_SHIFT	24			/* frame count */
-+
-+/* emac receive config */
-+#define	ERC_DB		((uint32)1 << 0)	/* disable broadcast */
-+#define	ERC_AM		((uint32)1 << 1)	/* accept all multicast */
-+#define	ERC_RDT		((uint32)1 << 2)	/* receive disable while transmitting */
-+#define	ERC_PE		((uint32)1 << 3)	/* promiscuous enable */
-+#define	ERC_LE		((uint32)1 << 4)	/* loopback enable */
-+#define	ERC_FE		((uint32)1 << 5)	/* enable flow control */
-+#define	ERC_UF		((uint32)1 << 6)	/* accept unicast flow control frame */
-+#define	ERC_RF		((uint32)1 << 7)	/* reject filter */
-+#define	ERC_CA		((uint32)1 << 8)	/* cam absent */
-+
-+/* emac mdio control */
-+#define	MC_MF_MASK	0x7f			/* mdc frequency */
-+#define	MC_PE		((uint32)1 << 7)	/* mii preamble enable */
-+
-+/* emac mdio data */
-+#define	MD_DATA_MASK	0xffff			/* r/w data */
-+#define	MD_TA_MASK	0x30000			/* turnaround value */
-+#define	MD_TA_SHIFT	16
-+#define	MD_TA_VALID	(2 << MD_TA_SHIFT)	/* valid ta */
-+#define	MD_RA_MASK	0x7c0000		/* register address */
-+#define	MD_RA_SHIFT	18
-+#define	MD_PMD_MASK	0xf800000		/* physical media device */
-+#define	MD_PMD_SHIFT	23
-+#define	MD_OP_MASK	0x30000000		/* opcode */
-+#define	MD_OP_SHIFT	28
-+#define	MD_OP_WRITE	(1 << MD_OP_SHIFT)	/* write op */
-+#define	MD_OP_READ	(2 << MD_OP_SHIFT)	/* read op */
-+#define	MD_SB_MASK	0xc0000000		/* start bits */
-+#define	MD_SB_SHIFT	30
-+#define	MD_SB_START	(0x1 << MD_SB_SHIFT)	/* start of frame */
-+
-+/* emac intstatus and intmask */
-+#define	EI_MII		((uint32)1 << 0)	/* mii mdio interrupt */
-+#define	EI_MIB		((uint32)1 << 1)	/* mib interrupt */
-+#define	EI_FLOW		((uint32)1 << 2)	/* flow control interrupt */
-+
-+/* emac cam data high */
-+#define	CD_V		((uint32)1 << 16)	/* valid bit */
-+
-+/* emac cam control */
-+#define	CC_CE		((uint32)1 << 0)	/* cam enable */
-+#define	CC_MS		((uint32)1 << 1)	/* mask select */
-+#define	CC_RD		((uint32)1 << 2)	/* read */
-+#define	CC_WR		((uint32)1 << 3)	/* write */
-+#define	CC_INDEX_MASK	0x3f0000		/* index */
-+#define	CC_INDEX_SHIFT	16
-+#define	CC_CB		((uint32)1 << 31)	/* cam busy */
-+
-+/* emac ethernet control */
-+#define	EC_EE		((uint32)1 << 0)	/* emac enable */
-+#define	EC_ED		((uint32)1 << 1)	/* emac disable */
-+#define	EC_ES		((uint32)1 << 2)	/* emac soft reset */
-+#define	EC_EP		((uint32)1 << 3)	/* external phy select */
-+
-+/* emac transmit control */
-+#define	EXC_FD		((uint32)1 << 0)	/* full duplex */
-+#define	EXC_FM		((uint32)1 << 1)	/* flowmode */
-+#define	EXC_SB		((uint32)1 << 2)	/* single backoff enable */
-+#define	EXC_SS		((uint32)1 << 3)	/* small slottime */
-+
-+/* emac mib control */
-+#define	EMC_RZ		((uint32)1 << 0)	/* autoclear on read */
-+
-+#endif	/* _bcmenet_47xx_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmenetmib.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetmib.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bcmenetmib.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetmib.h	2005-12-16 23:39:10.700821500 +0100
-@@ -0,0 +1,81 @@
-+/*
-+ * Hardware-specific MIB definition for
-+ * Broadcom Home Networking Division
-+ * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores.
-+ * 
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.                
-+ *                                     
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;   
-+ * the contents of this file may not be disclosed to third parties, copied
-+ * or duplicated in any form, in whole or in part, without the prior      
-+ * written permission of Broadcom Corporation.                            
-+ * $Id$
-+ */
-+
-+#ifndef _bcmenetmib_h_
-+#define _bcmenetmib_h_
-+
-+/* cpp contortions to concatenate w/arg prescan */
-+#ifndef PAD
-+#define	_PADLINE(line)	pad ## line
-+#define	_XSTR(line)	_PADLINE(line)
-+#define	PAD		_XSTR(__LINE__)
-+#endif	/* PAD */
-+
-+/*
-+ * EMAC MIB Registers
-+ */
-+typedef volatile struct {
-+	uint32 tx_good_octets;
-+	uint32 tx_good_pkts;
-+	uint32 tx_octets;
-+	uint32 tx_pkts;
-+	uint32 tx_broadcast_pkts;
-+	uint32 tx_multicast_pkts;
-+	uint32 tx_len_64;
-+	uint32 tx_len_65_to_127;
-+	uint32 tx_len_128_to_255;
-+	uint32 tx_len_256_to_511;
-+	uint32 tx_len_512_to_1023;
-+	uint32 tx_len_1024_to_max;
-+	uint32 tx_jabber_pkts;
-+	uint32 tx_oversize_pkts;
-+	uint32 tx_fragment_pkts;
-+	uint32 tx_underruns;
-+	uint32 tx_total_cols;
-+	uint32 tx_single_cols;
-+	uint32 tx_multiple_cols;
-+	uint32 tx_excessive_cols;
-+	uint32 tx_late_cols;
-+	uint32 tx_defered;
-+	uint32 tx_carrier_lost;
-+	uint32 tx_pause_pkts;
-+	uint32 PAD[8];
-+
-+	uint32 rx_good_octets;
-+	uint32 rx_good_pkts;
-+	uint32 rx_octets;
-+	uint32 rx_pkts;
-+	uint32 rx_broadcast_pkts;
-+	uint32 rx_multicast_pkts;
-+	uint32 rx_len_64;
-+	uint32 rx_len_65_to_127;
-+	uint32 rx_len_128_to_255;
-+	uint32 rx_len_256_to_511;
-+	uint32 rx_len_512_to_1023;
-+	uint32 rx_len_1024_to_max;
-+	uint32 rx_jabber_pkts;
-+	uint32 rx_oversize_pkts;
-+	uint32 rx_fragment_pkts;
-+	uint32 rx_missed_pkts;
-+	uint32 rx_crc_align_errs;
-+	uint32 rx_undersize;
-+	uint32 rx_crc_errs;
-+	uint32 rx_align_errs;
-+	uint32 rx_symbol_errs;
-+	uint32 rx_pause_pkts;
-+	uint32 rx_nonpause_pkts;
-+} bcmenetmib_t;
-+
-+#endif	/* _bcmenetmib_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmenetphy.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetphy.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bcmenetphy.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetphy.h	2005-12-16 23:39:10.700821500 +0100
-@@ -0,0 +1,58 @@
-+/*
-+ * Misc Broadcom BCM47XX MDC/MDIO enet phy definitions.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.                
-+ *                                     
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;   
-+ * the contents of this file may not be disclosed to third parties, copied
-+ * or duplicated in any form, in whole or in part, without the prior      
-+ * written permission of Broadcom Corporation.                            
-+ * $Id$
-+ */
-+
-+#ifndef	_bcmenetphy_h_
-+#define	_bcmenetphy_h_
-+
-+/* phy address */
-+#define	MAXEPHY		32			/* mdio phy addresses are 5bit quantities */
-+#define	EPHY_MASK	0x1f
-+#define	EPHY_NONE	31			/* nvram: no phy present at all */
-+#define	EPHY_NOREG	30			/* nvram: no local phy regs */
-+
-+/* just a few phy registers */
-+#define	CTL_RESET	(1 << 15)		/* reset */
-+#define	CTL_LOOP	(1 << 14)		/* loopback */
-+#define	CTL_SPEED	(1 << 13)		/* speed selection 0=10, 1=100 */
-+#define	CTL_ANENAB	(1 << 12)		/* autonegotiation enable */
-+#define	CTL_RESTART	(1 << 9)		/* restart autonegotiation */
-+#define	CTL_DUPLEX	(1 << 8)		/* duplex mode 0=half, 1=full */
-+
-+#define	ADV_10FULL	(1 << 6)		/* autonegotiate advertise 10full */
-+#define	ADV_10HALF	(1 << 5)		/* autonegotiate advertise 10half */
-+#define	ADV_100FULL	(1 << 8)		/* autonegotiate advertise 100full */
-+#define	ADV_100HALF	(1 << 7)		/* autonegotiate advertise 100half */
-+
-+/* link partner ability register */
-+#define LPA_SLCT	0x001f			/* same as advertise selector */
-+#define LPA_10HALF	0x0020			/* can do 10mbps half-duplex */
-+#define LPA_10FULL	0x0040			/* can do 10mbps full-duplex */
-+#define LPA_100HALF	0x0080			/* can do 100mbps half-duplex */
-+#define LPA_100FULL	0x0100			/* can do 100mbps full-duplex */
-+#define LPA_100BASE4	0x0200			/* can do 100mbps 4k packets */
-+#define LPA_RESV	0x1c00			/* unused */
-+#define LPA_RFAULT	0x2000			/* link partner faulted */
-+#define LPA_LPACK	0x4000			/* link partner acked us */
-+#define LPA_NPAGE	0x8000			/* next page bit */
-+
-+#define LPA_DUPLEX	(LPA_10FULL | LPA_100FULL)
-+#define LPA_100		(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-+
-+#define	STAT_REMFAULT	(1 << 4)		/* remote fault */
-+#define	STAT_LINK	(1 << 2)		/* link status */
-+#define	STAT_JAB	(1 << 1)		/* jabber detected */
-+#define	AUX_FORCED	(1 << 2)		/* forced 10/100 */
-+#define	AUX_SPEED	(1 << 1)		/* speed 0=10mbps 1=100mbps */
-+#define	AUX_DUPLEX	(1 << 0)		/* duplex 0=half 1=full */
-+
-+#endif	/* _bcmenetphy_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmenetrxh.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetrxh.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bcmenetrxh.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmenetrxh.h	2005-12-16 23:39:10.700821500 +0100
-@@ -0,0 +1,43 @@
-+/*
-+ * Hardware-specific Receive Data Header for the
-+ * Broadcom Home Networking Division
-+ * BCM44XX and BCM47XX 10/100 Mbps Ethernet cores.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.                
-+ *                                     
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;   
-+ * the contents of this file may not be disclosed to third parties, copied
-+ * or duplicated in any form, in whole or in part, without the prior      
-+ * written permission of Broadcom Corporation.                            
-+ * $Id$
-+ */
-+
-+#ifndef _bcmenetrxh_h_
-+#define	_bcmenetrxh_h_
-+
-+/*
-+ * The Ethernet MAC core returns an 8-byte Receive Frame Data Header
-+ * with every frame consisting of
-+ * 16bits of frame length, followed by
-+ * 16bits of EMAC rx descriptor info, followed by 32bits of undefined.
-+ */
-+typedef volatile struct {
-+	uint16	len;
-+	uint16	flags;
-+	uint16	pad[12];
-+} bcmenetrxh_t;
-+
-+#define	RXHDR_LEN	28
-+
-+#define	RXF_L		((uint16)1 << 11)	/* last buffer in a frame */
-+#define	RXF_MISS	((uint16)1 << 7)	/* received due to promisc mode */
-+#define	RXF_BRDCAST	((uint16)1 << 6)	/* dest is broadcast address */
-+#define	RXF_MULT	((uint16)1 << 5)	/* dest is multicast address */
-+#define	RXF_LG		((uint16)1 << 4)	/* frame length > rxmaxlength */
-+#define	RXF_NO		((uint16)1 << 3)	/* odd number of nibbles */
-+#define	RXF_RXER	((uint16)1 << 2)	/* receive symbol error */
-+#define	RXF_CRC		((uint16)1 << 1)	/* crc error */
-+#define	RXF_OV		((uint16)1 << 0)	/* fifo overflow */
-+
-+#endif	/* _bcmenetrxh_h_ */
 diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmnvram.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmnvram.h
 --- linux-2.4.32/arch/mips/bcm947xx/include/bcmnvram.h	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmnvram.h	2005-12-16 23:39:10.700821500 +0100
@@ -1766,35 +1339,6 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmnvram.h linux-2.4.32-brcm/a
 +#define NVRAM_MAX_PARAM_LEN 64
 +
 +#endif /* _bcmnvram_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmparams.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmparams.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bcmparams.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmparams.h	2005-12-16 23:39:10.700821500 +0100
-@@ -0,0 +1,25 @@
-+/*
-+ * Misc system wide parameters.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ * $Id$
-+ */
-+
-+#ifndef	_bcmparams_h_
-+#define	_bcmparams_h_
-+
-+#define VLAN_MAXVID	15	/* Max. VLAN ID supported/allowed */
-+
-+#define VLAN_NUMPRIS	8	/* # of prio, start from 0 */
-+
-+#define DEV_NUMIFS	16	/* Max. # of devices/interfaces supported */
-+
-+#define WL_MAXBSSCFG	16	/* maximum number of BSS Configs we can configure */
-+
-+#endif
 diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmsrom.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmsrom.h
 --- linux-2.4.32/arch/mips/bcm947xx/include/bcmsrom.h	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bcmsrom.h	2005-12-16 23:39:10.704821750 +0100
@@ -2139,505 +1683,483 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bcmutils.h linux-2.4.32-brcm/a
 +extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint len);
 +
 +#endif	/* _bcmutils_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/bitfuncs.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/bitfuncs.h
---- linux-2.4.32/arch/mips/bcm947xx/include/bitfuncs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/bitfuncs.h	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,85 @@
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/hnddma.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/hnddma.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/hnddma.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/hnddma.h	2005-12-16 23:39:10.708822000 +0100
+@@ -0,0 +1,71 @@
 +/*
-+ * bit manipulation utility functions
++ * Generic Broadcom Home Networking Division (HND) DMA engine SW interface
++ * This supports the following chips: BCM42xx, 44xx, 47xx .
 + *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
++ * Copyright 2005, Broadcom Corporation      
++ * All Rights Reserved.      
++ *       
++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
 + * $Id$
 + */
 +
-+#ifndef _BITFUNCS_H
-+#define _BITFUNCS_H
-+
-+#include <typedefs.h>
++#ifndef	_hnddma_h_
++#define	_hnddma_h_
 +
-+/* local prototypes */
-+static INLINE uint32 find_msbit(uint32 x);
++/* export structure */
++typedef volatile struct {
++	/* rx error counters */
++	uint		rxgiants;	/* rx giant frames */
++	uint		rxnobuf;	/* rx out of dma descriptors */
++	/* tx error counters */
++	uint		txnobuf;	/* tx out of dma descriptors */
++} hnddma_t;
 +
++#ifndef di_t
++#define	di_t	void
++#endif
 +
-+/*
-+ * find_msbit: returns index of most significant set bit in x, with index
-+ *   range defined as 0-31.  NOTE: returns zero if input is zero.
-+ */
++#ifndef osl_t 
++#define osl_t void
++#endif
 +
-+#if defined(USE_PENTIUM_BSR) && defined(__GNUC__)
++/* externs */
++extern void * dma_attach(osl_t *osh, char *name, sb_t *sbh, void *dmaregstx, void *dmaregsrx, 
++			 uint ntxd, uint nrxd, uint rxbufsize, uint nrxpost, uint rxoffset, uint *msg_level);
++extern void dma_detach(di_t *di);
++extern void dma_txreset(di_t *di);
++extern void dma_rxreset(di_t *di);
++extern void dma_txinit(di_t *di);
++extern bool dma_txenabled(di_t *di);
++extern void dma_rxinit(di_t *di);
++extern void dma_rxenable(di_t *di);
++extern bool dma_rxenabled(di_t *di);
++extern void dma_txsuspend(di_t *di);
++extern void dma_txresume(di_t *di);
++extern bool dma_txsuspended(di_t *di);
++extern bool dma_txsuspendedidle(di_t *di);
++extern bool dma_txstopped(di_t *di);
++extern bool dma_rxstopped(di_t *di);
++extern int dma_txfast(di_t *di, void *p, uint32 coreflags);
++extern void dma_fifoloopbackenable(di_t *di);
++extern void *dma_rx(di_t *di);
++extern void dma_rxfill(di_t *di);
++extern void dma_txreclaim(di_t *di, bool forceall);
++extern void dma_rxreclaim(di_t *di);
++extern uintptr dma_getvar(di_t *di, char *name);
++extern void *dma_getnexttxp(di_t *di, bool forceall);
++extern void *dma_peeknexttxp(di_t *di);
++extern void *dma_getnextrxp(di_t *di, bool forceall);
++extern void dma_txblock(di_t *di);
++extern void dma_txunblock(di_t *di);
++extern uint dma_txactive(di_t *di);
++extern void dma_txrotate(di_t *di);
 +
-+/*
-+ * Implementation for Pentium processors and gcc.  Note that this
-+ * instruction is actually very slow on some processors (e.g., family 5,
-+ * model 2, stepping 12, "Pentium 75 - 200"), so we use the generic
-+ * implementation instead.
-+ */
-+static INLINE uint32 find_msbit(uint32 x)
-+{
-+	uint msbit;
-+        __asm__("bsrl %1,%0"
-+                :"=r" (msbit)
-+                :"r" (x));
-+        return msbit;
-+}
++extern void dma_rxpiomode(dma32regs_t *);
++extern void dma_txpioloopback(dma32regs_t *);
 +
-+#else
 +
++#endif	/* _hnddma_h_ */
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/hndmips.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/hndmips.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/hndmips.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/hndmips.h	2005-12-16 23:39:10.708822000 +0100
+@@ -0,0 +1,16 @@
 +/*
-+ * Generic Implementation
++ * Alternate include file for HND sbmips.h since CFE also ships with
++ * a sbmips.h.
++ *
++ * Copyright 2005, Broadcom Corporation
++ * All Rights Reserved.
++ * 
++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
++ *
++ * $Id$
 + */
 +
-+#define DB_POW_MASK16	0xffff0000
-+#define DB_POW_MASK8	0x0000ff00
-+#define DB_POW_MASK4	0x000000f0
-+#define DB_POW_MASK2	0x0000000c
-+#define DB_POW_MASK1	0x00000002
-+
-+static INLINE uint32 find_msbit(uint32 x)
-+{
-+	uint32 temp_x = x;
-+	uint msbit = 0;
-+	if (temp_x & DB_POW_MASK16) {
-+		temp_x >>= 16;
-+		msbit = 16;
-+	}
-+	if (temp_x & DB_POW_MASK8) {
-+		temp_x >>= 8;
-+		msbit += 8;
-+	}
-+	if (temp_x & DB_POW_MASK4) {
-+		temp_x >>= 4;
-+		msbit += 4;
-+	}
-+	if (temp_x & DB_POW_MASK2) {
-+		temp_x >>= 2;
-+		msbit += 2;
-+	}
-+	if (temp_x & DB_POW_MASK1) {
-+		msbit += 1;
-+	}
-+	return(msbit);
-+}
-+
-+#endif
-+
-+#endif /* _BITFUNCS_H */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/cfe_osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/cfe_osl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/cfe_osl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/cfe_osl.h	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,191 @@
++#include "sbmips.h"
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/linux_osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/linux_osl.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/linux_osl.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/linux_osl.h	2005-12-16 23:39:10.708822000 +0100
+@@ -0,0 +1,371 @@
 +/*
-+ * CFE boot loader OS Abstraction Layer.
++ * Linux OS Independent Layer
 + *
 + * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.                
-+ *                                     
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;   
-+ * the contents of this file may not be disclosed to third parties, copied
-+ * or duplicated in any form, in whole or in part, without the prior      
-+ * written permission of Broadcom Corporation.                            
++ * All Rights Reserved.
++ * 
++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
 + *
 + * $Id$
 + */
 +
-+#ifndef _cfe_osl_h_
-+#define _cfe_osl_h_
-+
-+#include <lib_types.h>
-+#include <lib_string.h>
-+#include <lib_printf.h>
-+#include <lib_malloc.h>
-+#include <cpu_config.h>
-+#include <cfe_timer.h>
-+#include <cfe_iocb.h>
-+#include <cfe_devfuncs.h>
-+#include <addrspace.h>
++#ifndef _linux_osl_h_
++#define _linux_osl_h_
 +
 +#include <typedefs.h>
 +
-+/* dump string */
-+extern int (*xprinthook)(const char *str);
-+#define puts(str) do { if (xprinthook) xprinthook(str); } while (0)
++/* use current 2.4.x calling conventions */
++#include <linuxver.h>
 +
 +/* assert and panic */
++#ifdef __GNUC__
++#define GCC_VERSION (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
++#if GCC_VERSION > 30100
 +#define	ASSERT(exp)		do {} while (0)
++#else
++/* ASSERT could causes segmentation fault on GCC3.1, use empty instead*/
++#define	ASSERT(exp)		
++#endif
++#endif
++
++/* microsecond delay */
++#define	OSL_DELAY(usec)		osl_delay(usec)
++extern void osl_delay(uint usec);
 +
 +/* PCMCIA attribute space access macros */
++#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
++struct pcmcia_dev {
++	dev_link_t link;	/* PCMCIA device pointer */
++	dev_node_t node;	/* PCMCIA node structure */
++	void *base;		/* Mapped attribute memory window */
++	size_t size;		/* Size of window */
++	void *drv;		/* Driver data */
++};
++#endif
 +#define	OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
-+	bzero(buf, size)
++	osl_pcmcia_read_attr((osh), (offset), (buf), (size))
 +#define	OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
-+	do {} while (0)
++	osl_pcmcia_write_attr((osh), (offset), (buf), (size))
++extern void osl_pcmcia_read_attr(osl_t *osh, uint offset, void *buf, int size);
++extern void osl_pcmcia_write_attr(osl_t *osh, uint offset, void *buf, int size);
 +
 +/* PCI configuration space access macros */
-+#define	OSL_PCI_READ_CONFIG(loc, offset, size) \
-+	(offset == 8 ? 0 : 0xffffffff)
-+#define	OSL_PCI_WRITE_CONFIG(loc, offset, size, val) \
-+	do {} while (0)
++#define	OSL_PCI_READ_CONFIG(osh, offset, size) \
++	osl_pci_read_config((osh), (offset), (size))
++#define	OSL_PCI_WRITE_CONFIG(osh, offset, size, val) \
++	osl_pci_write_config((osh), (offset), (size), (val))
++extern uint32 osl_pci_read_config(osl_t *osh, uint size, uint offset);
++extern void osl_pci_write_config(osl_t *osh, uint offset, uint size, uint val);
 +
 +/* PCI device bus # and slot # */
-+#define OSL_PCI_BUS(osh)	(0)
-+#define OSL_PCI_SLOT(osh)	(0)
++#define OSL_PCI_BUS(osh)	osl_pci_bus(osh)
++#define OSL_PCI_SLOT(osh)	osl_pci_slot(osh)
++extern uint osl_pci_bus(osl_t *osh);
++extern uint osl_pci_slot(osl_t *osh);
 +
-+/* register access macros */
-+#define wreg32(r, v)		(*(volatile uint32*)(r) = (uint32)(v))
-+#define rreg32(r)		(*(volatile uint32*)(r))
-+#ifdef IL_BIGENDIAN
-+#define wreg16(r, v)		(*(volatile uint16*)((ulong)(r)^2) = (uint16)(v))
-+#define rreg16(r)		(*(volatile uint16*)((ulong)(r)^2))
-+#define wreg8(r, v)		(*(volatile uint8*)((ulong)(r)^3) = (uint8)(v))
-+#define rreg8(r)		(*(volatile uint8*)((ulong)(r)^3))
-+#else
-+#define wreg16(r, v)		(*(volatile uint16*)(r) = (uint16)(v))
-+#define rreg16(r)		(*(volatile uint16*)(r))
-+#define wreg8(r, v)		(*(volatile uint8*)(r) = (uint8)(v))
-+#define rreg8(r)		(*(volatile uint8*)(r))
-+#endif
-+#define R_REG(r) ({ \
-+	__typeof(*(r)) __osl_v; \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	__osl_v = rreg8((r)); break; \
-+	case sizeof(uint16):	__osl_v = rreg16((r)); break; \
-+	case sizeof(uint32):	__osl_v = rreg32((r)); break; \
-+	} \
-+	__osl_v; \
-+})
-+#define W_REG(r, v) do { \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	wreg8((r), (v)); break; \
-+	case sizeof(uint16):	wreg16((r), (v)); break; \
-+	case sizeof(uint32):	wreg32((r), (v)); break; \
-+	} \
-+} while (0)
-+#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
-+#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
-+
-+/* bcopy, bcmp, and bzero */
-+#define bcmp(b1, b2, len)	lib_memcmp((b1), (b2), (len))
++/* OSL initialization */
++extern osl_t *osl_attach(void *pdev);
++extern void osl_detach(osl_t *osh);
 +
-+#define osl_attach(pdev)	((osl_t*)pdev)
-+#define osl_detach(osh)		
++/* host/bus architecture-specific byte swap */
++#define BUS_SWAP32(v)		(v)
 +
 +/* general purpose memory allocation */
-+#define	MALLOC(osh, size)	KMALLOC((size),0)
-+#define	MFREE(osh, addr, size)	KFREE((addr))
-+#define	MALLOCED(osh)		(0)
-+#define	MALLOC_DUMP(osh, buf, sz)
-+#define	MALLOC_FAILED(osh)	(0)
 +
-+/* uncached virtual address */
-+#define	OSL_UNCACHED(va)	((void*)UNCADDR((ulong)(va)))
++#if defined(BCMDBG_MEM)
 +
-+/* host/bus architecture-specific address byte swap */
-+#define BUS_SWAP32(v)		(v)
++#define	MALLOC(osh, size)	osl_debug_malloc((osh), (size), __LINE__, __FILE__)
++#define	MFREE(osh, addr, size)	osl_debug_mfree((osh), (addr), (size), __LINE__, __FILE__)
++#define MALLOCED(osh)		osl_malloced((osh))
++#define	MALLOC_DUMP(osh, buf, sz) osl_debug_memdump((osh), (buf), (sz))
++extern void *osl_debug_malloc(osl_t *osh, uint size, int line, char* file);
++extern void osl_debug_mfree(osl_t *osh, void *addr, uint size, int line, char* file);
++extern char *osl_debug_memdump(osl_t *osh, char *buf, uint sz);
 +
-+/* get processor cycle count */
-+#define OSL_GETCYCLES(x)	((x) = 0)
++#else
 +
-+/* microsecond delay */
-+#define	OSL_DELAY(usec)		cfe_usleep((cfe_cpu_speed/CPUCFG_CYCLESPERCPUTICK/1000000*(usec)))
++#define	MALLOC(osh, size)	osl_malloc((osh), (size))
++#define	MFREE(osh, addr, size)	osl_mfree((osh), (addr), (size))
++#define MALLOCED(osh)		osl_malloced((osh))
 +
-+#define OSL_ERROR(bcmerror)	osl_error(bcmerror)
++#endif	/* BCMDBG_MEM */
 +
-+/* map/unmap physical to virtual I/O */
-+#define	REG_MAP(pa, size)	((void*)UNCADDR((ulong)(pa)))
-+#define	REG_UNMAP(va)		do {} while (0)
++#define	MALLOC_FAILED(osh)	osl_malloc_failed((osh))
 +
-+/* dereference an address that may cause a bus exception */
-+#define	BUSPROBE(val, addr)	osl_busprobe(&(val), (uint32)(addr))
-+extern int osl_busprobe(uint32 *val, uint32 addr);
++extern void *osl_malloc(osl_t *osh, uint size);
++extern void osl_mfree(osl_t *osh, void *addr, uint size);
++extern uint osl_malloced(osl_t *osh);
++extern uint osl_malloc_failed(osl_t *osh);
 +
-+/* allocate/free shared (dma-able) consistent (uncached) memory */
-+#define	DMA_CONSISTENT_ALIGN	4096
++/* allocate/free shared (dma-able) consistent memory */
++#define	DMA_CONSISTENT_ALIGN	PAGE_SIZE
 +#define	DMA_ALLOC_CONSISTENT(osh, size, pap) \
-+	osl_dma_alloc_consistent((size), (pap))
++	osl_dma_alloc_consistent((osh), (size), (pap))
 +#define	DMA_FREE_CONSISTENT(osh, va, size, pa) \
-+	osl_dma_free_consistent((void*)(va))
-+extern void *osl_dma_alloc_consistent(uint size, ulong *pap);
-+extern void osl_dma_free_consistent(void *va);
++	osl_dma_free_consistent((osh), (void*)(va), (size), (pa))
++extern void *osl_dma_alloc_consistent(osl_t *osh, uint size, ulong *pap);
++extern void osl_dma_free_consistent(osl_t *osh, void *va, uint size, ulong pa);
 +
 +/* map/unmap direction */
-+#define	DMA_TX			1
-+#define	DMA_RX			2
++#define	DMA_TX	1
++#define	DMA_RX	2
 +
 +/* map/unmap shared (dma-able) memory */
-+#define	DMA_MAP(osh, va, size, direction, lb) ({ \
-+	cfe_flushcache(CFE_CACHE_FLUSH_D); \
-+	PHYSADDR((ulong)(va)); \
-+})
++#define	DMA_MAP(osh, va, size, direction, p) \
++	osl_dma_map((osh), (va), (size), (direction))
 +#define	DMA_UNMAP(osh, pa, size, direction, p) \
-+	do {} while (0)
-+
-+/* shared (dma-able) memory access macros */
-+#define	R_SM(r)			*(r)
-+#define	W_SM(r, v)		(*(r) = (v))
-+#define	BZERO_SM(r, len)	lib_memset((r), '\0', (len))
-+
-+/* generic packet structure */
-+#define LBUFSZ		4096
-+#define LBDATASZ	(LBUFSZ - sizeof(struct lbuf))
-+struct lbuf {	
-+	struct lbuf	*next;		/* pointer to next lbuf if in a chain */
-+	struct lbuf	*link;		/* pointer to next lbuf if in a list */
-+	uchar		*head;		/* start of buffer */
-+	uchar		*end;		/* end of buffer */
-+	uchar		*data;		/* start of data */
-+	uchar		*tail;		/* end of data */
-+	uint		len;		/* nbytes of data */
-+	void		*cookie;	/* generic cookie */
-+};
-+
-+/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
-+#define	PKTBUFSZ	2048
++	osl_dma_unmap((osh), (pa), (size), (direction))
++extern uint osl_dma_map(osl_t *osh, void *va, uint size, int direction);
++extern void osl_dma_unmap(osl_t *osh, uint pa, uint size, int direction);
 +
-+/* packet primitives */
-+#define	PKTGET(osh, len, send)		((void*)osl_pktget((len)))
-+#define	PKTFREE(osh, lb, send)		osl_pktfree((struct lbuf*)(lb))
-+#define	PKTDATA(osh, lb)		(((struct lbuf*)(lb))->data)
-+#define	PKTLEN(osh, lb)			(((struct lbuf*)(lb))->len)
-+#define PKTHEADROOM(osh, lb)		(PKTDATA(osh,lb)-(((struct lbuf*)(lb))->head))
-+#define PKTTAILROOM(osh, lb)		((((struct lbuf*)(lb))->end)-(((struct lbuf*)(lb))->tail))
-+#define	PKTNEXT(osh, lb)		(((struct lbuf*)(lb))->next)
-+#define	PKTSETNEXT(lb, x)		(((struct lbuf*)(lb))->next = (struct lbuf*)(x))
-+#define	PKTSETLEN(osh, lb, len)		osl_pktsetlen((struct lbuf*)(lb), (len))
-+#define	PKTPUSH(osh, lb, bytes)		osl_pktpush((struct lbuf*)(lb), (bytes))
-+#define	PKTPULL(osh, lb, bytes)		osl_pktpull((struct lbuf*)(lb), (bytes))
-+#define	PKTDUP(osh, lb)			osl_pktdup((struct lbuf*)(lb))
-+#define	PKTCOOKIE(lb)			(((struct lbuf*)(lb))->cookie)
-+#define	PKTSETCOOKIE(lb, x)		(((struct lbuf*)(lb))->cookie = (void*)(x))
-+#define	PKTLINK(lb)			(((struct lbuf*)(lb))->link)
-+#define	PKTSETLINK(lb, x)		(((struct lbuf*)(lb))->link = (struct lbuf*)(x))
-+#define	PKTPRIO(lb)			(0)
-+#define	PKTSETPRIO(lb, x)		do {} while (0)
-+extern struct lbuf *osl_pktget(uint len);
-+extern void osl_pktfree(struct lbuf *lb);
-+extern void osl_pktsetlen(struct lbuf *lb, uint len);
-+extern uchar *osl_pktpush(struct lbuf *lb, uint bytes);
-+extern uchar *osl_pktpull(struct lbuf *lb, uint bytes);
-+extern struct lbuf *osl_pktdup(struct lbuf *lb);
-+extern int osl_error(int bcmerror);
++/* register access macros */
++#if defined(BCMJTAG)
++#include <bcmjtag.h>
++#define	R_REG(r)	bcmjtag_read(NULL, (uint32)(r), sizeof (*(r)))
++#define	W_REG(r, v)	bcmjtag_write(NULL, (uint32)(r), (uint32)(v), sizeof (*(r)))
++#endif
 +
-+#endif	/* _cfe_osl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/epivers.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/epivers.h
---- linux-2.4.32/arch/mips/bcm947xx/include/epivers.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/epivers.h	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,69 @@
 +/*
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ *
-+*/
++ * BINOSL selects the slightly slower function-call-based binary compatible osl.
++ * Macros expand to calls to functions defined in linux_osl.c .
++ */
++#ifndef BINOSL
 +
-+#ifndef _epivers_h_
-+#define _epivers_h_
++/* string library, kernel mode */
++#define	printf(fmt, args...)	printk(fmt, ## args)
++#include <linux/kernel.h>
++#include <linux/string.h>
 +
-+#ifdef	linux
-+#include <linux/config.h>
++/* register access macros */
++#if !defined(BCMJTAG)
++#ifndef IL_BIGENDIAN   
++#define R_REG(r) ( \
++	sizeof(*(r)) == sizeof(uint8) ? readb((volatile uint8*)(r)) : \
++	sizeof(*(r)) == sizeof(uint16) ? readw((volatile uint16*)(r)) : \
++	readl((volatile uint32*)(r)) \
++)
++#define W_REG(r, v) do { \
++	switch (sizeof(*(r))) { \
++	case sizeof(uint8):	writeb((uint8)(v), (volatile uint8*)(r)); break; \
++	case sizeof(uint16):	writew((uint16)(v), (volatile uint16*)(r)); break; \
++	case sizeof(uint32):	writel((uint32)(v), (volatile uint32*)(r)); break; \
++	} \
++} while (0)
++#else	/* IL_BIGENDIAN */
++#define R_REG(r) ({ \
++	__typeof(*(r)) __osl_v; \
++	switch (sizeof(*(r))) { \
++	case sizeof(uint8):	__osl_v = readb((volatile uint8*)((uint32)r^3)); break; \
++	case sizeof(uint16):	__osl_v = readw((volatile uint16*)((uint32)r^2)); break; \
++	case sizeof(uint32):	__osl_v = readl((volatile uint32*)(r)); break; \
++	} \
++	__osl_v; \
++})
++#define W_REG(r, v) do { \
++	switch (sizeof(*(r))) { \
++	case sizeof(uint8):	writeb((uint8)(v), (volatile uint8*)((uint32)r^3)); break; \
++	case sizeof(uint16):	writew((uint16)(v), (volatile uint16*)((uint32)r^2)); break; \
++	case sizeof(uint32):	writel((uint32)(v), (volatile uint32*)(r)); break; \
++	} \
++} while (0)
 +#endif
-+
-+/* Vendor Name, ASCII, 32 chars max */
-+#ifdef COMPANYNAME
-+#define	HPNA_VENDOR 		COMPANYNAME
-+#else
-+#define	HPNA_VENDOR 		"Broadcom Corporation"
 +#endif
 +
-+/* Driver Date, ASCII, 32 chars max */
-+#define HPNA_DRV_BUILD_DATE	__DATE__
-+
-+/* Hardware Manufacture Date, ASCII, 32 chars max */
-+#define HPNA_HW_MFG_DATE	"Not Specified"
-+
-+/* See documentation for Device Type values, 32 values max */
-+#ifndef	HPNA_DEV_TYPE
-+
-+#if	defined(CONFIG_BRCM_VJ)
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_DISPLAY }
++#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
++#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
 +
-+#elif	defined(CONFIG_BCRM_93725)
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_CM_BRIDGE, CDCF_V0_DEVICE_DISPLAY }
++/* bcopy, bcmp, and bzero */
++#define	bcopy(src, dst, len)	memcpy((dst), (src), (len))
++#define	bcmp(b1, b2, len)	memcmp((b1), (b2), (len))
++#define	bzero(b, len)		memset((b), '\0', (len))
 +
++/* uncached virtual address */
++#ifdef mips
++#define OSL_UNCACHED(va)	KSEG1ADDR((va))
++#include <asm/addrspace.h>
 +#else
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_PCINIC }
-+
++#define OSL_UNCACHED(va)	(va)
 +#endif
 +
-+#endif	/* !HPNA_DEV_TYPE */
-+
-+
-+#define	EPI_MAJOR_VERSION	3
-+
-+#define	EPI_MINOR_VERSION	130
-+
-+#define	EPI_RC_NUMBER		20
-+
-+#define	EPI_INCREMENTAL_NUMBER	0
-+
-+#define	EPI_BUILD_NUMBER	0
-+
-+#define	EPI_VERSION		3,130,20,0
-+
-+#define	EPI_VERSION_NUM		0x03821400
-+
-+/* Driver Version String, ASCII, 32 chars max */
-+#define	EPI_VERSION_STR		"3.130.20.0"
-+#define	EPI_ROUTER_VERSION_STR	"3.131.20.0"
-+
-+#endif /* _epivers_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/epivers.h.in linux-2.4.32-brcm/arch/mips/bcm947xx/include/epivers.h.in
---- linux-2.4.32/arch/mips/bcm947xx/include/epivers.h.in	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/epivers.h.in	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,69 @@
-+/*
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ *
-+*/
-+
-+#ifndef _epivers_h_
-+#define _epivers_h_
-+
-+#ifdef	linux
-+#include <linux/config.h>
++/* get processor cycle count */
++#if defined(mips)
++#define	OSL_GETCYCLES(x)	((x) = read_c0_count() * 2)
++#elif defined(__i386__)
++#define	OSL_GETCYCLES(x)	rdtscl((x))
++#else
++#define OSL_GETCYCLES(x)	((x) = 0)
 +#endif
 +
-+/* Vendor Name, ASCII, 32 chars max */
-+#ifdef COMPANYNAME
-+#define	HPNA_VENDOR 		COMPANYNAME
++/* dereference an address that may cause a bus exception */
++#ifdef mips
++#if defined(MODULE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17))
++#define BUSPROBE(val, addr)	panic("get_dbe() will not fixup a bus exception when compiled into a module")
 +#else
-+#define	HPNA_VENDOR 		"Broadcom Corporation"
++#define	BUSPROBE(val, addr)	get_dbe((val), (addr))
++#include <asm/paccess.h>
 +#endif
-+
-+/* Driver Date, ASCII, 32 chars max */
-+#define HPNA_DRV_BUILD_DATE	__DATE__
-+
-+/* Hardware Manufacture Date, ASCII, 32 chars max */
-+#define HPNA_HW_MFG_DATE	"Not Specified"
-+
-+/* See documentation for Device Type values, 32 values max */
-+#ifndef	HPNA_DEV_TYPE
-+
-+#if	defined(CONFIG_BRCM_VJ)
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_DISPLAY }
-+
-+#elif	defined(CONFIG_BCRM_93725)
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_CM_BRIDGE, CDCF_V0_DEVICE_DISPLAY }
-+
 +#else
-+#define HPNA_DEV_TYPE		{ CDCF_V0_DEVICE_PCINIC }
-+
++#define	BUSPROBE(val, addr)	({ (val) = R_REG((addr)); 0; })
 +#endif
 +
-+#endif	/* !HPNA_DEV_TYPE */
-+
-+
-+#define	EPI_MAJOR_VERSION	@EPI_MAJOR_VERSION@
-+
-+#define	EPI_MINOR_VERSION	@EPI_MINOR_VERSION@
-+
-+#define	EPI_RC_NUMBER		@EPI_RC_NUMBER@
++/* map/unmap physical to virtual I/O */
++#define	REG_MAP(pa, size)	ioremap_nocache((unsigned long)(pa), (unsigned long)(size))
++#define	REG_UNMAP(va)		iounmap((void *)(va))
 +
-+#define	EPI_INCREMENTAL_NUMBER	@EPI_INCREMENTAL_NUMBER@
++/* shared (dma-able) memory access macros */
++#define	R_SM(r)			*(r)
++#define	W_SM(r, v)		(*(r) = (v))
++#define	BZERO_SM(r, len)	memset((r), '\0', (len))
 +
-+#define	EPI_BUILD_NUMBER	@EPI_BUILD_NUMBER@
++/* packet primitives */
++#define	PKTGET(osh, len, send)		osl_pktget((osh), (len), (send))
++#define	PKTFREE(osh, skb, send)		osl_pktfree((skb))
++#define	PKTDATA(osh, skb)		(((struct sk_buff*)(skb))->data)
++#define	PKTLEN(osh, skb)		(((struct sk_buff*)(skb))->len)
++#define PKTHEADROOM(osh, skb)		(PKTDATA(osh,skb)-(((struct sk_buff*)(skb))->head))
++#define PKTTAILROOM(osh, skb)		((((struct sk_buff*)(skb))->end)-(((struct sk_buff*)(skb))->tail))
++#define	PKTNEXT(osh, skb)		(((struct sk_buff*)(skb))->next)
++#define	PKTSETNEXT(skb, x)		(((struct sk_buff*)(skb))->next = (struct sk_buff*)(x))
++#define	PKTSETLEN(osh, skb, len)	__skb_trim((struct sk_buff*)(skb), (len))
++#define	PKTPUSH(osh, skb, bytes)	skb_push((struct sk_buff*)(skb), (bytes))
++#define	PKTPULL(osh, skb, bytes)	skb_pull((struct sk_buff*)(skb), (bytes))
++#define	PKTDUP(osh, skb)		skb_clone((struct sk_buff*)(skb), GFP_ATOMIC)
++#define	PKTCOOKIE(skb)			((void*)((struct sk_buff*)(skb))->csum)
++#define	PKTSETCOOKIE(skb, x)		(((struct sk_buff*)(skb))->csum = (uint)(x))
++#define	PKTLINK(skb)			(((struct sk_buff*)(skb))->prev)
++#define	PKTSETLINK(skb, x)		(((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x))
++#define	PKTPRIO(skb)			(((struct sk_buff*)(skb))->priority)
++#define	PKTSETPRIO(skb, x)		(((struct sk_buff*)(skb))->priority = (x))
++extern void *osl_pktget(osl_t *osh, uint len, bool send);
++extern void osl_pktfree(void *skb);
 +
-+#define	EPI_VERSION		@EPI_VERSION@
++#else	/* BINOSL */                                    
 +
-+#define	EPI_VERSION_NUM		@EPI_VERSION_NUM@
++/* string library */
++#ifndef LINUX_OSL
++#undef printf
++#define	printf(fmt, args...)		osl_printf((fmt), ## args)
++#undef sprintf
++#define sprintf(buf, fmt, args...)	osl_sprintf((buf), (fmt), ## args)
++#undef strcmp
++#define	strcmp(s1, s2)			osl_strcmp((s1), (s2))
++#undef strncmp
++#define	strncmp(s1, s2, n)		osl_strncmp((s1), (s2), (n))
++#undef strlen
++#define strlen(s)			osl_strlen((s))
++#undef strcpy
++#define	strcpy(d, s)			osl_strcpy((d), (s))
++#undef strncpy
++#define	strncpy(d, s, n)		osl_strncpy((d), (s), (n))
++#endif
++extern int osl_printf(const char *format, ...);
++extern int osl_sprintf(char *buf, const char *format, ...);
++extern int osl_strcmp(const char *s1, const char *s2);
++extern int osl_strncmp(const char *s1, const char *s2, uint n);
++extern int osl_strlen(const char *s);
++extern char* osl_strcpy(char *d, const char *s);
++extern char* osl_strncpy(char *d, const char *s, uint n);
 +
-+/* Driver Version String, ASCII, 32 chars max */
-+#define	EPI_VERSION_STR		"@EPI_VERSION_STR@"
-+#define	EPI_ROUTER_VERSION_STR	"@EPI_ROUTER_VERSION_STR@"
++/* register access macros */
++#if !defined(BCMJTAG)
++#define R_REG(r) ( \
++	sizeof(*(r)) == sizeof(uint8) ? osl_readb((volatile uint8*)(r)) : \
++	sizeof(*(r)) == sizeof(uint16) ? osl_readw((volatile uint16*)(r)) : \
++	osl_readl((volatile uint32*)(r)) \
++)
++#define W_REG(r, v) do { \
++	switch (sizeof(*(r))) { \
++	case sizeof(uint8):	osl_writeb((uint8)(v), (volatile uint8*)(r)); break; \
++	case sizeof(uint16):	osl_writew((uint16)(v), (volatile uint16*)(r)); break; \
++	case sizeof(uint32):	osl_writel((uint32)(v), (volatile uint32*)(r)); break; \
++	} \
++} while (0)
++#endif
 +
-+#endif /* _epivers_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/etsockio.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/etsockio.h
---- linux-2.4.32/arch/mips/bcm947xx/include/etsockio.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/etsockio.h	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,59 @@
-+/*
-+ * Driver-specific socket ioctls
-+ * used by BSD, Linux, and PSOS
-+ * Broadcom BCM44XX 10/100Mbps Ethernet Device Driver
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
++#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
++#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
++extern uint8 osl_readb(volatile uint8 *r);
++extern uint16 osl_readw(volatile uint16 *r);
++extern uint32 osl_readl(volatile uint32 *r);
++extern void osl_writeb(uint8 v, volatile uint8 *r);
++extern void osl_writew(uint16 v, volatile uint16 *r);
++extern void osl_writel(uint32 v, volatile uint32 *r);
 +
-+#ifndef _etsockio_h_
-+#define _etsockio_h_
++/* bcopy, bcmp, and bzero */
++extern void bcopy(const void *src, void *dst, int len);
++extern int bcmp(const void *b1, const void *b2, int len);
++extern void bzero(void *b, int len);
 +
-+/* THESE MUST BE CONTIGUOUS AND CONSISTENT WITH VALUES IN ETC.H */
++/* uncached virtual address */
++#define OSL_UNCACHED(va)	osl_uncached((va))
++extern void *osl_uncached(void *va);
 +
++/* get processor cycle count */
++#define OSL_GETCYCLES(x)	((x) = osl_getcycles())
++extern uint osl_getcycles(void);
 +
-+#if defined(linux)
-+#define SIOCSETCUP		(SIOCDEVPRIVATE + 0)
-+#define SIOCSETCDOWN		(SIOCDEVPRIVATE + 1)
-+#define SIOCSETCLOOP		(SIOCDEVPRIVATE + 2)
-+#define SIOCGETCDUMP		(SIOCDEVPRIVATE + 3)
-+#define SIOCSETCSETMSGLEVEL	(SIOCDEVPRIVATE + 4)
-+#define SIOCSETCPROMISC		(SIOCDEVPRIVATE + 5)
-+#define SIOCSETCTXDOWN		(SIOCDEVPRIVATE + 6)	/* obsolete */
-+#define SIOCSETCSPEED		(SIOCDEVPRIVATE + 7)
-+#define SIOCTXGEN		(SIOCDEVPRIVATE + 8)
-+#define SIOCGETCPHYRD		(SIOCDEVPRIVATE + 9)
-+#define SIOCSETCPHYWR		(SIOCDEVPRIVATE + 10)
-+#define SIOCSETCQOS		(SIOCDEVPRIVATE + 11)
-+
-+#else	/* !linux */
-+
-+#define SIOCSETCUP		_IOWR('e', 130 + 0, struct ifreq)
-+#define SIOCSETCDOWN		_IOWR('e', 130 + 1, struct ifreq)
-+#define SIOCSETCLOOP		_IOWR('e', 130 + 2, struct ifreq)
-+#define SIOCGETCDUMP		_IOWR('e', 130 + 3, struct ifreq)
-+#define SIOCSETCSETMSGLEVEL	_IOWR('e', 130 + 4, struct ifreq)
-+#define SIOCSETCPROMISC		_IOWR('e', 130 + 5, struct ifreq)
-+#define SIOCSETCTXDOWN		_IOWR('e', 130 + 6, struct ifreq)	/* obsolete */
-+#define SIOCSETCSPEED		_IOWR('e', 130 + 7, struct ifreq)
-+#define SIOCTXGEN		_IOWR('e', 130 + 8, struct ifreq)
++/* dereference an address that may target abort */
++#define	BUSPROBE(val, addr)	osl_busprobe(&(val), (addr))
++extern int osl_busprobe(uint32 *val, uint32 addr);
 +
-+#endif
++/* map/unmap physical to virtual */
++#define	REG_MAP(pa, size)	osl_reg_map((pa), (size))
++#define	REG_UNMAP(va)		osl_reg_unmap((va))
++extern void *osl_reg_map(uint32 pa, uint size);
++extern void osl_reg_unmap(void *va);
 +
-+/* arg to SIOCTXGEN */
-+struct txg {
-+	uint32 num;		/* number of frames to send */
-+	uint32 delay;		/* delay in microseconds between sending each */
-+	uint32 size;		/* size of ether frame to send */
-+	uchar buf[1514];	/* starting ether frame data */
-+};
++/* shared (dma-able) memory access macros */
++#define	R_SM(r)			*(r)
++#define	W_SM(r, v)		(*(r) = (v))
++#define	BZERO_SM(r, len)	bzero((r), (len))
 +
-+#endif
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/flash.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/flash.h
---- linux-2.4.32/arch/mips/bcm947xx/include/flash.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/flash.h	2005-12-16 23:39:10.704821750 +0100
-@@ -0,0 +1,188 @@
++/* packet primitives */
++#define	PKTGET(osh, len, send)		osl_pktget((osh), (len), (send))
++#define	PKTFREE(osh, skb, send)		osl_pktfree((skb))
++#define	PKTDATA(osh, skb)		osl_pktdata((osh), (skb))
++#define	PKTLEN(osh, skb)		osl_pktlen((osh), (skb))
++#define PKTHEADROOM(osh, skb)		osl_pktheadroom((osh), (skb))
++#define PKTTAILROOM(osh, skb)		osl_pkttailroom((osh), (skb))
++#define	PKTNEXT(osh, skb)		osl_pktnext((osh), (skb))
++#define	PKTSETNEXT(skb, x)		osl_pktsetnext((skb), (x))
++#define	PKTSETLEN(osh, skb, len)	osl_pktsetlen((osh), (skb), (len))
++#define	PKTPUSH(osh, skb, bytes)	osl_pktpush((osh), (skb), (bytes))
++#define	PKTPULL(osh, skb, bytes)	osl_pktpull((osh), (skb), (bytes))
++#define	PKTDUP(osh, skb)		osl_pktdup((osh), (skb))
++#define	PKTCOOKIE(skb)			osl_pktcookie((skb))
++#define	PKTSETCOOKIE(skb, x)		osl_pktsetcookie((skb), (x))
++#define	PKTLINK(skb)			osl_pktlink((skb))
++#define	PKTSETLINK(skb, x)		osl_pktsetlink((skb), (x))
++#define	PKTPRIO(skb)			osl_pktprio((skb))
++#define	PKTSETPRIO(skb, x)		osl_pktsetprio((skb), (x))
++extern void *osl_pktget(osl_t *osh, uint len, bool send);
++extern void osl_pktfree(void *skb);
++extern uchar *osl_pktdata(osl_t *osh, void *skb);
++extern uint osl_pktlen(osl_t *osh, void *skb);
++extern uint osl_pktheadroom(osl_t *osh, void *skb);
++extern uint osl_pkttailroom(osl_t *osh, void *skb);
++extern void *osl_pktnext(osl_t *osh, void *skb);
++extern void osl_pktsetnext(void *skb, void *x);
++extern void osl_pktsetlen(osl_t *osh, void *skb, uint len);
++extern uchar *osl_pktpush(osl_t *osh, void *skb, int bytes);
++extern uchar *osl_pktpull(osl_t *osh, void *skb, int bytes);
++extern void *osl_pktdup(osl_t *osh, void *skb);
++extern void *osl_pktcookie(void *skb);
++extern void osl_pktsetcookie(void *skb, void *x);
++extern void *osl_pktlink(void *skb);
++extern void osl_pktsetlink(void *skb, void *x);
++extern uint osl_pktprio(void *skb);
++extern void osl_pktsetprio(void *skb, uint x);
++
++#endif	/* BINOSL */
++
++#define OSL_ERROR(bcmerror)	osl_error(bcmerror)
++extern int osl_error(int bcmerror);
++
++/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
++#define	PKTBUFSZ	2048
++
++#endif	/* _linux_osl_h_ */
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/linuxver.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/linuxver.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/linuxver.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/linuxver.h	2005-12-16 23:39:10.748824500 +0100
+@@ -0,0 +1,411 @@
 +/*
-+ * flash.h: Common definitions for flash access.
++ * Linux-specific abstractions to gain some independence from linux kernel versions.
++ * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences.
 + *
 + * Copyright 2005, Broadcom Corporation
 + * All Rights Reserved.
@@ -2646,2481 +2168,969 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/flash.h linux-2.4.32-brcm/arch
 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
++ *   
 + * $Id$
 + */
 +
-+/* Types of flashes we know about */
-+typedef enum _flash_type {OLD, BSC, SCS, AMD, SST, SFLASH} flash_type_t;
-+
-+/* Commands to write/erase the flases */
-+typedef struct _flash_cmds{
-+	flash_type_t	type;
-+	bool		need_unlock;
-+	uint16		pre_erase;
-+	uint16		erase_block;
-+	uint16		erase_chip;
-+	uint16		write_word;
-+	uint16		write_buf;
-+	uint16		clear_csr;
-+	uint16		read_csr;
-+	uint16		read_id;
-+	uint16		confirm;
-+	uint16		read_array;
-+} flash_cmds_t;
-+
-+#define	UNLOCK_CMD_WORDS	2
-+
-+typedef struct _unlock_cmd {
-+  uint		addr[UNLOCK_CMD_WORDS];
-+  uint16	cmd[UNLOCK_CMD_WORDS];
-+} unlock_cmd_t;
-+
-+/* Flash descriptors */
-+typedef struct _flash_desc {
-+	uint16		mfgid;		/* Manufacturer Id */
-+	uint16		devid;		/* Device Id */
-+	uint		size;		/* Total size in bytes */
-+	uint		width;		/* Device width in bytes */
-+	flash_type_t	type;		/* Device type old, S, J */
-+	uint		bsize;		/* Block size */
-+	uint		nb;		/* Number of blocks */
-+	uint		ff;		/* First full block */
-+	uint		lf;		/* Last full block */
-+	uint		nsub;		/* Number of subblocks */
-+	uint		*subblocks;	/* Offsets for subblocks */
-+	char		*desc;		/* Description */
-+} flash_desc_t;
-+
-+
-+#ifdef	DECLARE_FLASHES
-+flash_cmds_t sflash_cmd_t = 
-+	{ SFLASH,	0,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00,	0x00 };
-+
-+flash_cmds_t flash_cmds[] = {
-+/*	  type		needu	preera	eraseb	erasech	write	wbuf	clcsr	rdcsr	rdid	confrm	read */
-+	{ BSC,		0,	0x00,	0x20,	0x00,	0x40,	0x00,	0x50,	0x70,	0x90,	0xd0,	0xff },
-+	{ SCS,		0,	0x00,	0x20,	0x00,	0x40,	0xe8,	0x50,	0x70,	0x90,	0xd0,	0xff },
-+	{ AMD,		1,	0x80,	0x30,	0x10,	0xa0,	0x00,	0x00,	0x00,	0x90,	0x00,	0xf0 },
-+	{ SST,		1,	0x80,	0x50,	0x10,	0xa0,	0x00,	0x00,	0x00,	0x90,	0x00,	0xf0 },
-+	{ 0 }
-+};
++#ifndef _linuxver_h_
++#define _linuxver_h_
 +
-+unlock_cmd_t unlock_cmd_amd = {
-+#ifdef MIPSEB
-+/* addr: */	{ 0x0aa8,	0x0556},
-+#else
-+/* addr: */	{ 0x0aaa,	0x0554},
-+#endif
-+/* data: */	{ 0xaa,		0x55}
-+};
++#include <linux/config.h>
++#include <linux/version.h>
 +
-+unlock_cmd_t unlock_cmd_sst = {
-+#ifdef MIPSEB
-+/* addr: */	{ 0xaaa8,	0x5556},
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0))
++/* __NO_VERSION__ must be defined for all linkables except one in 2.2 */
++#ifdef __UNDEF_NO_VERSION__
++#undef __NO_VERSION__
 +#else
-+/* addr: */	{ 0xaaaa,	0x5554},
++#define __NO_VERSION__
++#endif
 +#endif
-+/* data: */	{ 0xaa,		0x55}
-+};
-+
-+#define AMD_CMD 0xaaa
-+#define SST_CMD 0xaaaa
 +
-+/* intel unlock block cmds */
-+#define INTEL_UNLOCK1	0x60
-+#define INTEL_UNLOCK2	0xD0
++#if defined(MODULE) && defined(MODVERSIONS)
++#include <linux/modversions.h>
++#endif
 +
-+/* Just eight blocks of 8KB byte each */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
++#include <linux/moduleparam.h>
++#endif
 +
-+uint blk8x8k[] = { 0x00000000,
-+		   0x00002000,
-+		   0x00004000,
-+		   0x00006000,
-+		   0x00008000,
-+		   0x0000a000,
-+		   0x0000c000,
-+		   0x0000e000,
-+		   0x00010000
-+};
 +
-+/* Funky AMD arrangement for 29xx800's */
-+uint amd800[] = { 0x00000000,		/* 16KB */
-+		  0x00004000,		/* 32KB */
-+		  0x0000c000,		/* 8KB */
-+		  0x0000e000,		/* 8KB */
-+		  0x00010000,		/* 8KB */
-+		  0x00012000,		/* 8KB */
-+		  0x00014000,		/* 32KB */
-+		  0x0001c000,		/* 16KB */
-+		  0x00020000
-+};
++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 
++#define module_param(_name_, _type_, _perm_)	MODULE_PARM(_name_, "i")	
++#define module_param_string(_name_, _string_, _size_, _perm_)	MODULE_PARM(_string_, "c" __MODULE_STRING(_size_))
++#endif
 +
-+/* AMD arrangement for 29xx160's */
-+uint amd4112[] = { 0x00000000,		/* 32KB */
-+		   0x00008000,		/* 8KB */
-+		   0x0000a000,		/* 8KB */
-+		   0x0000c000,		/* 16KB */
-+		   0x00010000
-+};
-+uint amd2114[] = { 0x00000000,		/* 16KB */
-+		   0x00004000,		/* 8KB */
-+		   0x00006000,		/* 8KB */
-+		   0x00008000,		/* 32KB */
-+		   0x00010000
-+};
++/* linux/malloc.h is deprecated, use linux/slab.h instead. */
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,9))
++#include <linux/malloc.h>
++#else
++#include <linux/slab.h>
++#endif
 +
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/string.h>
++#include <linux/pci.h>
++#include <linux/interrupt.h>
++#include <linux/netdevice.h>
++#include <asm/io.h>
 +
-+flash_desc_t sflash_desc =  
-+	{ 0, 0, 0, 0,	SFLASH, 0, 0,  0, 0,  0, NULL,    "SFLASH" };
-+
-+flash_desc_t flashes[] = {
-+	{ 0x00b0, 0x00d0, 0x0200000, 2,	SCS, 0x10000, 32,  0, 31,  0, NULL,    "Intel 28F160S3/5 1Mx16" },
-+	{ 0x00b0, 0x00d4, 0x0400000, 2,	SCS, 0x10000, 64,  0, 63,  0, NULL,    "Intel 28F320S3/5 2Mx16" },
-+	{ 0x0089, 0x8890, 0x0200000, 2,	BSC, 0x10000, 32,  0, 30,  8, blk8x8k, "Intel 28F160B3 1Mx16 TopB" },
-+	{ 0x0089, 0x8891, 0x0200000, 2,	BSC, 0x10000, 32,  1, 31,  8, blk8x8k, "Intel 28F160B3 1Mx16 BotB" },
-+	{ 0x0089, 0x8896, 0x0400000, 2,	BSC, 0x10000, 64,  0, 62,  8, blk8x8k, "Intel 28F320B3 2Mx16 TopB" },
-+	{ 0x0089, 0x8897, 0x0400000, 2,	BSC, 0x10000, 64,  1, 63,  8, blk8x8k, "Intel 28F320B3 2Mx16 BotB" },
-+	{ 0x0089, 0x8898, 0x0800000, 2,	BSC, 0x10000, 128, 0, 126, 8, blk8x8k, "Intel 28F640B3 4Mx16 TopB" },
-+	{ 0x0089, 0x8899, 0x0800000, 2,	BSC, 0x10000, 128, 1, 127, 8, blk8x8k, "Intel 28F640B3 4Mx16 BotB" },
-+	{ 0x0089, 0x88C2, 0x0200000, 2,	BSC, 0x10000, 32,  0, 30,  8, blk8x8k, "Intel 28F160C3 1Mx16 TopB" },
-+	{ 0x0089, 0x88C3, 0x0200000, 2,	BSC, 0x10000, 32,  1, 31,  8, blk8x8k, "Intel 28F160C3 1Mx16 BotB" },
-+	{ 0x0089, 0x88C4, 0x0400000, 2,	BSC, 0x10000, 64,  0, 62,  8, blk8x8k, "Intel 28F320C3 2Mx16 TopB" },
-+	{ 0x0089, 0x88C5, 0x0400000, 2,	BSC, 0x10000, 64,  1, 63,  8, blk8x8k, "Intel 28F320C3 2Mx16 BotB" },
-+	{ 0x0089, 0x88CC, 0x0800000, 2,	BSC, 0x10000, 128, 0, 126, 8, blk8x8k, "Intel 28F640C3 4Mx16 TopB" },
-+	{ 0x0089, 0x88CD, 0x0800000, 2,	BSC, 0x10000, 128, 1, 127, 8, blk8x8k, "Intel 28F640C3 4Mx16 BotB" },
-+	{ 0x0089, 0x0014, 0x0400000, 2,	SCS, 0x20000, 32,  0, 31,  0, NULL,    "Intel 28F320J5 2Mx16" },
-+	{ 0x0089, 0x0015, 0x0800000, 2,	SCS, 0x20000, 64,  0, 63,  0, NULL,    "Intel 28F640J5 4Mx16" },
-+	{ 0x0089, 0x0016, 0x0400000, 2,	SCS, 0x20000, 32,  0, 31,  0, NULL,    "Intel 28F320J3 2Mx16" },
-+	{ 0x0089, 0x0017, 0x0800000, 2,	SCS, 0x20000, 64,  0, 63,  0, NULL,    "Intel 28F640J3 4Mx16" },
-+	{ 0x0089, 0x0018, 0x1000000, 2,	SCS, 0x20000, 128, 0, 127, 0, NULL,    "Intel 28F128J3 8Mx16" },
-+	{ 0x00b0, 0x00e3, 0x0400000, 2,	BSC, 0x10000, 64,  1, 63,  8, blk8x8k, "Sharp 28F320BJE 2Mx16 BotB" },
-+	{ 0x0001, 0x224a, 0x0100000, 2,	AMD, 0x10000, 16,  0, 13,  8, amd800,  "AMD 29DL800BT 512Kx16 TopB" },
-+	{ 0x0001, 0x22cb, 0x0100000, 2,	AMD, 0x10000, 16,  2, 15,  8, amd800,  "AMD 29DL800BB 512Kx16 BotB" },
-+	{ 0x0001, 0x22c4, 0x0200000, 2,	AMD, 0x10000, 32,  0, 30,  4, amd2114, "AMD 29lv160DT 1Mx16 TopB" },
-+	{ 0x0001, 0x2249, 0x0200000, 2,	AMD, 0x10000, 32,  1, 31,  4, amd4112, "AMD 29lv160DB 1Mx16 BotB" },
-+	{ 0x0001, 0x22f6, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  8, blk8x8k, "AMD 29lv320DT 2Mx16 TopB" },
-+	{ 0x0001, 0x22f9, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  8, blk8x8k, "AMD 29lv320DB 2Mx16 BotB" },
-+	{ 0x0001, 0x227e, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  8, blk8x8k, "AMD 29lv320MT 2Mx16 TopB" },
-+	{ 0x0001, 0x2200, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  8, blk8x8k, "AMD 29lv320MB 2Mx16 BotB" },
-+	{ 0x0020, 0x22CA, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  4, amd4112, "ST 29w320DT 2Mx16 TopB" },
-+	{ 0x0020, 0x22CB, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  4, amd2114, "ST 29w320DB 2Mx16 BotB" },
-+	{ 0x00C2, 0x00A7, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  4, amd4112, "MX29LV320T 2Mx16 TopB" },
-+	{ 0x00C2, 0x00A8, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  4, amd2114, "MX29LV320B 2Mx16 BotB" },
-+	{ 0x0004, 0x22F6, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  4, amd4112, "MBM29LV320TE 2Mx16 TopB" },
-+	{ 0x0004, 0x22F9, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  4, amd2114, "MBM29LV320BE 2Mx16 BotB" },
-+	{ 0x0098, 0x009A, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  4, amd4112, "TC58FVT321 2Mx16 TopB" },
-+	{ 0x0098, 0x009C, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  4, amd2114, "TC58FVB321 2Mx16 BotB" }, 
-+	{ 0x00C2, 0x22A7, 0x0400000, 2,	AMD, 0x10000, 64,  0, 62,  4, amd4112, "MX29LV320T 2Mx16 TopB" },
-+	{ 0x00C2, 0x22A8, 0x0400000, 2,	AMD, 0x10000, 64,  1, 63,  4, amd2114, "MX29LV320B 2Mx16 BotB" },
-+	{ 0x00BF, 0x2783, 0x0400000, 2,	SST, 0x10000, 64,  0, 63,  0, NULL,    "SST39VF320 2Mx16" },
-+	{ 0,      0,      0,         0,	OLD, 0,       0,   0, 0,   0, NULL,    NULL },
-+};
++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41))
++#include <linux/workqueue.h>
++#else
++#include <linux/tqueue.h>
++#ifndef work_struct
++#define work_struct tq_struct
++#endif
++#ifndef INIT_WORK
++#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data))
++#endif
++#ifndef schedule_work
++#define schedule_work(_work) schedule_task((_work))
++#endif
++#ifndef flush_scheduled_work
++#define flush_scheduled_work() flush_scheduled_tasks()
++#endif
++#endif
 +
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
++/* Some distributions have their own 2.6.x compatibility layers */
++#ifndef IRQ_NONE
++typedef void irqreturn_t;
++#define IRQ_NONE
++#define IRQ_HANDLED
++#define IRQ_RETVAL(x)
++#endif
 +#else
++typedef irqreturn_t (*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs);
++#endif
 +
-+extern flash_cmds_t flash_cmds[];
-+extern unlock_cmd_t unlock_cmd;
-+extern flash_desc_t flashes[];
++#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
 +
-+#endif
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/flashutl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/flashutl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/flashutl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/flashutl.h	2005-12-16 23:39:10.708822000 +0100
-@@ -0,0 +1,27 @@
-+/*
-+ * BCM47XX FLASH driver interface
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ * $Id$
-+ */
++#include <pcmcia/version.h>
++#include <pcmcia/cs_types.h>
++#include <pcmcia/cs.h>
++#include <pcmcia/cistpl.h>
++#include <pcmcia/cisreg.h>
++#include <pcmcia/ds.h>
 +
-+#ifndef _flashutl_h_
-+#define _flashutl_h_
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,69))
++/* In 2.5 (as of 2.5.69 at least) there is a cs_error exported which
++ * does this, but it's not in 2.4 so we do our own for now. */
++static inline void
++cs_error(client_handle_t handle, int func, int ret)
++{
++	error_info_t err = { func, ret };
++	CardServices(ReportError, handle, &err);
++}
++#endif
 +
++#endif /* CONFIG_PCMCIA */
 +
-+#ifndef _LANGUAGE_ASSEMBLY
++#ifndef __exit
++#define __exit
++#endif
++#ifndef __devexit
++#define __devexit
++#endif
++#ifndef __devinit
++#define __devinit	__init
++#endif
++#ifndef __devinitdata
++#define __devinitdata
++#endif
++#ifndef __devexit_p
++#define __devexit_p(x)	x
++#endif
 +
-+int	sysFlashInit(char *flash_str);
-+int sysFlashRead(uint off, uchar *dst, uint bytes);
-+int sysFlashWrite(uint off, uchar *src, uint bytes);
-+void nvWrite(unsigned short *data, unsigned int len);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0))
 +
-+#endif	/* _LANGUAGE_ASSEMBLY */
++#define pci_get_drvdata(dev)		(dev)->sysdata
++#define pci_set_drvdata(dev, value)	(dev)->sysdata=(value)
 +
-+#endif /* _flashutl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/hnddma.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/hnddma.h
---- linux-2.4.32/arch/mips/bcm947xx/include/hnddma.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/hnddma.h	2005-12-16 23:39:10.708822000 +0100
-@@ -0,0 +1,71 @@
 +/*
-+ * Generic Broadcom Home Networking Division (HND) DMA engine SW interface
-+ * This supports the following chips: BCM42xx, 44xx, 47xx .
-+ *
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.      
-+ *       
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ * $Id$
++ * New-style (2.4.x) PCI/hot-pluggable PCI/CardBus registration
 + */
 +
-+#ifndef	_hnddma_h_
-+#define	_hnddma_h_
-+
-+/* export structure */
-+typedef volatile struct {
-+	/* rx error counters */
-+	uint		rxgiants;	/* rx giant frames */
-+	uint		rxnobuf;	/* rx out of dma descriptors */
-+	/* tx error counters */
-+	uint		txnobuf;	/* tx out of dma descriptors */
-+} hnddma_t;
++struct pci_device_id {
++	unsigned int vendor, device;		/* Vendor and device ID or PCI_ANY_ID */
++	unsigned int subvendor, subdevice;	/* Subsystem ID's or PCI_ANY_ID */
++	unsigned int class, class_mask;		/* (class,subclass,prog-if) triplet */
++	unsigned long driver_data;		/* Data private to the driver */
++};
 +
-+#ifndef di_t
-+#define	di_t	void
++struct pci_driver {
++	struct list_head node;
++	char *name;
++	const struct pci_device_id *id_table;	/* NULL if wants all devices */
++	int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);	/* New device inserted */
++	void (*remove)(struct pci_dev *dev);	/* Device removed (NULL if not a hot-plug capable driver) */
++	void (*suspend)(struct pci_dev *dev);	/* Device suspended */
++	void (*resume)(struct pci_dev *dev);	/* Device woken up */
++};
++
++#define MODULE_DEVICE_TABLE(type, name)
++#define PCI_ANY_ID (~0)
++
++/* compatpci.c */
++#define pci_module_init pci_register_driver
++extern int pci_register_driver(struct pci_driver *drv);
++extern void pci_unregister_driver(struct pci_driver *drv);
++
++#endif /* PCI registration */
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,2,18))
++#ifdef MODULE
++#define module_init(x) int init_module(void) { return x(); }
++#define module_exit(x) void cleanup_module(void) { x(); }
++#else
++#define module_init(x)	__initcall(x);
++#define module_exit(x)	__exitcall(x);
++#endif
 +#endif
 +
-+#ifndef osl_t 
-+#define osl_t void
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,48))
++#define list_for_each(pos, head) \
++	for (pos = (head)->next; pos != (head); pos = pos->next)
 +#endif
 +
-+/* externs */
-+extern void * dma_attach(osl_t *osh, char *name, sb_t *sbh, void *dmaregstx, void *dmaregsrx, 
-+			 uint ntxd, uint nrxd, uint rxbufsize, uint nrxpost, uint rxoffset, uint *msg_level);
-+extern void dma_detach(di_t *di);
-+extern void dma_txreset(di_t *di);
-+extern void dma_rxreset(di_t *di);
-+extern void dma_txinit(di_t *di);
-+extern bool dma_txenabled(di_t *di);
-+extern void dma_rxinit(di_t *di);
-+extern void dma_rxenable(di_t *di);
-+extern bool dma_rxenabled(di_t *di);
-+extern void dma_txsuspend(di_t *di);
-+extern void dma_txresume(di_t *di);
-+extern bool dma_txsuspended(di_t *di);
-+extern bool dma_txsuspendedidle(di_t *di);
-+extern bool dma_txstopped(di_t *di);
-+extern bool dma_rxstopped(di_t *di);
-+extern int dma_txfast(di_t *di, void *p, uint32 coreflags);
-+extern void dma_fifoloopbackenable(di_t *di);
-+extern void *dma_rx(di_t *di);
-+extern void dma_rxfill(di_t *di);
-+extern void dma_txreclaim(di_t *di, bool forceall);
-+extern void dma_rxreclaim(di_t *di);
-+extern uintptr dma_getvar(di_t *di, char *name);
-+extern void *dma_getnexttxp(di_t *di, bool forceall);
-+extern void *dma_peeknexttxp(di_t *di);
-+extern void *dma_getnextrxp(di_t *di, bool forceall);
-+extern void dma_txblock(di_t *di);
-+extern void dma_txunblock(di_t *di);
-+extern uint dma_txactive(di_t *di);
-+extern void dma_txrotate(di_t *di);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13))
++#define pci_resource_start(dev, bar)	((dev)->base_address[(bar)])
++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,44))
++#define pci_resource_start(dev, bar)	((dev)->resource[(bar)].start)
++#endif
 +
-+extern void dma_rxpiomode(dma32regs_t *);
-+extern void dma_txpioloopback(dma32regs_t *);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,23))
++#define pci_enable_device(dev) do { } while (0)
++#endif
 +
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,14))
++#define net_device device
++#endif
 +
-+#endif	/* _hnddma_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/hndmips.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/hndmips.h
---- linux-2.4.32/arch/mips/bcm947xx/include/hndmips.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/hndmips.h	2005-12-16 23:39:10.708822000 +0100
-@@ -0,0 +1,16 @@
-+/*
-+ * Alternate include file for HND sbmips.h since CFE also ships with
-+ * a sbmips.h.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,42))
 +
-+#include "sbmips.h"
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/linux_osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/linux_osl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/linux_osl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/linux_osl.h	2005-12-16 23:39:10.708822000 +0100
-@@ -0,0 +1,371 @@
 +/*
-+ * Linux OS Independent Layer
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
++ * DMA mapping
 + *
-+ * $Id$
++ * See linux/Documentation/DMA-mapping.txt
 + */
 +
-+#ifndef _linux_osl_h_
-+#define _linux_osl_h_
++#ifndef PCI_DMA_TODEVICE
++#define	PCI_DMA_TODEVICE	1
++#define	PCI_DMA_FROMDEVICE	2
++#endif
 +
-+#include <typedefs.h>
++typedef u32 dma_addr_t;
 +
-+/* use current 2.4.x calling conventions */
-+#include <linuxver.h>
++/* Pure 2^n version of get_order */
++static inline int get_order(unsigned long size)
++{
++	int order;
 +
-+/* assert and panic */
-+#ifdef __GNUC__
-+#define GCC_VERSION (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
-+#if GCC_VERSION > 30100
-+#define	ASSERT(exp)		do {} while (0)
-+#else
-+/* ASSERT could causes segmentation fault on GCC3.1, use empty instead*/
-+#define	ASSERT(exp)		
-+#endif
-+#endif
++	size = (size-1) >> (PAGE_SHIFT-1);
++	order = -1;
++	do {
++		size >>= 1;
++		order++;
++	} while (size);
++	return order;
++}
 +
-+/* microsecond delay */
-+#define	OSL_DELAY(usec)		osl_delay(usec)
-+extern void osl_delay(uint usec);
++static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
++					 dma_addr_t *dma_handle)
++{
++	void *ret;
++	int gfp = GFP_ATOMIC | GFP_DMA;
 +
-+/* PCMCIA attribute space access macros */
-+#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
-+struct pcmcia_dev {
-+	dev_link_t link;	/* PCMCIA device pointer */
-+	dev_node_t node;	/* PCMCIA node structure */
-+	void *base;		/* Mapped attribute memory window */
-+	size_t size;		/* Size of window */
-+	void *drv;		/* Driver data */
-+};
-+#endif
-+#define	OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
-+	osl_pcmcia_read_attr((osh), (offset), (buf), (size))
-+#define	OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
-+	osl_pcmcia_write_attr((osh), (offset), (buf), (size))
-+extern void osl_pcmcia_read_attr(osl_t *osh, uint offset, void *buf, int size);
-+extern void osl_pcmcia_write_attr(osl_t *osh, uint offset, void *buf, int size);
++	ret = (void *)__get_free_pages(gfp, get_order(size));
 +
-+/* PCI configuration space access macros */
-+#define	OSL_PCI_READ_CONFIG(osh, offset, size) \
-+	osl_pci_read_config((osh), (offset), (size))
-+#define	OSL_PCI_WRITE_CONFIG(osh, offset, size, val) \
-+	osl_pci_write_config((osh), (offset), (size), (val))
-+extern uint32 osl_pci_read_config(osl_t *osh, uint size, uint offset);
-+extern void osl_pci_write_config(osl_t *osh, uint offset, uint size, uint val);
++	if (ret != NULL) {
++		memset(ret, 0, size);
++		*dma_handle = virt_to_bus(ret);
++	}
++	return ret;
++}
++static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size,
++				       void *vaddr, dma_addr_t dma_handle)
++{
++	free_pages((unsigned long)vaddr, get_order(size));
++}
++#ifdef ILSIM
++extern uint pci_map_single(void *dev, void *va, uint size, int direction);
++extern void pci_unmap_single(void *dev, uint pa, uint size, int direction);
++#else
++#define pci_map_single(cookie, address, size, dir)	virt_to_bus(address)
++#define pci_unmap_single(cookie, address, size, dir)
++#endif
 +
-+/* PCI device bus # and slot # */
-+#define OSL_PCI_BUS(osh)	osl_pci_bus(osh)
-+#define OSL_PCI_SLOT(osh)	osl_pci_slot(osh)
-+extern uint osl_pci_bus(osl_t *osh);
-+extern uint osl_pci_slot(osl_t *osh);
++#endif /* DMA mapping */
 +
-+/* OSL initialization */
-+extern osl_t *osl_attach(void *pdev);
-+extern void osl_detach(osl_t *osh);
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,43))
 +
-+/* host/bus architecture-specific byte swap */
-+#define BUS_SWAP32(v)		(v)
++#define dev_kfree_skb_any(a)		dev_kfree_skb(a)
++#define netif_down(dev)			do { (dev)->start = 0; } while(0)
 +
-+/* general purpose memory allocation */
++/* pcmcia-cs provides its own netdevice compatibility layer */
++#ifndef _COMPAT_NETDEVICE_H
 +
-+#if defined(BCMDBG_MEM)
++/*
++ * SoftNet
++ *
++ * For pre-softnet kernels we need to tell the upper layer not to
++ * re-enter start_xmit() while we are in there. However softnet
++ * guarantees not to enter while we are in there so there is no need
++ * to do the netif_stop_queue() dance unless the transmit queue really
++ * gets stuck. This should also improve performance according to tests
++ * done by Aman Singla.
++ */
 +
-+#define	MALLOC(osh, size)	osl_debug_malloc((osh), (size), __LINE__, __FILE__)
-+#define	MFREE(osh, addr, size)	osl_debug_mfree((osh), (addr), (size), __LINE__, __FILE__)
-+#define MALLOCED(osh)		osl_malloced((osh))
-+#define	MALLOC_DUMP(osh, buf, sz) osl_debug_memdump((osh), (buf), (sz))
-+extern void *osl_debug_malloc(osl_t *osh, uint size, int line, char* file);
-+extern void osl_debug_mfree(osl_t *osh, void *addr, uint size, int line, char* file);
-+extern char *osl_debug_memdump(osl_t *osh, char *buf, uint sz);
++#define dev_kfree_skb_irq(a)		dev_kfree_skb(a)
++#define netif_wake_queue(dev)		do { clear_bit(0, &(dev)->tbusy); mark_bh(NET_BH); } while(0)
++#define netif_stop_queue(dev)		set_bit(0, &(dev)->tbusy)
 +
-+#else
++static inline void netif_start_queue(struct net_device *dev)
++{
++	dev->tbusy = 0;
++	dev->interrupt = 0;
++	dev->start = 1;
++}
 +
-+#define	MALLOC(osh, size)	osl_malloc((osh), (size))
-+#define	MFREE(osh, addr, size)	osl_mfree((osh), (addr), (size))
-+#define MALLOCED(osh)		osl_malloced((osh))
++#define netif_queue_stopped(dev)	(dev)->tbusy
++#define netif_running(dev)		(dev)->start
 +
-+#endif	/* BCMDBG_MEM */
++#endif /* _COMPAT_NETDEVICE_H */
 +
-+#define	MALLOC_FAILED(osh)	osl_malloc_failed((osh))
++#define netif_device_attach(dev)	netif_start_queue(dev)
++#define netif_device_detach(dev)	netif_stop_queue(dev)
 +
-+extern void *osl_malloc(osl_t *osh, uint size);
-+extern void osl_mfree(osl_t *osh, void *addr, uint size);
-+extern uint osl_malloced(osl_t *osh);
-+extern uint osl_malloc_failed(osl_t *osh);
++/* 2.4.x renamed bottom halves to tasklets */
++#define tasklet_struct				tq_struct
++static inline void tasklet_schedule(struct tasklet_struct *tasklet)
++{
++	queue_task(tasklet, &tq_immediate);
++	mark_bh(IMMEDIATE_BH);
++}
 +
-+/* allocate/free shared (dma-able) consistent memory */
-+#define	DMA_CONSISTENT_ALIGN	PAGE_SIZE
-+#define	DMA_ALLOC_CONSISTENT(osh, size, pap) \
-+	osl_dma_alloc_consistent((osh), (size), (pap))
-+#define	DMA_FREE_CONSISTENT(osh, va, size, pa) \
-+	osl_dma_free_consistent((osh), (void*)(va), (size), (pa))
-+extern void *osl_dma_alloc_consistent(osl_t *osh, uint size, ulong *pap);
-+extern void osl_dma_free_consistent(osl_t *osh, void *va, uint size, ulong pa);
++static inline void tasklet_init(struct tasklet_struct *tasklet,
++				void (*func)(unsigned long),
++				unsigned long data)
++{
++	tasklet->next = NULL;
++	tasklet->sync = 0;
++	tasklet->routine = (void (*)(void *))func;
++	tasklet->data = (void *)data;
++}
++#define tasklet_kill(tasklet)			{do{} while(0);}
 +
-+/* map/unmap direction */
-+#define	DMA_TX	1
-+#define	DMA_RX	2
++/* 2.4.x introduced del_timer_sync() */
++#define del_timer_sync(timer) del_timer(timer)
 +
-+/* map/unmap shared (dma-able) memory */
-+#define	DMA_MAP(osh, va, size, direction, p) \
-+	osl_dma_map((osh), (va), (size), (direction))
-+#define	DMA_UNMAP(osh, pa, size, direction, p) \
-+	osl_dma_unmap((osh), (pa), (size), (direction))
-+extern uint osl_dma_map(osl_t *osh, void *va, uint size, int direction);
-+extern void osl_dma_unmap(osl_t *osh, uint pa, uint size, int direction);
++#else
 +
-+/* register access macros */
-+#if defined(BCMJTAG)
-+#include <bcmjtag.h>
-+#define	R_REG(r)	bcmjtag_read(NULL, (uint32)(r), sizeof (*(r)))
-+#define	W_REG(r, v)	bcmjtag_write(NULL, (uint32)(r), (uint32)(v), sizeof (*(r)))
-+#endif
++#define netif_down(dev)
++
++#endif /* SoftNet */
++
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3))
 +
 +/*
-+ * BINOSL selects the slightly slower function-call-based binary compatible osl.
-+ * Macros expand to calls to functions defined in linux_osl.c .
++ * Emit code to initialise a tq_struct's routine and data pointers
 + */
-+#ifndef BINOSL
++#define PREPARE_TQUEUE(_tq, _routine, _data)			\
++	do {							\
++		(_tq)->routine = _routine;			\
++		(_tq)->data = _data;				\
++	} while (0)
 +
-+/* string library, kernel mode */
-+#define	printf(fmt, args...)	printk(fmt, ## args)
-+#include <linux/kernel.h>
-+#include <linux/string.h>
++/*
++ * Emit code to initialise all of a tq_struct
++ */
++#define INIT_TQUEUE(_tq, _routine, _data)			\
++	do {							\
++		INIT_LIST_HEAD(&(_tq)->list);			\
++		(_tq)->sync = 0;				\
++		PREPARE_TQUEUE((_tq), (_routine), (_data));	\
++	} while (0)
 +
-+/* register access macros */
-+#if !defined(BCMJTAG)
-+#ifndef IL_BIGENDIAN   
-+#define R_REG(r) ( \
-+	sizeof(*(r)) == sizeof(uint8) ? readb((volatile uint8*)(r)) : \
-+	sizeof(*(r)) == sizeof(uint16) ? readw((volatile uint16*)(r)) : \
-+	readl((volatile uint32*)(r)) \
-+)
-+#define W_REG(r, v) do { \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	writeb((uint8)(v), (volatile uint8*)(r)); break; \
-+	case sizeof(uint16):	writew((uint16)(v), (volatile uint16*)(r)); break; \
-+	case sizeof(uint32):	writel((uint32)(v), (volatile uint32*)(r)); break; \
-+	} \
-+} while (0)
-+#else	/* IL_BIGENDIAN */
-+#define R_REG(r) ({ \
-+	__typeof(*(r)) __osl_v; \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	__osl_v = readb((volatile uint8*)((uint32)r^3)); break; \
-+	case sizeof(uint16):	__osl_v = readw((volatile uint16*)((uint32)r^2)); break; \
-+	case sizeof(uint32):	__osl_v = readl((volatile uint32*)(r)); break; \
-+	} \
-+	__osl_v; \
-+})
-+#define W_REG(r, v) do { \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	writeb((uint8)(v), (volatile uint8*)((uint32)r^3)); break; \
-+	case sizeof(uint16):	writew((uint16)(v), (volatile uint16*)((uint32)r^2)); break; \
-+	case sizeof(uint32):	writel((uint32)(v), (volatile uint32*)(r)); break; \
-+	} \
-+} while (0)
-+#endif
 +#endif
 +
-+#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
-+#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6))
 +
-+/* bcopy, bcmp, and bzero */
-+#define	bcopy(src, dst, len)	memcpy((dst), (src), (len))
-+#define	bcmp(b1, b2, len)	memcmp((b1), (b2), (len))
-+#define	bzero(b, len)		memset((b), '\0', (len))
++/* Power management related routines */
 +
-+/* uncached virtual address */
-+#ifdef mips
-+#define OSL_UNCACHED(va)	KSEG1ADDR((va))
-+#include <asm/addrspace.h>
-+#else
-+#define OSL_UNCACHED(va)	(va)
++static inline int
++pci_save_state(struct pci_dev *dev, u32 *buffer)
++{
++	int i;
++	if (buffer) {
++		for (i = 0; i < 16; i++)
++			pci_read_config_dword(dev, i * 4,&buffer[i]);
++	}
++	return 0;
++}
++
++static inline int 
++pci_restore_state(struct pci_dev *dev, u32 *buffer)
++{
++	int i;
++
++	if (buffer) {
++		for (i = 0; i < 16; i++)
++			pci_write_config_dword(dev,i * 4, buffer[i]);
++	}
++	/*
++	 * otherwise, write the context information we know from bootup.
++	 * This works around a problem where warm-booting from Windows
++	 * combined with a D3(hot)->D0 transition causes PCI config
++	 * header data to be forgotten.
++	 */	
++	else {
++		for (i = 0; i < 6; i ++)
++			pci_write_config_dword(dev,
++					       PCI_BASE_ADDRESS_0 + (i * 4),
++					       pci_resource_start(dev, i));
++		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
++	}
++	return 0;
++}
++
++#endif /* PCI power management */
++
++/* Old cp0 access macros deprecated in 2.4.19 */
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19))
++#define read_c0_count() read_32bit_cp0_register(CP0_COUNT)
 +#endif
 +
-+/* get processor cycle count */
-+#if defined(mips)
-+#define	OSL_GETCYCLES(x)	((x) = read_c0_count() * 2)
-+#elif defined(__i386__)
-+#define	OSL_GETCYCLES(x)	rdtscl((x))
++/* Module refcount handled internally in 2.6.x */
++#ifndef SET_MODULE_OWNER
++#define SET_MODULE_OWNER(dev)		do {} while (0)
++#define OLD_MOD_INC_USE_COUNT		MOD_INC_USE_COUNT
++#define OLD_MOD_DEC_USE_COUNT		MOD_DEC_USE_COUNT
 +#else
-+#define OSL_GETCYCLES(x)	((x) = 0)
++#define OLD_MOD_INC_USE_COUNT		do {} while (0)
++#define OLD_MOD_DEC_USE_COUNT		do {} while (0)
 +#endif
 +
-+/* dereference an address that may cause a bus exception */
-+#ifdef mips
-+#if defined(MODULE) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,17))
-+#define BUSPROBE(val, addr)	panic("get_dbe() will not fixup a bus exception when compiled into a module")
-+#else
-+#define	BUSPROBE(val, addr)	get_dbe((val), (addr))
-+#include <asm/paccess.h>
++#ifndef SET_NETDEV_DEV
++#define SET_NETDEV_DEV(net, pdev)	do {} while (0)
 +#endif
-+#else
-+#define	BUSPROBE(val, addr)	({ (val) = R_REG((addr)); 0; })
++
++#ifndef HAVE_FREE_NETDEV
++#define free_netdev(dev)		kfree(dev)
 +#endif
 +
-+/* map/unmap physical to virtual I/O */
-+#define	REG_MAP(pa, size)	ioremap_nocache((unsigned long)(pa), (unsigned long)(size))
-+#define	REG_UNMAP(va)		iounmap((void *)(va))
++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
++/* struct packet_type redefined in 2.6.x */
++#define af_packet_priv			data
++#endif
 +
-+/* shared (dma-able) memory access macros */
-+#define	R_SM(r)			*(r)
-+#define	W_SM(r, v)		(*(r) = (v))
-+#define	BZERO_SM(r, len)	memset((r), '\0', (len))
++#endif /* _linuxver_h_ */
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/mipsinc.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/mipsinc.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/mipsinc.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/mipsinc.h	2005-12-16 23:39:10.748824500 +0100
+@@ -0,0 +1,552 @@
++/*
++ * HND Run Time Environment for standalone MIPS programs.
++ *
++ * Copyright 2005, Broadcom Corporation
++ * All Rights Reserved.
++ * 
++ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
++ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
++ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
++ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
++ *
++ * $Id$
++ */
 +
-+/* packet primitives */
-+#define	PKTGET(osh, len, send)		osl_pktget((osh), (len), (send))
-+#define	PKTFREE(osh, skb, send)		osl_pktfree((skb))
-+#define	PKTDATA(osh, skb)		(((struct sk_buff*)(skb))->data)
-+#define	PKTLEN(osh, skb)		(((struct sk_buff*)(skb))->len)
-+#define PKTHEADROOM(osh, skb)		(PKTDATA(osh,skb)-(((struct sk_buff*)(skb))->head))
-+#define PKTTAILROOM(osh, skb)		((((struct sk_buff*)(skb))->end)-(((struct sk_buff*)(skb))->tail))
-+#define	PKTNEXT(osh, skb)		(((struct sk_buff*)(skb))->next)
-+#define	PKTSETNEXT(skb, x)		(((struct sk_buff*)(skb))->next = (struct sk_buff*)(x))
-+#define	PKTSETLEN(osh, skb, len)	__skb_trim((struct sk_buff*)(skb), (len))
-+#define	PKTPUSH(osh, skb, bytes)	skb_push((struct sk_buff*)(skb), (bytes))
-+#define	PKTPULL(osh, skb, bytes)	skb_pull((struct sk_buff*)(skb), (bytes))
-+#define	PKTDUP(osh, skb)		skb_clone((struct sk_buff*)(skb), GFP_ATOMIC)
-+#define	PKTCOOKIE(skb)			((void*)((struct sk_buff*)(skb))->csum)
-+#define	PKTSETCOOKIE(skb, x)		(((struct sk_buff*)(skb))->csum = (uint)(x))
-+#define	PKTLINK(skb)			(((struct sk_buff*)(skb))->prev)
-+#define	PKTSETLINK(skb, x)		(((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x))
-+#define	PKTPRIO(skb)			(((struct sk_buff*)(skb))->priority)
-+#define	PKTSETPRIO(skb, x)		(((struct sk_buff*)(skb))->priority = (x))
-+extern void *osl_pktget(osl_t *osh, uint len, bool send);
-+extern void osl_pktfree(void *skb);
++#ifndef	_MISPINC_H
++#define _MISPINC_H
 +
-+#else	/* BINOSL */                                    
 +
-+/* string library */
-+#ifndef LINUX_OSL
-+#undef printf
-+#define	printf(fmt, args...)		osl_printf((fmt), ## args)
-+#undef sprintf
-+#define sprintf(buf, fmt, args...)	osl_sprintf((buf), (fmt), ## args)
-+#undef strcmp
-+#define	strcmp(s1, s2)			osl_strcmp((s1), (s2))
-+#undef strncmp
-+#define	strncmp(s1, s2, n)		osl_strncmp((s1), (s2), (n))
-+#undef strlen
-+#define strlen(s)			osl_strlen((s))
-+#undef strcpy
-+#define	strcpy(d, s)			osl_strcpy((d), (s))
-+#undef strncpy
-+#define	strncpy(d, s, n)		osl_strncpy((d), (s), (n))
-+#endif
-+extern int osl_printf(const char *format, ...);
-+extern int osl_sprintf(char *buf, const char *format, ...);
-+extern int osl_strcmp(const char *s1, const char *s2);
-+extern int osl_strncmp(const char *s1, const char *s2, uint n);
-+extern int osl_strlen(const char *s);
-+extern char* osl_strcpy(char *d, const char *s);
-+extern char* osl_strncpy(char *d, const char *s, uint n);
-+
-+/* register access macros */
-+#if !defined(BCMJTAG)
-+#define R_REG(r) ( \
-+	sizeof(*(r)) == sizeof(uint8) ? osl_readb((volatile uint8*)(r)) : \
-+	sizeof(*(r)) == sizeof(uint16) ? osl_readw((volatile uint16*)(r)) : \
-+	osl_readl((volatile uint32*)(r)) \
-+)
-+#define W_REG(r, v) do { \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	osl_writeb((uint8)(v), (volatile uint8*)(r)); break; \
-+	case sizeof(uint16):	osl_writew((uint16)(v), (volatile uint16*)(r)); break; \
-+	case sizeof(uint32):	osl_writel((uint32)(v), (volatile uint32*)(r)); break; \
-+	} \
-+} while (0)
-+#endif
-+
-+#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
-+#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
-+extern uint8 osl_readb(volatile uint8 *r);
-+extern uint16 osl_readw(volatile uint16 *r);
-+extern uint32 osl_readl(volatile uint32 *r);
-+extern void osl_writeb(uint8 v, volatile uint8 *r);
-+extern void osl_writew(uint16 v, volatile uint16 *r);
-+extern void osl_writel(uint32 v, volatile uint32 *r);
-+
-+/* bcopy, bcmp, and bzero */
-+extern void bcopy(const void *src, void *dst, int len);
-+extern int bcmp(const void *b1, const void *b2, int len);
-+extern void bzero(void *b, int len);
-+
-+/* uncached virtual address */
-+#define OSL_UNCACHED(va)	osl_uncached((va))
-+extern void *osl_uncached(void *va);
-+
-+/* get processor cycle count */
-+#define OSL_GETCYCLES(x)	((x) = osl_getcycles())
-+extern uint osl_getcycles(void);
-+
-+/* dereference an address that may target abort */
-+#define	BUSPROBE(val, addr)	osl_busprobe(&(val), (addr))
-+extern int osl_busprobe(uint32 *val, uint32 addr);
-+
-+/* map/unmap physical to virtual */
-+#define	REG_MAP(pa, size)	osl_reg_map((pa), (size))
-+#define	REG_UNMAP(va)		osl_reg_unmap((va))
-+extern void *osl_reg_map(uint32 pa, uint size);
-+extern void osl_reg_unmap(void *va);
++/* MIPS defines */
 +
-+/* shared (dma-able) memory access macros */
-+#define	R_SM(r)			*(r)
-+#define	W_SM(r, v)		(*(r) = (v))
-+#define	BZERO_SM(r, len)	bzero((r), (len))
++#ifdef	_LANGUAGE_ASSEMBLY
 +
-+/* packet primitives */
-+#define	PKTGET(osh, len, send)		osl_pktget((osh), (len), (send))
-+#define	PKTFREE(osh, skb, send)		osl_pktfree((skb))
-+#define	PKTDATA(osh, skb)		osl_pktdata((osh), (skb))
-+#define	PKTLEN(osh, skb)		osl_pktlen((osh), (skb))
-+#define PKTHEADROOM(osh, skb)		osl_pktheadroom((osh), (skb))
-+#define PKTTAILROOM(osh, skb)		osl_pkttailroom((osh), (skb))
-+#define	PKTNEXT(osh, skb)		osl_pktnext((osh), (skb))
-+#define	PKTSETNEXT(skb, x)		osl_pktsetnext((skb), (x))
-+#define	PKTSETLEN(osh, skb, len)	osl_pktsetlen((osh), (skb), (len))
-+#define	PKTPUSH(osh, skb, bytes)	osl_pktpush((osh), (skb), (bytes))
-+#define	PKTPULL(osh, skb, bytes)	osl_pktpull((osh), (skb), (bytes))
-+#define	PKTDUP(osh, skb)		osl_pktdup((osh), (skb))
-+#define	PKTCOOKIE(skb)			osl_pktcookie((skb))
-+#define	PKTSETCOOKIE(skb, x)		osl_pktsetcookie((skb), (x))
-+#define	PKTLINK(skb)			osl_pktlink((skb))
-+#define	PKTSETLINK(skb, x)		osl_pktsetlink((skb), (x))
-+#define	PKTPRIO(skb)			osl_pktprio((skb))
-+#define	PKTSETPRIO(skb, x)		osl_pktsetprio((skb), (x))
-+extern void *osl_pktget(osl_t *osh, uint len, bool send);
-+extern void osl_pktfree(void *skb);
-+extern uchar *osl_pktdata(osl_t *osh, void *skb);
-+extern uint osl_pktlen(osl_t *osh, void *skb);
-+extern uint osl_pktheadroom(osl_t *osh, void *skb);
-+extern uint osl_pkttailroom(osl_t *osh, void *skb);
-+extern void *osl_pktnext(osl_t *osh, void *skb);
-+extern void osl_pktsetnext(void *skb, void *x);
-+extern void osl_pktsetlen(osl_t *osh, void *skb, uint len);
-+extern uchar *osl_pktpush(osl_t *osh, void *skb, int bytes);
-+extern uchar *osl_pktpull(osl_t *osh, void *skb, int bytes);
-+extern void *osl_pktdup(osl_t *osh, void *skb);
-+extern void *osl_pktcookie(void *skb);
-+extern void osl_pktsetcookie(void *skb, void *x);
-+extern void *osl_pktlink(void *skb);
-+extern void osl_pktsetlink(void *skb, void *x);
-+extern uint osl_pktprio(void *skb);
-+extern void osl_pktsetprio(void *skb, uint x);
++/*
++ * Symbolic register names for 32 bit ABI
++ */
++#define zero	$0	/* wired zero */
++#define AT	$1	/* assembler temp - uppercase because of ".set at" */
++#define v0	$2	/* return value */
++#define v1	$3
++#define a0	$4	/* argument registers */
++#define a1	$5
++#define a2	$6
++#define a3	$7
++#define t0	$8	/* caller saved */
++#define t1	$9
++#define t2	$10
++#define t3	$11
++#define t4	$12
++#define t5	$13
++#define t6	$14
++#define t7	$15
++#define s0	$16	/* callee saved */
++#define s1	$17
++#define s2	$18
++#define s3	$19
++#define s4	$20
++#define s5	$21
++#define s6	$22
++#define s7	$23
++#define t8	$24	/* caller saved */
++#define t9	$25
++#define jp	$25	/* PIC jump register */
++#define k0	$26	/* kernel scratch */
++#define k1	$27
++#define gp	$28	/* global pointer */
++#define sp	$29	/* stack pointer */
++#define fp	$30	/* frame pointer */
++#define s8	$30	/* same like fp! */
++#define ra	$31	/* return address */
 +
-+#endif	/* BINOSL */
 +
-+#define OSL_ERROR(bcmerror)	osl_error(bcmerror)
-+extern int osl_error(int bcmerror);
++/*
++ * CP0 Registers 
++ */
 +
-+/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
-+#define	PKTBUFSZ	2048
++#define C0_INX		$0
++#define C0_RAND		$1
++#define C0_TLBLO0	$2
++#define C0_TLBLO	C0_TLBLO0
++#define C0_TLBLO1	$3
++#define C0_CTEXT	$4
++#define C0_PGMASK	$5
++#define C0_WIRED	$6
++#define C0_BADVADDR	$8
++#define C0_COUNT 	$9
++#define C0_TLBHI	$10
++#define C0_COMPARE	$11
++#define C0_SR		$12
++#define C0_STATUS	C0_SR
++#define C0_CAUSE	$13
++#define C0_EPC		$14
++#define C0_PRID		$15
++#define C0_CONFIG	$16
++#define C0_LLADDR	$17
++#define C0_WATCHLO	$18
++#define C0_WATCHHI	$19
++#define C0_XCTEXT	$20
++#define C0_DIAGNOSTIC	$22
++#define C0_BROADCOM	C0_DIAGNOSTIC
++#define	C0_PERFORMANCE	$25
++#define C0_ECC		$26
++#define C0_CACHEERR	$27
++#define C0_TAGLO	$28
++#define C0_TAGHI	$29
++#define C0_ERREPC	$30
++#define C0_DESAVE	$31
 +
-+#endif	/* _linux_osl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/linuxver.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/linuxver.h
---- linux-2.4.32/arch/mips/bcm947xx/include/linuxver.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/linuxver.h	2005-12-16 23:39:10.748824500 +0100
-@@ -0,0 +1,411 @@
 +/*
-+ * Linux-specific abstractions to gain some independence from linux kernel versions.
-+ * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *   
-+ * $Id$
++ * LEAF - declare leaf routine
 + */
++#define LEAF(symbol)				\
++		.globl	symbol;			\
++		.align	2;			\
++		.type	symbol,@function;	\
++		.ent	symbol,0;		\
++symbol:		.frame	sp,0,ra
 +
-+#ifndef _linuxver_h_
-+#define _linuxver_h_
++/*
++ * END - mark end of function
++ */
++#define END(function)				\
++		.end	function;		\
++		.size	function,.-function
 +
-+#include <linux/config.h>
-+#include <linux/version.h>
++#define _ULCAST_
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0))
-+/* __NO_VERSION__ must be defined for all linkables except one in 2.2 */
-+#ifdef __UNDEF_NO_VERSION__
-+#undef __NO_VERSION__
 +#else
-+#define __NO_VERSION__
-+#endif
-+#endif
 +
-+#if defined(MODULE) && defined(MODVERSIONS)
-+#include <linux/modversions.h>
++/*
++ * The following macros are especially useful for __asm__
++ * inline assembler.
++ */
++#ifndef __STR
++#define __STR(x) #x
 +#endif
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
-+#include <linux/moduleparam.h>
++#ifndef STR
++#define STR(x) __STR(x)
 +#endif
 +
++#define _ULCAST_ (unsigned long)
 +
-+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 
-+#define module_param(_name_, _type_, _perm_)	MODULE_PARM(_name_, "i")	
-+#define module_param_string(_name_, _string_, _size_, _perm_)	MODULE_PARM(_string_, "c" __MODULE_STRING(_size_))
-+#endif
-+
-+/* linux/malloc.h is deprecated, use linux/slab.h instead. */
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,9))
-+#include <linux/malloc.h>
-+#else
-+#include <linux/slab.h>
-+#endif
 +
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/string.h>
-+#include <linux/pci.h>
-+#include <linux/interrupt.h>
-+#include <linux/netdevice.h>
-+#include <asm/io.h>
++/*
++ * CP0 Registers 
++ */
 +
-+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,41))
-+#include <linux/workqueue.h>
-+#else
-+#include <linux/tqueue.h>
-+#ifndef work_struct
-+#define work_struct tq_struct
-+#endif
-+#ifndef INIT_WORK
-+#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data))
-+#endif
-+#ifndef schedule_work
-+#define schedule_work(_work) schedule_task((_work))
-+#endif
-+#ifndef flush_scheduled_work
-+#define flush_scheduled_work() flush_scheduled_tasks()
-+#endif
-+#endif
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
-+/* Some distributions have their own 2.6.x compatibility layers */
-+#ifndef IRQ_NONE
-+typedef void irqreturn_t;
-+#define IRQ_NONE
-+#define IRQ_HANDLED
-+#define IRQ_RETVAL(x)
-+#endif
-+#else
-+typedef irqreturn_t (*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs);
-+#endif
-+
-+#if defined(CONFIG_PCMCIA) || defined(CONFIG_PCMCIA_MODULE)
-+
-+#include <pcmcia/version.h>
-+#include <pcmcia/cs_types.h>
-+#include <pcmcia/cs.h>
-+#include <pcmcia/cistpl.h>
-+#include <pcmcia/cisreg.h>
-+#include <pcmcia/ds.h>
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,69))
-+/* In 2.5 (as of 2.5.69 at least) there is a cs_error exported which
-+ * does this, but it's not in 2.4 so we do our own for now. */
-+static inline void
-+cs_error(client_handle_t handle, int func, int ret)
-+{
-+	error_info_t err = { func, ret };
-+	CardServices(ReportError, handle, &err);
-+}
-+#endif
-+
-+#endif /* CONFIG_PCMCIA */
-+
-+#ifndef __exit
-+#define __exit
-+#endif
-+#ifndef __devexit
-+#define __devexit
-+#endif
-+#ifndef __devinit
-+#define __devinit	__init
-+#endif
-+#ifndef __devinitdata
-+#define __devinitdata
-+#endif
-+#ifndef __devexit_p
-+#define __devexit_p(x)	x
-+#endif
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0))
++#define C0_INX		0		/* CP0: TLB Index */
++#define C0_RAND		1		/* CP0: TLB Random */
++#define C0_TLBLO0	2		/* CP0: TLB EntryLo0 */
++#define C0_TLBLO	C0_TLBLO0	/* CP0: TLB EntryLo0 */
++#define C0_TLBLO1	3		/* CP0: TLB EntryLo1 */
++#define C0_CTEXT	4		/* CP0: Context */
++#define C0_PGMASK	5		/* CP0: TLB PageMask */
++#define C0_WIRED	6		/* CP0: TLB Wired */
++#define C0_BADVADDR	8		/* CP0: Bad Virtual Address */
++#define C0_COUNT 	9		/* CP0: Count */
++#define C0_TLBHI	10		/* CP0: TLB EntryHi */
++#define C0_COMPARE	11		/* CP0: Compare */
++#define C0_SR		12		/* CP0: Processor Status */
++#define C0_STATUS	C0_SR		/* CP0: Processor Status */
++#define C0_CAUSE	13		/* CP0: Exception Cause */
++#define C0_EPC		14		/* CP0: Exception PC */
++#define C0_PRID		15		/* CP0: Processor Revision Indentifier */
++#define C0_CONFIG	16		/* CP0: Config */
++#define C0_LLADDR	17		/* CP0: LLAddr */
++#define C0_WATCHLO	18		/* CP0: WatchpointLo */
++#define C0_WATCHHI	19		/* CP0: WatchpointHi */
++#define C0_XCTEXT	20		/* CP0: XContext */
++#define C0_DIAGNOSTIC	22		/* CP0: Diagnostic */
++#define C0_BROADCOM	C0_DIAGNOSTIC	/* CP0: Broadcom Register */
++#define	C0_PERFORMANCE	25		/* CP0: Performance Counter/Control Registers */
++#define C0_ECC		26		/* CP0: ECC */
++#define C0_CACHEERR	27		/* CP0: CacheErr */
++#define C0_TAGLO	28		/* CP0: TagLo */
++#define C0_TAGHI	29		/* CP0: TagHi */
++#define C0_ERREPC	30		/* CP0: ErrorEPC */
++#define C0_DESAVE	31		/* CP0: DebugSave */
 +
-+#define pci_get_drvdata(dev)		(dev)->sysdata
-+#define pci_set_drvdata(dev, value)	(dev)->sysdata=(value)
++#endif	/* _LANGUAGE_ASSEMBLY */
 +
 +/*
-+ * New-style (2.4.x) PCI/hot-pluggable PCI/CardBus registration
++ * Memory segments (32bit kernel mode addresses)
 + */
++#undef KUSEG
++#undef KSEG0
++#undef KSEG1
++#undef KSEG2
++#undef KSEG3
++#define KUSEG		0x00000000
++#define KSEG0		0x80000000
++#define KSEG1		0xa0000000
++#define KSEG2		0xc0000000
++#define KSEG3		0xe0000000
++#define PHYSADDR_MASK	0x1fffffff
 +
-+struct pci_device_id {
-+	unsigned int vendor, device;		/* Vendor and device ID or PCI_ANY_ID */
-+	unsigned int subvendor, subdevice;	/* Subsystem ID's or PCI_ANY_ID */
-+	unsigned int class, class_mask;		/* (class,subclass,prog-if) triplet */
-+	unsigned long driver_data;		/* Data private to the driver */
-+};
-+
-+struct pci_driver {
-+	struct list_head node;
-+	char *name;
-+	const struct pci_device_id *id_table;	/* NULL if wants all devices */
-+	int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);	/* New device inserted */
-+	void (*remove)(struct pci_dev *dev);	/* Device removed (NULL if not a hot-plug capable driver) */
-+	void (*suspend)(struct pci_dev *dev);	/* Device suspended */
-+	void (*resume)(struct pci_dev *dev);	/* Device woken up */
-+};
-+
-+#define MODULE_DEVICE_TABLE(type, name)
-+#define PCI_ANY_ID (~0)
-+
-+/* compatpci.c */
-+#define pci_module_init pci_register_driver
-+extern int pci_register_driver(struct pci_driver *drv);
-+extern void pci_unregister_driver(struct pci_driver *drv);
++/*
++ * Map an address to a certain kernel segment
++ */
++#undef PHYSADDR
++#undef KSEG0ADDR
++#undef KSEG1ADDR
++#undef KSEG2ADDR
++#undef KSEG3ADDR
 +
-+#endif /* PCI registration */
++#define PHYSADDR(a)	(_ULCAST_(a) & PHYSADDR_MASK)
++#define KSEG0ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG0)
++#define KSEG1ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG1)
++#define KSEG2ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG2)
++#define KSEG3ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG3)
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,2,18))
-+#ifdef MODULE
-+#define module_init(x) int init_module(void) { return x(); }
-+#define module_exit(x) void cleanup_module(void) { x(); }
-+#else
-+#define module_init(x)	__initcall(x);
-+#define module_exit(x)	__exitcall(x);
-+#endif
-+#endif
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,48))
-+#define list_for_each(pos, head) \
-+	for (pos = (head)->next; pos != (head); pos = pos->next)
++#ifndef	Index_Invalidate_I
++/*
++ * Cache Operations
++ */
++#define Index_Invalidate_I	0x00
++#define Index_Writeback_Inv_D	0x01
++#define Index_Invalidate_SI	0x02
++#define Index_Writeback_Inv_SD	0x03
++#define Index_Load_Tag_I	0x04
++#define Index_Load_Tag_D	0x05
++#define Index_Load_Tag_SI	0x06
++#define Index_Load_Tag_SD	0x07
++#define Index_Store_Tag_I	0x08
++#define Index_Store_Tag_D	0x09
++#define Index_Store_Tag_SI	0x0A
++#define Index_Store_Tag_SD	0x0B
++#define Create_Dirty_Excl_D	0x0d
++#define Create_Dirty_Excl_SD	0x0f
++#define Hit_Invalidate_I	0x10
++#define Hit_Invalidate_D	0x11
++#define Hit_Invalidate_SI	0x12
++#define Hit_Invalidate_SD	0x13
++#define Fill_I			0x14
++#define Hit_Writeback_Inv_D	0x15
++					/* 0x16 is unused */
++#define Hit_Writeback_Inv_SD	0x17
++#define R5K_Page_Invalidate_S	0x17
++#define Hit_Writeback_I		0x18
++#define Hit_Writeback_D		0x19
++					/* 0x1a is unused */
++#define Hit_Writeback_SD	0x1b
++					/* 0x1c is unused */
++					/* 0x1e is unused */
++#define Hit_Set_Virtual_SI	0x1e
++#define Hit_Set_Virtual_SD	0x1f
 +#endif
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,13))
-+#define pci_resource_start(dev, bar)	((dev)->base_address[(bar)])
-+#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,44))
-+#define pci_resource_start(dev, bar)	((dev)->resource[(bar)].start)
-+#endif
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,23))
-+#define pci_enable_device(dev) do { } while (0)
-+#endif
++/*
++ * R4x00 interrupt enable / cause bits
++ */
++#define IE_SW0			(_ULCAST_(1) <<  8)
++#define IE_SW1			(_ULCAST_(1) <<  9)
++#define IE_IRQ0			(_ULCAST_(1) << 10)
++#define IE_IRQ1			(_ULCAST_(1) << 11)
++#define IE_IRQ2			(_ULCAST_(1) << 12)
++#define IE_IRQ3			(_ULCAST_(1) << 13)
++#define IE_IRQ4			(_ULCAST_(1) << 14)
++#define IE_IRQ5			(_ULCAST_(1) << 15)
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,14))
-+#define net_device device
++#ifndef	ST0_UM
++/*
++ * Bitfields in the mips32 cp0 status register
++ */
++#define ST0_IE			0x00000001
++#define ST0_EXL			0x00000002
++#define ST0_ERL			0x00000004
++#define ST0_UM			0x00000010
++#define ST0_SWINT0		0x00000100
++#define ST0_SWINT1		0x00000200
++#define ST0_HWINT0		0x00000400
++#define ST0_HWINT1		0x00000800
++#define ST0_HWINT2		0x00001000
++#define ST0_HWINT3		0x00002000
++#define ST0_HWINT4		0x00004000
++#define ST0_HWINT5		0x00008000
++#define ST0_IM			0x0000ff00
++#define ST0_NMI			0x00080000
++#define ST0_SR			0x00100000
++#define ST0_TS			0x00200000
++#define ST0_BEV			0x00400000
++#define ST0_RE			0x02000000
++#define ST0_RP			0x08000000
++#define ST0_CU			0xf0000000
++#define ST0_CU0			0x10000000
++#define ST0_CU1			0x20000000
++#define ST0_CU2			0x40000000
++#define ST0_CU3			0x80000000
 +#endif
 +
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,42))
 +
 +/*
-+ * DMA mapping
-+ *
-+ * See linux/Documentation/DMA-mapping.txt
++ * Bitfields in the mips32 cp0 cause register
 + */
++#define C_EXC			0x0000007c
++#define C_EXC_SHIFT		2
++#define C_INT			0x0000ff00
++#define C_INT_SHIFT		8
++#define C_SW0			(_ULCAST_(1) <<  8)
++#define C_SW1			(_ULCAST_(1) <<  9)
++#define C_IRQ0			(_ULCAST_(1) << 10)
++#define C_IRQ1			(_ULCAST_(1) << 11)
++#define C_IRQ2			(_ULCAST_(1) << 12)
++#define C_IRQ3			(_ULCAST_(1) << 13)
++#define C_IRQ4			(_ULCAST_(1) << 14)
++#define C_IRQ5			(_ULCAST_(1) << 15)
++#define C_WP			0x00400000
++#define C_IV			0x00800000
++#define C_CE			0x30000000
++#define C_CE_SHIFT		28
++#define C_BD			0x80000000
 +
-+#ifndef PCI_DMA_TODEVICE
-+#define	PCI_DMA_TODEVICE	1
-+#define	PCI_DMA_FROMDEVICE	2
-+#endif
-+
-+typedef u32 dma_addr_t;
-+
-+/* Pure 2^n version of get_order */
-+static inline int get_order(unsigned long size)
-+{
-+	int order;
-+
-+	size = (size-1) >> (PAGE_SHIFT-1);
-+	order = -1;
-+	do {
-+		size >>= 1;
-+		order++;
-+	} while (size);
-+	return order;
-+}
-+
-+static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
-+					 dma_addr_t *dma_handle)
-+{
-+	void *ret;
-+	int gfp = GFP_ATOMIC | GFP_DMA;
-+
-+	ret = (void *)__get_free_pages(gfp, get_order(size));
-+
-+	if (ret != NULL) {
-+		memset(ret, 0, size);
-+		*dma_handle = virt_to_bus(ret);
-+	}
-+	return ret;
-+}
-+static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size,
-+				       void *vaddr, dma_addr_t dma_handle)
-+{
-+	free_pages((unsigned long)vaddr, get_order(size));
-+}
-+#ifdef ILSIM
-+extern uint pci_map_single(void *dev, void *va, uint size, int direction);
-+extern void pci_unmap_single(void *dev, uint pa, uint size, int direction);
-+#else
-+#define pci_map_single(cookie, address, size, dir)	virt_to_bus(address)
-+#define pci_unmap_single(cookie, address, size, dir)
-+#endif
-+
-+#endif /* DMA mapping */
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,3,43))
-+
-+#define dev_kfree_skb_any(a)		dev_kfree_skb(a)
-+#define netif_down(dev)			do { (dev)->start = 0; } while(0)
-+
-+/* pcmcia-cs provides its own netdevice compatibility layer */
-+#ifndef _COMPAT_NETDEVICE_H
-+
-+/*
-+ * SoftNet
-+ *
-+ * For pre-softnet kernels we need to tell the upper layer not to
-+ * re-enter start_xmit() while we are in there. However softnet
-+ * guarantees not to enter while we are in there so there is no need
-+ * to do the netif_stop_queue() dance unless the transmit queue really
-+ * gets stuck. This should also improve performance according to tests
-+ * done by Aman Singla.
-+ */
-+
-+#define dev_kfree_skb_irq(a)		dev_kfree_skb(a)
-+#define netif_wake_queue(dev)		do { clear_bit(0, &(dev)->tbusy); mark_bh(NET_BH); } while(0)
-+#define netif_stop_queue(dev)		set_bit(0, &(dev)->tbusy)
-+
-+static inline void netif_start_queue(struct net_device *dev)
-+{
-+	dev->tbusy = 0;
-+	dev->interrupt = 0;
-+	dev->start = 1;
-+}
-+
-+#define netif_queue_stopped(dev)	(dev)->tbusy
-+#define netif_running(dev)		(dev)->start
-+
-+#endif /* _COMPAT_NETDEVICE_H */
-+
-+#define netif_device_attach(dev)	netif_start_queue(dev)
-+#define netif_device_detach(dev)	netif_stop_queue(dev)
-+
-+/* 2.4.x renamed bottom halves to tasklets */
-+#define tasklet_struct				tq_struct
-+static inline void tasklet_schedule(struct tasklet_struct *tasklet)
-+{
-+	queue_task(tasklet, &tq_immediate);
-+	mark_bh(IMMEDIATE_BH);
-+}
-+
-+static inline void tasklet_init(struct tasklet_struct *tasklet,
-+				void (*func)(unsigned long),
-+				unsigned long data)
-+{
-+	tasklet->next = NULL;
-+	tasklet->sync = 0;
-+	tasklet->routine = (void (*)(void *))func;
-+	tasklet->data = (void *)data;
-+}
-+#define tasklet_kill(tasklet)			{do{} while(0);}
-+
-+/* 2.4.x introduced del_timer_sync() */
-+#define del_timer_sync(timer) del_timer(timer)
-+
-+#else
-+
-+#define netif_down(dev)
-+
-+#endif /* SoftNet */
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,3))
-+
-+/*
-+ * Emit code to initialise a tq_struct's routine and data pointers
-+ */
-+#define PREPARE_TQUEUE(_tq, _routine, _data)			\
-+	do {							\
-+		(_tq)->routine = _routine;			\
-+		(_tq)->data = _data;				\
-+	} while (0)
-+
-+/*
-+ * Emit code to initialise all of a tq_struct
-+ */
-+#define INIT_TQUEUE(_tq, _routine, _data)			\
-+	do {							\
-+		INIT_LIST_HEAD(&(_tq)->list);			\
-+		(_tq)->sync = 0;				\
-+		PREPARE_TQUEUE((_tq), (_routine), (_data));	\
-+	} while (0)
-+
-+#endif
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,6))
-+
-+/* Power management related routines */
-+
-+static inline int
-+pci_save_state(struct pci_dev *dev, u32 *buffer)
-+{
-+	int i;
-+	if (buffer) {
-+		for (i = 0; i < 16; i++)
-+			pci_read_config_dword(dev, i * 4,&buffer[i]);
-+	}
-+	return 0;
-+}
-+
-+static inline int 
-+pci_restore_state(struct pci_dev *dev, u32 *buffer)
-+{
-+	int i;
-+
-+	if (buffer) {
-+		for (i = 0; i < 16; i++)
-+			pci_write_config_dword(dev,i * 4, buffer[i]);
-+	}
-+	/*
-+	 * otherwise, write the context information we know from bootup.
-+	 * This works around a problem where warm-booting from Windows
-+	 * combined with a D3(hot)->D0 transition causes PCI config
-+	 * header data to be forgotten.
-+	 */	
-+	else {
-+		for (i = 0; i < 6; i ++)
-+			pci_write_config_dword(dev,
-+					       PCI_BASE_ADDRESS_0 + (i * 4),
-+					       pci_resource_start(dev, i));
-+		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-+	}
-+	return 0;
-+}
-+
-+#endif /* PCI power management */
-+
-+/* Old cp0 access macros deprecated in 2.4.19 */
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,4,19))
-+#define read_c0_count() read_32bit_cp0_register(CP0_COUNT)
-+#endif
-+
-+/* Module refcount handled internally in 2.6.x */
-+#ifndef SET_MODULE_OWNER
-+#define SET_MODULE_OWNER(dev)		do {} while (0)
-+#define OLD_MOD_INC_USE_COUNT		MOD_INC_USE_COUNT
-+#define OLD_MOD_DEC_USE_COUNT		MOD_DEC_USE_COUNT
-+#else
-+#define OLD_MOD_INC_USE_COUNT		do {} while (0)
-+#define OLD_MOD_DEC_USE_COUNT		do {} while (0)
-+#endif
-+
-+#ifndef SET_NETDEV_DEV
-+#define SET_NETDEV_DEV(net, pdev)	do {} while (0)
-+#endif
-+
-+#ifndef HAVE_FREE_NETDEV
-+#define free_netdev(dev)		kfree(dev)
-+#endif
-+
-+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
-+/* struct packet_type redefined in 2.6.x */
-+#define af_packet_priv			data
-+#endif
-+
-+#endif /* _linuxver_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/min_osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/min_osl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/min_osl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/min_osl.h	2005-12-16 23:39:10.748824500 +0100
-@@ -0,0 +1,126 @@
-+/*
-+ * HND Minimal OS Abstraction Layer.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
-+
-+#ifndef _min_osl_h_
-+#define _min_osl_h_
-+
-+#include <typedefs.h>
-+#include <sbconfig.h>
-+#include <mipsinc.h>
-+
-+/* Cache support */
-+extern void caches_on(void);
-+extern void blast_dcache(void);
-+extern void blast_icache(void);
-+
-+/* uart output */
-+extern void putc(int c);
-+
-+/* lib functions */
-+extern int printf(const char *fmt, ...);
-+extern int sprintf(char *buf, const char *fmt, ...);
-+extern int strcmp(const char *s1, const char *s2);
-+extern int strncmp(const char *s1, const char *s2, uint n);
-+extern char *strcpy(char *dest, const char *src);
-+extern char *strncpy(char *dest, const char *src, uint n);
-+extern uint strlen(const char *s);
-+extern char *strchr(const char *str,int c);
-+extern char *strrchr(const char *str, int c);
-+extern char *strcat(char *d, const char *s);
-+extern void *memset(void *dest, int c, uint n);
-+extern void *memcpy(void *dest, const void *src, uint n);
-+extern int memcmp(const void *s1, const void *s2, uint n);
-+#define	bcopy(src, dst, len)	memcpy((dst), (src), (len))
-+#define	bcmp(b1, b2, len)	memcmp((b1), (b2), (len))
-+#define	bzero(b, len)		memset((b), '\0', (len))
-+
-+/* assert & debugging */
-+#define	ASSERT(exp)		do {} while (0)
-+
-+/* PCMCIA attribute space access macros */
-+#define	OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \
-+	ASSERT(0)
-+#define	OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \
-+	ASSERT(0)
-+
-+/* PCI configuration space access macros */
-+#define	OSL_PCI_READ_CONFIG(loc, offset, size) \
-+	(offset == 8 ? 0 : 0xffffffff)
-+#define	OSL_PCI_WRITE_CONFIG(loc, offset, size, val) \
-+	do {} while (0)
-+
-+/* PCI device bus # and slot # */
-+#define OSL_PCI_BUS(osh)	(0)
-+#define OSL_PCI_SLOT(osh)	(0)
-+
-+/* register access macros */
-+#define wreg32(r, v)		(*(volatile uint32*)(r) = (uint32)(v))
-+#define rreg32(r)		(*(volatile uint32*)(r))
-+#define wreg16(r, v)		(*(volatile uint16*)(r) = (uint16)(v))
-+#define rreg16(r)		(*(volatile uint16*)(r))
-+#define wreg8(r, v)		(*(volatile uint8*)(r) = (uint8)(v))
-+#define rreg8(r)		(*(volatile uint8*)(r))
-+#define R_REG(r) ({ \
-+	__typeof(*(r)) __osl_v; \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	__osl_v = rreg8((r)); break; \
-+	case sizeof(uint16):	__osl_v = rreg16((r)); break; \
-+	case sizeof(uint32):	__osl_v = rreg32((r)); break; \
-+	} \
-+	__osl_v; \
-+})
-+#define W_REG(r, v) do { \
-+	switch (sizeof(*(r))) { \
-+	case sizeof(uint8):	wreg8((r), (v)); break; \
-+	case sizeof(uint16):	wreg16((r), (v)); break; \
-+	case sizeof(uint32):	wreg32((r), (v)); break; \
-+	} \
-+} while (0)
-+#define	AND_REG(r, v)		W_REG((r), R_REG(r) & (v))
-+#define	OR_REG(r, v)		W_REG((r), R_REG(r) | (v))
-+
-+/* general purpose memory allocation */
-+#define	MALLOC(osh, size)	malloc(size)
-+#define	MFREE(osh, addr, size)	free(addr)
-+#define	MALLOCED(osh)		0
-+#define	MALLOC_FAILED(osh)	0
-+#define	MALLOC_DUMP(osh, buf, sz)
-+extern int free(void *ptr);
-+extern void *malloc(uint size);
-+
-+/* uncached virtual address */
-+#define	OSL_UNCACHED(va)	((void*)KSEG1ADDR((ulong)(va)))
-+
-+/* host/bus architecture-specific address byte swap */
-+#define BUS_SWAP32(v)		(v)
-+
-+/* microsecond delay */
-+#define	OSL_DELAY(usec)		udelay(usec)
-+extern void udelay(uint32 usec);
-+
-+/* map/unmap physical to virtual I/O */
-+#define	REG_MAP(pa, size)	((void*)KSEG1ADDR((ulong)(pa)))
-+#define	REG_UNMAP(va)		do {} while (0)
-+
-+/* dereference an address that may cause a bus exception */
-+#define	BUSPROBE(val, addr)	(uint32 *)(addr) = (val)
-+
-+/* Misc stubs */
-+#define osl_attach(pdev)	((osl_t*)pdev)
-+#define osl_detach(osh)
-+extern void *osl_init(void);
-+#define OSL_ERROR(bcmerror)	osl_error(bcmerror)
-+extern int osl_error(int);
-+
-+#endif	/* _min_osl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/mipsinc.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/mipsinc.h
---- linux-2.4.32/arch/mips/bcm947xx/include/mipsinc.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/mipsinc.h	2005-12-16 23:39:10.748824500 +0100
-@@ -0,0 +1,552 @@
-+/*
-+ * HND Run Time Environment for standalone MIPS programs.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
-+
-+#ifndef	_MISPINC_H
-+#define _MISPINC_H
-+
-+
-+/* MIPS defines */
-+
-+#ifdef	_LANGUAGE_ASSEMBLY
-+
-+/*
-+ * Symbolic register names for 32 bit ABI
-+ */
-+#define zero	$0	/* wired zero */
-+#define AT	$1	/* assembler temp - uppercase because of ".set at" */
-+#define v0	$2	/* return value */
-+#define v1	$3
-+#define a0	$4	/* argument registers */
-+#define a1	$5
-+#define a2	$6
-+#define a3	$7
-+#define t0	$8	/* caller saved */
-+#define t1	$9
-+#define t2	$10
-+#define t3	$11
-+#define t4	$12
-+#define t5	$13
-+#define t6	$14
-+#define t7	$15
-+#define s0	$16	/* callee saved */
-+#define s1	$17
-+#define s2	$18
-+#define s3	$19
-+#define s4	$20
-+#define s5	$21
-+#define s6	$22
-+#define s7	$23
-+#define t8	$24	/* caller saved */
-+#define t9	$25
-+#define jp	$25	/* PIC jump register */
-+#define k0	$26	/* kernel scratch */
-+#define k1	$27
-+#define gp	$28	/* global pointer */
-+#define sp	$29	/* stack pointer */
-+#define fp	$30	/* frame pointer */
-+#define s8	$30	/* same like fp! */
-+#define ra	$31	/* return address */
-+
-+
-+/*
-+ * CP0 Registers 
-+ */
-+
-+#define C0_INX		$0
-+#define C0_RAND		$1
-+#define C0_TLBLO0	$2
-+#define C0_TLBLO	C0_TLBLO0
-+#define C0_TLBLO1	$3
-+#define C0_CTEXT	$4
-+#define C0_PGMASK	$5
-+#define C0_WIRED	$6
-+#define C0_BADVADDR	$8
-+#define C0_COUNT 	$9
-+#define C0_TLBHI	$10
-+#define C0_COMPARE	$11
-+#define C0_SR		$12
-+#define C0_STATUS	C0_SR
-+#define C0_CAUSE	$13
-+#define C0_EPC		$14
-+#define C0_PRID		$15
-+#define C0_CONFIG	$16
-+#define C0_LLADDR	$17
-+#define C0_WATCHLO	$18
-+#define C0_WATCHHI	$19
-+#define C0_XCTEXT	$20
-+#define C0_DIAGNOSTIC	$22
-+#define C0_BROADCOM	C0_DIAGNOSTIC
-+#define	C0_PERFORMANCE	$25
-+#define C0_ECC		$26
-+#define C0_CACHEERR	$27
-+#define C0_TAGLO	$28
-+#define C0_TAGHI	$29
-+#define C0_ERREPC	$30
-+#define C0_DESAVE	$31
-+
-+/*
-+ * LEAF - declare leaf routine
-+ */
-+#define LEAF(symbol)				\
-+		.globl	symbol;			\
-+		.align	2;			\
-+		.type	symbol,@function;	\
-+		.ent	symbol,0;		\
-+symbol:		.frame	sp,0,ra
-+
-+/*
-+ * END - mark end of function
-+ */
-+#define END(function)				\
-+		.end	function;		\
-+		.size	function,.-function
-+
-+#define _ULCAST_
-+
-+#else
-+
-+/*
-+ * The following macros are especially useful for __asm__
-+ * inline assembler.
-+ */
-+#ifndef __STR
-+#define __STR(x) #x
-+#endif
-+#ifndef STR
-+#define STR(x) __STR(x)
-+#endif
-+
-+#define _ULCAST_ (unsigned long)
-+
-+
-+/*
-+ * CP0 Registers 
-+ */
-+
-+#define C0_INX		0		/* CP0: TLB Index */
-+#define C0_RAND		1		/* CP0: TLB Random */
-+#define C0_TLBLO0	2		/* CP0: TLB EntryLo0 */
-+#define C0_TLBLO	C0_TLBLO0	/* CP0: TLB EntryLo0 */
-+#define C0_TLBLO1	3		/* CP0: TLB EntryLo1 */
-+#define C0_CTEXT	4		/* CP0: Context */
-+#define C0_PGMASK	5		/* CP0: TLB PageMask */
-+#define C0_WIRED	6		/* CP0: TLB Wired */
-+#define C0_BADVADDR	8		/* CP0: Bad Virtual Address */
-+#define C0_COUNT 	9		/* CP0: Count */
-+#define C0_TLBHI	10		/* CP0: TLB EntryHi */
-+#define C0_COMPARE	11		/* CP0: Compare */
-+#define C0_SR		12		/* CP0: Processor Status */
-+#define C0_STATUS	C0_SR		/* CP0: Processor Status */
-+#define C0_CAUSE	13		/* CP0: Exception Cause */
-+#define C0_EPC		14		/* CP0: Exception PC */
-+#define C0_PRID		15		/* CP0: Processor Revision Indentifier */
-+#define C0_CONFIG	16		/* CP0: Config */
-+#define C0_LLADDR	17		/* CP0: LLAddr */
-+#define C0_WATCHLO	18		/* CP0: WatchpointLo */
-+#define C0_WATCHHI	19		/* CP0: WatchpointHi */
-+#define C0_XCTEXT	20		/* CP0: XContext */
-+#define C0_DIAGNOSTIC	22		/* CP0: Diagnostic */
-+#define C0_BROADCOM	C0_DIAGNOSTIC	/* CP0: Broadcom Register */
-+#define	C0_PERFORMANCE	25		/* CP0: Performance Counter/Control Registers */
-+#define C0_ECC		26		/* CP0: ECC */
-+#define C0_CACHEERR	27		/* CP0: CacheErr */
-+#define C0_TAGLO	28		/* CP0: TagLo */
-+#define C0_TAGHI	29		/* CP0: TagHi */
-+#define C0_ERREPC	30		/* CP0: ErrorEPC */
-+#define C0_DESAVE	31		/* CP0: DebugSave */
-+
-+#endif	/* _LANGUAGE_ASSEMBLY */
-+
-+/*
-+ * Memory segments (32bit kernel mode addresses)
-+ */
-+#undef KUSEG
-+#undef KSEG0
-+#undef KSEG1
-+#undef KSEG2
-+#undef KSEG3
-+#define KUSEG		0x00000000
-+#define KSEG0		0x80000000
-+#define KSEG1		0xa0000000
-+#define KSEG2		0xc0000000
-+#define KSEG3		0xe0000000
-+#define PHYSADDR_MASK	0x1fffffff
-+
-+/*
-+ * Map an address to a certain kernel segment
-+ */
-+#undef PHYSADDR
-+#undef KSEG0ADDR
-+#undef KSEG1ADDR
-+#undef KSEG2ADDR
-+#undef KSEG3ADDR
-+
-+#define PHYSADDR(a)	(_ULCAST_(a) & PHYSADDR_MASK)
-+#define KSEG0ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG0)
-+#define KSEG1ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG1)
-+#define KSEG2ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG2)
-+#define KSEG3ADDR(a)	((_ULCAST_(a) & PHYSADDR_MASK) | KSEG3)
-+
-+
-+#ifndef	Index_Invalidate_I
-+/*
-+ * Cache Operations
-+ */
-+#define Index_Invalidate_I	0x00
-+#define Index_Writeback_Inv_D	0x01
-+#define Index_Invalidate_SI	0x02
-+#define Index_Writeback_Inv_SD	0x03
-+#define Index_Load_Tag_I	0x04
-+#define Index_Load_Tag_D	0x05
-+#define Index_Load_Tag_SI	0x06
-+#define Index_Load_Tag_SD	0x07
-+#define Index_Store_Tag_I	0x08
-+#define Index_Store_Tag_D	0x09
-+#define Index_Store_Tag_SI	0x0A
-+#define Index_Store_Tag_SD	0x0B
-+#define Create_Dirty_Excl_D	0x0d
-+#define Create_Dirty_Excl_SD	0x0f
-+#define Hit_Invalidate_I	0x10
-+#define Hit_Invalidate_D	0x11
-+#define Hit_Invalidate_SI	0x12
-+#define Hit_Invalidate_SD	0x13
-+#define Fill_I			0x14
-+#define Hit_Writeback_Inv_D	0x15
-+					/* 0x16 is unused */
-+#define Hit_Writeback_Inv_SD	0x17
-+#define R5K_Page_Invalidate_S	0x17
-+#define Hit_Writeback_I		0x18
-+#define Hit_Writeback_D		0x19
-+					/* 0x1a is unused */
-+#define Hit_Writeback_SD	0x1b
-+					/* 0x1c is unused */
-+					/* 0x1e is unused */
-+#define Hit_Set_Virtual_SI	0x1e
-+#define Hit_Set_Virtual_SD	0x1f
-+#endif
-+
-+
-+/*
-+ * R4x00 interrupt enable / cause bits
-+ */
-+#define IE_SW0			(_ULCAST_(1) <<  8)
-+#define IE_SW1			(_ULCAST_(1) <<  9)
-+#define IE_IRQ0			(_ULCAST_(1) << 10)
-+#define IE_IRQ1			(_ULCAST_(1) << 11)
-+#define IE_IRQ2			(_ULCAST_(1) << 12)
-+#define IE_IRQ3			(_ULCAST_(1) << 13)
-+#define IE_IRQ4			(_ULCAST_(1) << 14)
-+#define IE_IRQ5			(_ULCAST_(1) << 15)
-+
-+#ifndef	ST0_UM
-+/*
-+ * Bitfields in the mips32 cp0 status register
-+ */
-+#define ST0_IE			0x00000001
-+#define ST0_EXL			0x00000002
-+#define ST0_ERL			0x00000004
-+#define ST0_UM			0x00000010
-+#define ST0_SWINT0		0x00000100
-+#define ST0_SWINT1		0x00000200
-+#define ST0_HWINT0		0x00000400
-+#define ST0_HWINT1		0x00000800
-+#define ST0_HWINT2		0x00001000
-+#define ST0_HWINT3		0x00002000
-+#define ST0_HWINT4		0x00004000
-+#define ST0_HWINT5		0x00008000
-+#define ST0_IM			0x0000ff00
-+#define ST0_NMI			0x00080000
-+#define ST0_SR			0x00100000
-+#define ST0_TS			0x00200000
-+#define ST0_BEV			0x00400000
-+#define ST0_RE			0x02000000
-+#define ST0_RP			0x08000000
-+#define ST0_CU			0xf0000000
-+#define ST0_CU0			0x10000000
-+#define ST0_CU1			0x20000000
-+#define ST0_CU2			0x40000000
-+#define ST0_CU3			0x80000000
-+#endif
-+
-+
-+/*
-+ * Bitfields in the mips32 cp0 cause register
-+ */
-+#define C_EXC			0x0000007c
-+#define C_EXC_SHIFT		2
-+#define C_INT			0x0000ff00
-+#define C_INT_SHIFT		8
-+#define C_SW0			(_ULCAST_(1) <<  8)
-+#define C_SW1			(_ULCAST_(1) <<  9)
-+#define C_IRQ0			(_ULCAST_(1) << 10)
-+#define C_IRQ1			(_ULCAST_(1) << 11)
-+#define C_IRQ2			(_ULCAST_(1) << 12)
-+#define C_IRQ3			(_ULCAST_(1) << 13)
-+#define C_IRQ4			(_ULCAST_(1) << 14)
-+#define C_IRQ5			(_ULCAST_(1) << 15)
-+#define C_WP			0x00400000
-+#define C_IV			0x00800000
-+#define C_CE			0x30000000
-+#define C_CE_SHIFT		28
-+#define C_BD			0x80000000
-+
-+/* Values in C_EXC */
-+#define EXC_INT			0
-+#define EXC_TLBM		1
-+#define EXC_TLBL		2
-+#define EXC_TLBS		3
-+#define EXC_AEL			4
-+#define EXC_AES			5
-+#define EXC_IBE			6
-+#define EXC_DBE			7
-+#define EXC_SYS			8
-+#define EXC_BPT			9
-+#define EXC_RI			10
-+#define EXC_CU			11
-+#define EXC_OV			12
-+#define EXC_TR			13
-+#define EXC_WATCH		23
-+#define EXC_MCHK		24
-+
-+
-+/*
-+ * Bits in the cp0 config register.
-+ */
-+#define CONF_CM_CACHABLE_NO_WA		0
-+#define CONF_CM_CACHABLE_WA		1
-+#define CONF_CM_UNCACHED		2
-+#define CONF_CM_CACHABLE_NONCOHERENT	3
-+#define CONF_CM_CACHABLE_CE		4
-+#define CONF_CM_CACHABLE_COW		5
-+#define CONF_CM_CACHABLE_CUW		6
-+#define CONF_CM_CACHABLE_ACCELERATED	7
-+#define CONF_CM_CMASK			7
-+#define CONF_CU				(_ULCAST_(1) <<  3)
-+#define CONF_DB				(_ULCAST_(1) <<  4)
-+#define CONF_IB				(_ULCAST_(1) <<  5)
-+#define CONF_SE				(_ULCAST_(1) << 12)
-+#define CONF_SC				(_ULCAST_(1) << 17)
-+#define CONF_AC				(_ULCAST_(1) << 23)
-+#define CONF_HALT			(_ULCAST_(1) << 25)
-+
-+
-+/*
-+ * Bits in the cp0 config register select 1.
-+ */
-+#define CONF1_FP		0x00000001	/* FPU present */
-+#define CONF1_EP		0x00000002	/* EJTAG present */
-+#define CONF1_CA		0x00000004	/* mips16 implemented */
-+#define CONF1_WR		0x00000008	/* Watch registers present */
-+#define CONF1_PC		0x00000010	/* Performance counters present */
-+#define CONF1_DA_SHIFT		7		/* D$ associativity */
-+#define CONF1_DA_MASK		0x00000380
-+#define CONF1_DA_BASE		1
-+#define CONF1_DL_SHIFT		10		/* D$ line size */
-+#define CONF1_DL_MASK		0x00001c00
-+#define CONF1_DL_BASE		2
-+#define CONF1_DS_SHIFT		13		/* D$ sets/way */
-+#define CONF1_DS_MASK		0x0000e000
-+#define CONF1_DS_BASE		64
-+#define CONF1_IA_SHIFT		16		/* I$ associativity */
-+#define CONF1_IA_MASK		0x00070000
-+#define CONF1_IA_BASE		1
-+#define CONF1_IL_SHIFT		19		/* I$ line size */
-+#define CONF1_IL_MASK		0x00380000
-+#define CONF1_IL_BASE		2
-+#define CONF1_IS_SHIFT		22		/* Instruction cache sets/way */
-+#define CONF1_IS_MASK		0x01c00000
-+#define CONF1_IS_BASE		64
-+#define CONF1_MS_MASK		0x7e000000	/* Number of tlb entries */
-+#define CONF1_MS_SHIFT		25
-+
-+/* PRID register */
-+#define PRID_COPT_MASK		0xff000000
-+#define PRID_COMP_MASK		0x00ff0000
-+#define PRID_IMP_MASK		0x0000ff00
-+#define PRID_REV_MASK		0x000000ff
-+
-+#define PRID_COMP_LEGACY	0x000000
-+#define PRID_COMP_MIPS		0x010000
-+#define PRID_COMP_BROADCOM	0x020000
-+#define PRID_COMP_ALCHEMY	0x030000
-+#define PRID_COMP_SIBYTE	0x040000
-+#define PRID_IMP_BCM4710	0x4000
-+#define PRID_IMP_BCM3302	0x9000
-+#define PRID_IMP_BCM3303	0x9100
-+
-+#define PRID_IMP_UNKNOWN	0xff00
-+
-+#define BCM330X(id) \
-+	(((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3302)) \
-+	|| ((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3303)))
-+
-+/* Bits in C0_BROADCOM */
-+#define BRCM_PFC_AVAIL		0x20000000	/* PFC is available */
-+#define BRCM_DC_ENABLE		0x40000000	/* Enable Data $ */
-+#define BRCM_IC_ENABLE		0x80000000	/* Enable Instruction $ */
-+#define BRCM_PFC_ENABLE		0x00400000	/* Obsolete? Enable PFC (at least on 4310) */
-+
-+/* PreFetch Cache aka Read Ahead Cache */
-+
-+#define PFC_CR0			0xff400000	/* control reg 0 */
-+#define PFC_CR1			0xff400004	/* control reg 1 */
-+
-+/* PFC operations */
-+#define PFC_I			0x00000001	/* Enable PFC use for instructions */
-+#define PFC_D			0x00000002	/* Enable PFC use for data */
-+#define PFC_PFI			0x00000004	/* Enable seq. prefetch for instructions */
-+#define PFC_PFD			0x00000008	/* Enable seq. prefetch for data */
-+#define PFC_CINV		0x00000010	/* Enable selective (i/d) cacheop flushing */
-+#define PFC_NCH			0x00000020	/* Disable flushing based on cacheops */
-+#define PFC_DPF			0x00000040	/* Enable directional prefetching */
-+#define PFC_FLUSH		0x00000100	/* Flush the PFC */
-+#define PFC_BRR			0x40000000	/* Bus error indication */
-+#define PFC_PWR			0x80000000	/* Disable power saving (clock gating) */
-+
-+/* Handy defaults */
-+#define PFC_DISABLED		0
-+#define PFC_AUTO			0xffffffff	/* auto select the default mode */
-+#define PFC_INST		(PFC_I | PFC_PFI | PFC_CINV)
-+#define PFC_INST_NOPF		(PFC_I | PFC_CINV)
-+#define PFC_DATA		(PFC_D | PFC_PFD | PFC_CINV)
-+#define PFC_DATA_NOPF		(PFC_D | PFC_CINV)
-+#define PFC_I_AND_D		(PFC_INST | PFC_DATA)
-+#define PFC_I_AND_D_NOPF	(PFC_INST_NOPF | PFC_DATA_NOPF)
-+
-+
-+/* 
-+ * These are the UART port assignments, expressed as offsets from the base
-+ * register.  These assignments should hold for any serial port based on
-+ * a 8250, 16450, or 16550(A).
-+ */
-+
-+#define UART_RX		0	/* In:  Receive buffer (DLAB=0) */
-+#define UART_TX		0	/* Out: Transmit buffer (DLAB=0) */
-+#define UART_DLL	0	/* Out: Divisor Latch Low (DLAB=1) */
-+#define UART_DLM	1	/* Out: Divisor Latch High (DLAB=1) */
-+#define UART_LCR	3	/* Out: Line Control Register */
-+#define UART_MCR	4	/* Out: Modem Control Register */
-+#define UART_LSR	5	/* In:  Line Status Register */
-+#define UART_MSR	6	/* In:  Modem Status Register */
-+#define UART_SCR	7	/* I/O: Scratch Register */
-+#define UART_LCR_DLAB	0x80	/* Divisor latch access bit */
-+#define UART_LCR_WLEN8	0x03	/* Wordlength: 8 bits */
-+#define UART_MCR_LOOP	0x10	/* Enable loopback test mode */
-+#define UART_LSR_THRE	0x20	/* Transmit-hold-register empty */
-+#define UART_LSR_RXRDY	0x01	/* Receiver ready */
-+
-+
-+#ifndef	_LANGUAGE_ASSEMBLY
-+
-+/*
-+ * Macros to access the system control coprocessor
-+ */
-+
-+#define MFC0(source, sel)					\
-+({								\
-+	int __res;						\
-+	__asm__ __volatile__(					\
-+	".set\tnoreorder\n\t"					\
-+	".set\tnoat\n\t"					\
-+	".word\t"STR(0x40010000 | ((source)<<11) | (sel))"\n\t"	\
-+	"move\t%0,$1\n\t"					\
-+	".set\tat\n\t"						\
-+	".set\treorder"						\
-+	:"=r" (__res)						\
-+	:							\
-+	:"$1");							\
-+	__res;							\
-+})
-+
-+#define MTC0(source, sel, value)				\
-+do {								\
-+	__asm__ __volatile__(					\
-+	".set\tnoreorder\n\t"					\
-+	".set\tnoat\n\t"					\
-+	"move\t$1,%z0\n\t"					\
-+	".word\t"STR(0x40810000 | ((source)<<11) | (sel))"\n\t"	\
-+	".set\tat\n\t"						\
-+	".set\treorder"						\
-+	:							\
-+	:"jr" (value)						\
-+	:"$1");							\
-+} while (0)
-+
-+#define get_c0_count()						\
-+({								\
-+	int __res;						\
-+	__asm__ __volatile__(					\
-+	".set\tnoreorder\n\t"					\
-+	".set\tnoat\n\t"					\
-+	"mfc0\t%0,$9\n\t"					\
-+	".set\tat\n\t"						\
-+	".set\treorder"						\
-+	:"=r" (__res));						\
-+	__res;							\
-+})
-+
-+static INLINE void icache_probe(uint32 config1, uint *size, uint *lsize)
-+{
-+	uint lsz, sets, ways;
-+
-+	/* Instruction Cache Size = Associativity * Line Size * Sets Per Way */
-+	if ((lsz = ((config1 & CONF1_IL_MASK) >> CONF1_IL_SHIFT)))
-+		lsz = CONF1_IL_BASE << lsz;
-+	sets = CONF1_IS_BASE << ((config1 & CONF1_IS_MASK) >> CONF1_IS_SHIFT);
-+	ways = CONF1_IA_BASE + ((config1 & CONF1_IA_MASK) >> CONF1_IA_SHIFT);
-+	*size = lsz * sets * ways;
-+	*lsize = lsz;
-+}
-+
-+static INLINE void dcache_probe(uint32 config1, uint *size, uint *lsize)
-+{
-+	uint lsz, sets, ways;
-+
-+	/* Data Cache Size = Associativity * Line Size * Sets Per Way */
-+	if ((lsz = ((config1 & CONF1_DL_MASK) >> CONF1_DL_SHIFT)))
-+		lsz = CONF1_DL_BASE << lsz;
-+	sets = CONF1_DS_BASE << ((config1 & CONF1_DS_MASK) >> CONF1_DS_SHIFT);
-+	ways = CONF1_DA_BASE + ((config1 & CONF1_DA_MASK) >> CONF1_DA_SHIFT);
-+	*size = lsz * sets * ways;
-+	*lsize = lsz;
-+}
-+
-+#define cache_op(base, op)			\
-+	__asm__ __volatile__("			\
-+		.set noreorder;			\
-+		.set mips3;			\
-+		cache %1, (%0);			\
-+		.set mips0;			\
-+		.set reorder"			\
-+		:				\
-+		: "r" (base),			\
-+		  "i" (op));
-+
-+#define cache_unroll4(base, delta, op)		\
-+	__asm__ __volatile__("			\
-+		.set noreorder;			\
-+		.set mips3;			\
-+		cache %1,0(%0);			\
-+		cache %1,delta(%0);		\
-+		cache %1,(2 * delta)(%0);	\
-+		cache %1,(3 * delta)(%0);	\
-+		.set mips0;			\
-+		.set reorder"			\
-+		:				\
-+		: "r" (base),			\
-+		  "i" (op));
-+
-+#endif /* !_LANGUAGE_ASSEMBLY */
-+
-+#endif	/* _MISPINC_H */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/nvports.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/nvports.h
---- linux-2.4.32/arch/mips/bcm947xx/include/nvports.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/nvports.h	2005-12-16 23:39:10.748824500 +0100
-@@ -0,0 +1,55 @@
-+/*
-+ * BCM53xx RoboSwitch utility functions
-+ *
-+ * Copyright (C) 2002 Broadcom Corporation
-+ * $Id$
-+ */
-+
-+#ifndef _nvports_h_
-+#define _nvports_h_
-+
-+#define uint32 unsigned long
-+#define uint16 unsigned short
-+#define uint unsigned int
-+#define uint8 unsigned char
-+#define uint64 unsigned long long
-+
-+enum FORCE_PORT {
-+	FORCE_OFF,
-+	FORCE_10H,
-+	FORCE_10F,
-+	FORCE_100H,
-+	FORCE_100F,
-+	FORCE_DOWN,
-+	POWER_OFF
-+};
-+
-+typedef struct _PORT_ATTRIBS
-+{
-+	uint 	autoneg;
-+	uint	force;
-+	uint	native;	
-+} PORT_ATTRIBS;
-+
-+extern uint
-+nvExistsPortAttrib(char *attrib, uint portno);
-+
-+extern int
-+nvExistsAnyForcePortAttrib(uint portno);
-+
-+extern void
-+nvSetPortAttrib(char *attrib, uint portno);
-+
-+extern void
-+nvUnsetPortAttrib(char *attrib, uint portno);
-+
-+extern void
-+nvUnsetAllForcePortAttrib(uint portno);
-+
-+extern PORT_ATTRIBS
-+nvGetSwitchPortAttribs(uint portno);
-+
-+#endif /* _nvports_h_ */
-+
-+
-+
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/osl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/osl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/osl.h	2005-12-16 23:39:10.748824500 +0100
-@@ -0,0 +1,42 @@
-+/*
-+ * OS Abstraction Layer
-+ * 
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.      
-+ *       
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ * $Id$
-+ */
-+
-+#ifndef _osl_h_
-+#define _osl_h_
-+
-+/* osl handle type forward declaration */
-+typedef struct os_handle osl_t;
-+
-+#if defined(linux)
-+#include <linux_osl.h>
-+#elif defined(NDIS)
-+#include <ndis_osl.h>
-+#elif defined(_CFE_)
-+#include <cfe_osl.h>
-+#elif defined(_HNDRTE_)
-+#include <hndrte_osl.h>
-+#elif defined(_MINOSL_)
-+#include <min_osl.h>
-+#elif PMON
-+#include <pmon_osl.h>
-+#elif defined(MACOSX)
-+#include <macosx_osl.h>
-+#else
-+#error "Unsupported OSL requested"
-+#endif
-+
-+/* handy */
-+#define	SET_REG(r, mask, val)	W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
-+#define	MAXPRIO		7	/* 0-7 */
-+
-+#endif	/* _osl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/pcicfg.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/pcicfg.h
---- linux-2.4.32/arch/mips/bcm947xx/include/pcicfg.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/pcicfg.h	2005-12-16 23:39:10.752824750 +0100
-@@ -0,0 +1,451 @@
-+/*
-+ * pcicfg.h: PCI configuration  constants and structures.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
-+
-+#ifndef	_h_pci_
-+#define	_h_pci_
-+
-+/* The following inside ifndef's so we don't collide with NTDDK.H */
-+#ifndef PCI_MAX_BUS
-+#define PCI_MAX_BUS		0x100
-+#endif
-+#ifndef PCI_MAX_DEVICES
-+#define PCI_MAX_DEVICES		0x20
-+#endif
-+#ifndef PCI_MAX_FUNCTION
-+#define PCI_MAX_FUNCTION	0x8
-+#endif
-+
-+#ifndef PCI_INVALID_VENDORID
-+#define PCI_INVALID_VENDORID	0xffff
-+#endif
-+#ifndef PCI_INVALID_DEVICEID
-+#define PCI_INVALID_DEVICEID	0xffff
-+#endif
-+
-+
-+/* Convert between bus-slot-function-register and config addresses */
-+
-+#define	PCICFG_BUS_SHIFT	16	/* Bus shift */
-+#define	PCICFG_SLOT_SHIFT	11	/* Slot shift */
-+#define	PCICFG_FUN_SHIFT	8	/* Function shift */
-+#define	PCICFG_OFF_SHIFT	0	/* Register shift */
-+
-+#define	PCICFG_BUS_MASK		0xff	/* Bus mask */
-+#define	PCICFG_SLOT_MASK	0x1f	/* Slot mask */
-+#define	PCICFG_FUN_MASK		7	/* Function mask */
-+#define	PCICFG_OFF_MASK		0xff	/* Bus mask */
-+
-+#define	PCI_CONFIG_ADDR(b, s, f, o)					\
-+		((((b) & PCICFG_BUS_MASK) << PCICFG_BUS_SHIFT)		\
-+		 | (((s) & PCICFG_SLOT_MASK) << PCICFG_SLOT_SHIFT)	\
-+		 | (((f) & PCICFG_FUN_MASK) << PCICFG_FUN_SHIFT)	\
-+		 | (((o) & PCICFG_OFF_MASK) << PCICFG_OFF_SHIFT))
-+
-+#define	PCI_CONFIG_BUS(a)	(((a) >> PCICFG_BUS_SHIFT) & PCICFG_BUS_MASK)
-+#define	PCI_CONFIG_SLOT(a)	(((a) >> PCICFG_SLOT_SHIFT) & PCICFG_SLOT_MASK)
-+#define	PCI_CONFIG_FUN(a)	(((a) >> PCICFG_FUN_SHIFT) & PCICFG_FUN_MASK)
-+#define	PCI_CONFIG_OFF(a)	(((a) >> PCICFG_OFF_SHIFT) & PCICFG_OFF_MASK)
-+
-+/* PCIE Config space accessing MACROS*/
-+
-+#define	PCIECFG_BUS_SHIFT	24	/* Bus shift */
-+#define	PCIECFG_SLOT_SHIFT	19	/* Slot/Device shift */
-+#define	PCIECFG_FUN_SHIFT	16	/* Function shift */
-+#define	PCIECFG_OFF_SHIFT	0	/* Register shift */
-+
-+#define	PCIECFG_BUS_MASK	0xff	/* Bus mask */
-+#define	PCIECFG_SLOT_MASK	0x1f	/* Slot/Device mask */
-+#define	PCIECFG_FUN_MASK	7	/* Function mask */
-+#define	PCIECFG_OFF_MASK	0x3ff	/* Register mask */
-+
-+#define	PCIE_CONFIG_ADDR(b, s, f, o)					\
-+		((((b) & PCIECFG_BUS_MASK) << PCIECFG_BUS_SHIFT)		\
-+		 | (((s) & PCIECFG_SLOT_MASK) << PCIECFG_SLOT_SHIFT)	\
-+		 | (((f) & PCIECFG_FUN_MASK) << PCIECFG_FUN_SHIFT)	\
-+		 | (((o) & PCIECFG_OFF_MASK) << PCIECFG_OFF_SHIFT))
-+
-+#define	PCIE_CONFIG_BUS(a)	(((a) >> PCIECFG_BUS_SHIFT) & PCIECFG_BUS_MASK)
-+#define	PCIE_CONFIG_SLOT(a)	(((a) >> PCIECFG_SLOT_SHIFT) & PCIECFG_SLOT_MASK)
-+#define	PCIE_CONFIG_FUN(a)	(((a) >> PCIECFG_FUN_SHIFT) & PCIECFG_FUN_MASK)
-+#define	PCIE_CONFIG_OFF(a)	(((a) >> PCIECFG_OFF_SHIFT) & PCIECFG_OFF_MASK)
-+
-+	
-+/* The actual config space */
-+
-+#define	PCI_BAR_MAX		6
-+
-+#define	PCI_ROM_BAR		8
-+
-+#define	PCR_RSVDA_MAX		2
-+
-+/* pci config status reg has a bit to indicate that capability ptr is present*/
-+
-+#define PCI_CAPPTR_PRESENT	0x0010
-+
-+typedef struct _pci_config_regs {
-+    unsigned short	vendor;
-+    unsigned short	device;
-+    unsigned short	command;
-+    unsigned short	status;
-+    unsigned char	rev_id;
-+    unsigned char	prog_if;
-+    unsigned char	sub_class;
-+    unsigned char	base_class;
-+    unsigned char	cache_line_size;
-+    unsigned char	latency_timer;
-+    unsigned char	header_type;
-+    unsigned char	bist;
-+    unsigned long	base[PCI_BAR_MAX];
-+    unsigned long	cardbus_cis;
-+    unsigned short	subsys_vendor;
-+    unsigned short	subsys_id;
-+    unsigned long	baserom;
-+    unsigned long	rsvd_a[PCR_RSVDA_MAX];
-+    unsigned char	int_line;
-+    unsigned char	int_pin;
-+    unsigned char	min_gnt;
-+    unsigned char	max_lat;
-+    unsigned char	dev_dep[192];
-+} pci_config_regs;
-+
-+#define	SZPCR		(sizeof (pci_config_regs))
-+#define	MINSZPCR	64		/* offsetof (dev_dep[0] */
-+
-+/* A structure for the config registers is nice, but in most
-+ * systems the config space is not memory mapped, so we need
-+ * filed offsetts. :-(
-+ */
-+#define	PCI_CFG_VID		0
-+#define	PCI_CFG_DID		2
-+#define	PCI_CFG_CMD		4
-+#define	PCI_CFG_STAT		6
-+#define	PCI_CFG_REV		8
-+#define	PCI_CFG_PROGIF		9
-+#define	PCI_CFG_SUBCL		0xa
-+#define	PCI_CFG_BASECL		0xb
-+#define	PCI_CFG_CLSZ		0xc
-+#define	PCI_CFG_LATTIM		0xd
-+#define	PCI_CFG_HDR		0xe
-+#define	PCI_CFG_BIST		0xf
-+#define	PCI_CFG_BAR0		0x10
-+#define	PCI_CFG_BAR1		0x14
-+#define	PCI_CFG_BAR2		0x18
-+#define	PCI_CFG_BAR3		0x1c
-+#define	PCI_CFG_BAR4		0x20
-+#define	PCI_CFG_BAR5		0x24
-+#define	PCI_CFG_CIS		0x28
-+#define	PCI_CFG_SVID		0x2c
-+#define	PCI_CFG_SSID		0x2e
-+#define	PCI_CFG_ROMBAR		0x30
-+#define PCI_CFG_CAPPTR		0x34
-+#define	PCI_CFG_INT		0x3c
-+#define	PCI_CFG_PIN		0x3d
-+#define	PCI_CFG_MINGNT		0x3e
-+#define	PCI_CFG_MAXLAT		0x3f
-+
-+/* Classes and subclasses */
-+
-+typedef enum {
-+    PCI_CLASS_OLD = 0,
-+    PCI_CLASS_DASDI,
-+    PCI_CLASS_NET,
-+    PCI_CLASS_DISPLAY,
-+    PCI_CLASS_MMEDIA,
-+    PCI_CLASS_MEMORY,
-+    PCI_CLASS_BRIDGE,
-+    PCI_CLASS_COMM,
-+    PCI_CLASS_BASE,
-+    PCI_CLASS_INPUT,
-+    PCI_CLASS_DOCK,
-+    PCI_CLASS_CPU,
-+    PCI_CLASS_SERIAL,
-+    PCI_CLASS_INTELLIGENT = 0xe,
-+    PCI_CLASS_SATELLITE,
-+    PCI_CLASS_CRYPT,
-+    PCI_CLASS_DSP,
-+    PCI_CLASS_MAX
-+} pci_classes;
-+
-+typedef enum {
-+    PCI_DASDI_SCSI,
-+    PCI_DASDI_IDE,
-+    PCI_DASDI_FLOPPY,
-+    PCI_DASDI_IPI,
-+    PCI_DASDI_RAID,
-+    PCI_DASDI_OTHER = 0x80
-+} pci_dasdi_subclasses;
-+
-+typedef enum {
-+    PCI_NET_ETHER,
-+    PCI_NET_TOKEN,
-+    PCI_NET_FDDI,
-+    PCI_NET_ATM,
-+    PCI_NET_OTHER = 0x80
-+} pci_net_subclasses;
-+
-+typedef enum {
-+    PCI_DISPLAY_VGA,
-+    PCI_DISPLAY_XGA,
-+    PCI_DISPLAY_3D,
-+    PCI_DISPLAY_OTHER = 0x80
-+} pci_display_subclasses;
-+
-+typedef enum {
-+    PCI_MMEDIA_VIDEO,
-+    PCI_MMEDIA_AUDIO,
-+    PCI_MMEDIA_PHONE,
-+    PCI_MEDIA_OTHER = 0x80
-+} pci_mmedia_subclasses;
-+
-+typedef enum {
-+    PCI_MEMORY_RAM,
-+    PCI_MEMORY_FLASH,
-+    PCI_MEMORY_OTHER = 0x80
-+} pci_memory_subclasses;
-+
-+typedef enum {
-+    PCI_BRIDGE_HOST,
-+    PCI_BRIDGE_ISA,
-+    PCI_BRIDGE_EISA,
-+    PCI_BRIDGE_MC,
-+    PCI_BRIDGE_PCI,
-+    PCI_BRIDGE_PCMCIA,
-+    PCI_BRIDGE_NUBUS,
-+    PCI_BRIDGE_CARDBUS,
-+    PCI_BRIDGE_RACEWAY,
-+    PCI_BRIDGE_OTHER = 0x80
-+} pci_bridge_subclasses;
-+
-+typedef enum {
-+    PCI_COMM_UART,
-+    PCI_COMM_PARALLEL,
-+    PCI_COMM_MULTIUART,
-+    PCI_COMM_MODEM,
-+    PCI_COMM_OTHER = 0x80
-+} pci_comm_subclasses;
-+
-+typedef enum {
-+    PCI_BASE_PIC,
-+    PCI_BASE_DMA,
-+    PCI_BASE_TIMER,
-+    PCI_BASE_RTC,
-+    PCI_BASE_PCI_HOTPLUG,
-+    PCI_BASE_OTHER = 0x80
-+} pci_base_subclasses;
-+
-+typedef enum {
-+    PCI_INPUT_KBD,
-+    PCI_INPUT_PEN,
-+    PCI_INPUT_MOUSE,
-+    PCI_INPUT_SCANNER,
-+    PCI_INPUT_GAMEPORT,
-+    PCI_INPUT_OTHER = 0x80
-+} pci_input_subclasses;
-+
-+typedef enum {
-+    PCI_DOCK_GENERIC,
-+    PCI_DOCK_OTHER = 0x80
-+} pci_dock_subclasses;
-+
-+typedef enum {
-+    PCI_CPU_386,
-+    PCI_CPU_486,
-+    PCI_CPU_PENTIUM,
-+    PCI_CPU_ALPHA = 0x10,
-+    PCI_CPU_POWERPC = 0x20,
-+    PCI_CPU_MIPS = 0x30,
-+    PCI_CPU_COPROC = 0x40,
-+    PCI_CPU_OTHER = 0x80
-+} pci_cpu_subclasses;
-+
-+typedef enum {
-+    PCI_SERIAL_IEEE1394,
-+    PCI_SERIAL_ACCESS,
-+    PCI_SERIAL_SSA,
-+    PCI_SERIAL_USB,
-+    PCI_SERIAL_FIBER,
-+    PCI_SERIAL_SMBUS,
-+    PCI_SERIAL_OTHER = 0x80
-+} pci_serial_subclasses;
-+
-+typedef enum {
-+    PCI_INTELLIGENT_I2O,
-+} pci_intelligent_subclasses;
-+
-+typedef enum {
-+    PCI_SATELLITE_TV,
-+    PCI_SATELLITE_AUDIO,
-+    PCI_SATELLITE_VOICE,
-+    PCI_SATELLITE_DATA,
-+    PCI_SATELLITE_OTHER = 0x80
-+} pci_satellite_subclasses;
-+
-+typedef enum {
-+    PCI_CRYPT_NETWORK,
-+    PCI_CRYPT_ENTERTAINMENT,
-+    PCI_CRYPT_OTHER = 0x80
-+} pci_crypt_subclasses;
-+
-+typedef enum {
-+    PCI_DSP_DPIO,
-+    PCI_DSP_OTHER = 0x80
-+} pci_dsp_subclasses;
-+
-+/* Header types */
-+typedef enum {
-+	PCI_HEADER_NORMAL,
-+	PCI_HEADER_BRIDGE,
-+	PCI_HEADER_CARDBUS
-+} pci_header_types;
-+
-+
-+/* Overlay for a PCI-to-PCI bridge */
-+
-+#define	PPB_RSVDA_MAX		2
-+#define	PPB_RSVDD_MAX		8
-+
-+typedef struct _ppb_config_regs {
-+    unsigned short	vendor;
-+    unsigned short	device;
-+    unsigned short	command;
-+    unsigned short	status;
-+    unsigned char	rev_id;
-+    unsigned char	prog_if;
-+    unsigned char	sub_class;
-+    unsigned char	base_class;
-+    unsigned char	cache_line_size;
-+    unsigned char	latency_timer;
-+    unsigned char	header_type;
-+    unsigned char	bist;
-+    unsigned long	rsvd_a[PPB_RSVDA_MAX];
-+    unsigned char	prim_bus;
-+    unsigned char	sec_bus;
-+    unsigned char	sub_bus;
-+    unsigned char	sec_lat;
-+    unsigned char	io_base;
-+    unsigned char	io_lim;
-+    unsigned short	sec_status;
-+    unsigned short	mem_base;
-+    unsigned short	mem_lim;
-+    unsigned short	pf_mem_base;
-+    unsigned short	pf_mem_lim;
-+    unsigned long	pf_mem_base_hi;
-+    unsigned long	pf_mem_lim_hi;
-+    unsigned short	io_base_hi;
-+    unsigned short	io_lim_hi;
-+    unsigned short	subsys_vendor;
-+    unsigned short	subsys_id;
-+    unsigned long	rsvd_b;
-+    unsigned char	rsvd_c;
-+    unsigned char	int_pin;
-+    unsigned short	bridge_ctrl;
-+    unsigned char	chip_ctrl;
-+    unsigned char	diag_ctrl;
-+    unsigned short	arb_ctrl;
-+    unsigned long	rsvd_d[PPB_RSVDD_MAX];
-+    unsigned char	dev_dep[192];
-+} ppb_config_regs;
-+
-+
-+/* PCI CAPABILITY DEFINES */
-+#define PCI_CAP_POWERMGMTCAP_ID		0x01
-+#define PCI_CAP_MSICAP_ID		0x05
-+#define PCI_CAP_PCIECAP_ID		0x10
++/* Values in C_EXC */
++#define EXC_INT			0
++#define EXC_TLBM		1
++#define EXC_TLBL		2
++#define EXC_TLBS		3
++#define EXC_AEL			4
++#define EXC_AES			5
++#define EXC_IBE			6
++#define EXC_DBE			7
++#define EXC_SYS			8
++#define EXC_BPT			9
++#define EXC_RI			10
++#define EXC_CU			11
++#define EXC_OV			12
++#define EXC_TR			13
++#define EXC_WATCH		23
++#define EXC_MCHK		24
 +
-+/* Data structure to define the Message Signalled Interrupt facility 
-+ * Valid for PCI and PCIE configurations */
-+typedef struct _pciconfig_cap_msi {
-+	unsigned char capID;
-+	unsigned char nextptr;
-+	unsigned short msgctrl;
-+	unsigned int msgaddr;
-+} pciconfig_cap_msi;
 +
-+/* Data structure to define the Power managment facility
-+ * Valid for PCI and PCIE configurations */
-+typedef struct _pciconfig_cap_pwrmgmt {
-+	unsigned char capID;
-+	unsigned char nextptr;
-+	unsigned short pme_cap;
-+	unsigned short  pme_sts_ctrl; 
-+	unsigned char  pme_bridge_ext;
-+	unsigned char  data;
-+} pciconfig_cap_pwrmgmt;
++/*
++ * Bits in the cp0 config register.
++ */
++#define CONF_CM_CACHABLE_NO_WA		0
++#define CONF_CM_CACHABLE_WA		1
++#define CONF_CM_UNCACHED		2
++#define CONF_CM_CACHABLE_NONCOHERENT	3
++#define CONF_CM_CACHABLE_CE		4
++#define CONF_CM_CACHABLE_COW		5
++#define CONF_CM_CACHABLE_CUW		6
++#define CONF_CM_CACHABLE_ACCELERATED	7
++#define CONF_CM_CMASK			7
++#define CONF_CU				(_ULCAST_(1) <<  3)
++#define CONF_DB				(_ULCAST_(1) <<  4)
++#define CONF_IB				(_ULCAST_(1) <<  5)
++#define CONF_SE				(_ULCAST_(1) << 12)
++#define CONF_SC				(_ULCAST_(1) << 17)
++#define CONF_AC				(_ULCAST_(1) << 23)
++#define CONF_HALT			(_ULCAST_(1) << 25)
 +
-+/* Data structure to define the PCIE capability */
-+typedef struct _pciconfig_cap_pcie {
-+	unsigned char capID;
-+	unsigned char nextptr;
-+	unsigned short pcie_cap;
-+	unsigned int  dev_cap;
-+	unsigned short dev_ctrl;
-+	unsigned short dev_status;
-+	unsigned int  link_cap;
-+	unsigned short link_ctrl;
-+	unsigned short link_status;
-+} pciconfig_cap_pcie;
 +
-+/* PCIE Enhanced CAPABILITY DEFINES */
-+#define PCIE_EXTCFG_OFFSET	0x100
-+#define PCIE_ADVERRREP_CAPID	0x0001
-+#define PCIE_VC_CAPID		0x0002
-+#define PCIE_DEVSNUM_CAPID	0x0003
-+#define PCIE_PWRBUDGET_CAPID	0x0004
++/*
++ * Bits in the cp0 config register select 1.
++ */
++#define CONF1_FP		0x00000001	/* FPU present */
++#define CONF1_EP		0x00000002	/* EJTAG present */
++#define CONF1_CA		0x00000004	/* mips16 implemented */
++#define CONF1_WR		0x00000008	/* Watch registers present */
++#define CONF1_PC		0x00000010	/* Performance counters present */
++#define CONF1_DA_SHIFT		7		/* D$ associativity */
++#define CONF1_DA_MASK		0x00000380
++#define CONF1_DA_BASE		1
++#define CONF1_DL_SHIFT		10		/* D$ line size */
++#define CONF1_DL_MASK		0x00001c00
++#define CONF1_DL_BASE		2
++#define CONF1_DS_SHIFT		13		/* D$ sets/way */
++#define CONF1_DS_MASK		0x0000e000
++#define CONF1_DS_BASE		64
++#define CONF1_IA_SHIFT		16		/* I$ associativity */
++#define CONF1_IA_MASK		0x00070000
++#define CONF1_IA_BASE		1
++#define CONF1_IL_SHIFT		19		/* I$ line size */
++#define CONF1_IL_MASK		0x00380000
++#define CONF1_IL_BASE		2
++#define CONF1_IS_SHIFT		22		/* Instruction cache sets/way */
++#define CONF1_IS_MASK		0x01c00000
++#define CONF1_IS_BASE		64
++#define CONF1_MS_MASK		0x7e000000	/* Number of tlb entries */
++#define CONF1_MS_SHIFT		25
 +
-+/* Header to define the PCIE specific capabilities in the extended config space */
-+typedef struct _pcie_enhanced_caphdr {
-+	unsigned short capID;
-+	unsigned short cap_ver : 4;
-+	unsigned short next_ptr : 12;
-+} pcie_enhanced_caphdr;
++/* PRID register */
++#define PRID_COPT_MASK		0xff000000
++#define PRID_COMP_MASK		0x00ff0000
++#define PRID_IMP_MASK		0x0000ff00
++#define PRID_REV_MASK		0x000000ff
 +
++#define PRID_COMP_LEGACY	0x000000
++#define PRID_COMP_MIPS		0x010000
++#define PRID_COMP_BROADCOM	0x020000
++#define PRID_COMP_ALCHEMY	0x030000
++#define PRID_COMP_SIBYTE	0x040000
++#define PRID_IMP_BCM4710	0x4000
++#define PRID_IMP_BCM3302	0x9000
++#define PRID_IMP_BCM3303	0x9100
 +
-+/* Everything below is BRCM HND proprietary */
++#define PRID_IMP_UNKNOWN	0xff00
 +
-+#define	PCI_BAR0_WIN		0x80	/* backplane addres space accessed by BAR0 */
-+#define	PCI_BAR1_WIN		0x84	/* backplane addres space accessed by BAR1 */
-+#define	PCI_SPROM_CONTROL	0x88	/* sprom property control */
-+#define	PCI_BAR1_CONTROL	0x8c	/* BAR1 region burst control */
-+#define	PCI_INT_STATUS		0x90	/* PCI and other cores interrupts */
-+#define	PCI_INT_MASK		0x94	/* mask of PCI and other cores interrupts */
-+#define PCI_TO_SB_MB		0x98	/* signal backplane interrupts */
-+#define PCI_BACKPLANE_ADDR	0xA0	/* address an arbitrary location on the system backplane */
-+#define PCI_BACKPLANE_DATA	0xA4	/* data at the location specified by above address register */
-+#define	PCI_GPIO_IN		0xb0	/* pci config space gpio input (>=rev3) */
-+#define	PCI_GPIO_OUT		0xb4	/* pci config space gpio output (>=rev3) */
-+#define	PCI_GPIO_OUTEN		0xb8	/* pci config space gpio output enable (>=rev3) */
++#define BCM330X(id) \
++	(((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3302)) \
++	|| ((id & (PRID_COMP_MASK | PRID_IMP_MASK)) == (PRID_COMP_BROADCOM | PRID_IMP_BCM3303)))
 +
-+#define	PCI_BAR0_SPROM_OFFSET	(4 * 1024)	/* bar0 + 4K accesses external sprom */
-+#define	PCI_BAR0_PCIREGS_OFFSET	(6 * 1024)	/* bar0 + 6K accesses pci core registers */
++/* Bits in C0_BROADCOM */
++#define BRCM_PFC_AVAIL		0x20000000	/* PFC is available */
++#define BRCM_DC_ENABLE		0x40000000	/* Enable Data $ */
++#define BRCM_IC_ENABLE		0x80000000	/* Enable Instruction $ */
++#define BRCM_PFC_ENABLE		0x00400000	/* Obsolete? Enable PFC (at least on 4310) */
 +
-+/* PCI_INT_STATUS */
-+#define	PCI_SBIM_STATUS_SERR	0x4	/* backplane SBErr interrupt status */
++/* PreFetch Cache aka Read Ahead Cache */
 +
-+/* PCI_INT_MASK */
-+#define	PCI_SBIM_SHIFT		8	/* backplane core interrupt mask bits offset */
-+#define	PCI_SBIM_MASK		0xff00	/* backplane core interrupt mask */
-+#define	PCI_SBIM_MASK_SERR	0x4	/* backplane SBErr interrupt mask */
++#define PFC_CR0			0xff400000	/* control reg 0 */
++#define PFC_CR1			0xff400004	/* control reg 1 */
 +
-+/* PCI_SPROM_CONTROL */
-+#define	SPROM_BLANK		0x04  	/* indicating a blank sprom */
-+#define SPROM_WRITEEN		0x10	/* sprom write enable */
-+#define SPROM_BOOTROM_WE	0x20	/* external bootrom write enable */
++/* PFC operations */
++#define PFC_I			0x00000001	/* Enable PFC use for instructions */
++#define PFC_D			0x00000002	/* Enable PFC use for data */
++#define PFC_PFI			0x00000004	/* Enable seq. prefetch for instructions */
++#define PFC_PFD			0x00000008	/* Enable seq. prefetch for data */
++#define PFC_CINV		0x00000010	/* Enable selective (i/d) cacheop flushing */
++#define PFC_NCH			0x00000020	/* Disable flushing based on cacheops */
++#define PFC_DPF			0x00000040	/* Enable directional prefetching */
++#define PFC_FLUSH		0x00000100	/* Flush the PFC */
++#define PFC_BRR			0x40000000	/* Bus error indication */
++#define PFC_PWR			0x80000000	/* Disable power saving (clock gating) */
 +
-+#define	SPROM_SIZE		256	/* sprom size in 16-bit */
-+#define SPROM_CRC_RANGE		64	/* crc cover range in 16-bit */
++/* Handy defaults */
++#define PFC_DISABLED		0
++#define PFC_AUTO			0xffffffff	/* auto select the default mode */
++#define PFC_INST		(PFC_I | PFC_PFI | PFC_CINV)
++#define PFC_INST_NOPF		(PFC_I | PFC_CINV)
++#define PFC_DATA		(PFC_D | PFC_PFD | PFC_CINV)
++#define PFC_DATA_NOPF		(PFC_D | PFC_CINV)
++#define PFC_I_AND_D		(PFC_INST | PFC_DATA)
++#define PFC_I_AND_D_NOPF	(PFC_INST_NOPF | PFC_DATA_NOPF)
 +
-+/* PCI_CFG_CMD_STAT */
-+#define PCI_CFG_CMD_STAT_TA	0x08000000	/* target abort status */
 +
-+#endif
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/pmon_osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/pmon_osl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/pmon_osl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/pmon_osl.h	2005-12-16 23:39:10.752824750 +0100
-@@ -0,0 +1,126 @@
-+/*
-+ * MIPS PMON boot loader OS Abstraction Layer.
-+ *
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.                      
-+ *                                           
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;         
-+ * the contents of this file may not be disclosed to third parties, copied      
-+ * or duplicated in any form, in whole or in part, without the prior            
-+ * written permission of Broadcom Corporation.                                  
-+ * $Id$
++/* 
++ * These are the UART port assignments, expressed as offsets from the base
++ * register.  These assignments should hold for any serial port based on
++ * a 8250, 16450, or 16550(A).
 + */
 +
-+#ifndef _pmon_osl_h_
-+#define _pmon_osl_h_
++#define UART_RX		0	/* In:  Receive buffer (DLAB=0) */
++#define UART_TX		0	/* Out: Transmit buffer (DLAB=0) */
++#define UART_DLL	0	/* Out: Divisor Latch Low (DLAB=1) */
++#define UART_DLM	1	/* Out: Divisor Latch High (DLAB=1) */
++#define UART_LCR	3	/* Out: Line Control Register */
++#define UART_MCR	4	/* Out: Modem Control Register */
++#define UART_LSR	5	/* In:  Line Status Register */
++#define UART_MSR	6	/* In:  Modem Status Register */
++#define UART_SCR	7	/* I/O: Scratch Register */
++#define UART_LCR_DLAB	0x80	/* Divisor latch access bit */
++#define UART_LCR_WLEN8	0x03	/* Wordlength: 8 bits */
++#define UART_MCR_LOOP	0x10	/* Enable loopback test mode */
++#define UART_LSR_THRE	0x20	/* Transmit-hold-register empty */
++#define UART_LSR_RXRDY	0x01	/* Receiver ready */
 +
-+#include <typedefs.h>
-+#include <mips.h>
-+#include <string.h>
-+#include <utypes.h>
 +
-+extern int printf(char *fmt,...);
-+extern int sprintf(char *dst,char *fmt,...);
++#ifndef	_LANGUAGE_ASSEMBLY
 +
-+#define	OSL_UNCACHED(va)	phy2k1(log2phy((va)))
-+#define	REG_MAP(pa, size)	phy2k1((pa))
-+#define	REG_UNMAP(va)		/* nop */
++/*
++ * Macros to access the system control coprocessor
++ */
 +
-+/* Common macros */
++#define MFC0(source, sel)					\
++({								\
++	int __res;						\
++	__asm__ __volatile__(					\
++	".set\tnoreorder\n\t"					\
++	".set\tnoat\n\t"					\
++	".word\t"STR(0x40010000 | ((source)<<11) | (sel))"\n\t"	\
++	"move\t%0,$1\n\t"					\
++	".set\tat\n\t"						\
++	".set\treorder"						\
++	:"=r" (__res)						\
++	:							\
++	:"$1");							\
++	__res;							\
++})
 +
-+#define BUSPROBE(val, addr) ((val) = *(addr))
++#define MTC0(source, sel, value)				\
++do {								\
++	__asm__ __volatile__(					\
++	".set\tnoreorder\n\t"					\
++	".set\tnoat\n\t"					\
++	"move\t$1,%z0\n\t"					\
++	".word\t"STR(0x40810000 | ((source)<<11) | (sel))"\n\t"	\
++	".set\tat\n\t"						\
++	".set\treorder"						\
++	:							\
++	:"jr" (value)						\
++	:"$1");							\
++} while (0)
 +
-+#define	ASSERT(exp)
++#define get_c0_count()						\
++({								\
++	int __res;						\
++	__asm__ __volatile__(					\
++	".set\tnoreorder\n\t"					\
++	".set\tnoat\n\t"					\
++	"mfc0\t%0,$9\n\t"					\
++	".set\tat\n\t"						\
++	".set\treorder"						\
++	:"=r" (__res));						\
++	__res;							\
++})
 +
-+#define	OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) bzero(buf, size)
-+#define	OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size)
++static INLINE void icache_probe(uint32 config1, uint *size, uint *lsize)
++{
++	uint lsz, sets, ways;
 +
-+/* kludge */
-+#define	OSL_PCI_READ_CONFIG(loc, offset, size)	((offset == 8)? 0: 0xffffffff)
-+#define	OSL_PCI_WRITE_CONFIG(loc, offset, size, val)	ASSERT(0)
++	/* Instruction Cache Size = Associativity * Line Size * Sets Per Way */
++	if ((lsz = ((config1 & CONF1_IL_MASK) >> CONF1_IL_SHIFT)))
++		lsz = CONF1_IL_BASE << lsz;
++	sets = CONF1_IS_BASE << ((config1 & CONF1_IS_MASK) >> CONF1_IS_SHIFT);
++	ways = CONF1_IA_BASE + ((config1 & CONF1_IA_MASK) >> CONF1_IA_SHIFT);
++	*size = lsz * sets * ways;
++	*lsize = lsz;
++}
 +
-+#define wreg32(r,v)	(*(volatile uint32 *)(r) = (v))
-+#define rreg32(r)	(*(volatile uint32 *)(r))
-+#ifdef IL_BIGENDIAN
-+#define wreg16(r,v)	(*(volatile uint16 *)((uint32)r^2) = (v))
-+#define rreg16(r)	(*(volatile uint16 *)((uint32)r^2))
-+#else
-+#define wreg16(r,v)	(*(volatile uint16 *)(r) = (v))
-+#define rreg16(r)	(*(volatile uint16 *)(r))
-+#endif
++static INLINE void dcache_probe(uint32 config1, uint *size, uint *lsize)
++{
++	uint lsz, sets, ways;
 +
-+#include <memory.h>
-+#define	bcopy(src, dst, len)	memcpy(dst, src, len)
-+#define	bcmp(b1, b2, len)	memcmp(b1, b2, len)
-+#define	bzero(b, len)		memset(b, '\0', len)
++	/* Data Cache Size = Associativity * Line Size * Sets Per Way */
++	if ((lsz = ((config1 & CONF1_DL_MASK) >> CONF1_DL_SHIFT)))
++		lsz = CONF1_DL_BASE << lsz;
++	sets = CONF1_DS_BASE << ((config1 & CONF1_DS_MASK) >> CONF1_DS_SHIFT);
++	ways = CONF1_DA_BASE + ((config1 & CONF1_DA_MASK) >> CONF1_DA_SHIFT);
++	*size = lsz * sets * ways;
++	*lsize = lsz;
++}
 +
-+/* register access macros */
-+#define	R_REG(r)	((sizeof *(r) == sizeof (uint32))? rreg32(r): rreg16(r))
-+#define	W_REG(r,v)	((sizeof *(r) == sizeof (uint32))? wreg32(r,(uint32)v): wreg16(r,(uint16)v))
-+#define	AND_REG(r, v)	W_REG((r), R_REG(r) & (v))
-+#define	OR_REG(r, v)	W_REG((r), R_REG(r) | (v))
++#define cache_op(base, op)			\
++	__asm__ __volatile__("			\
++		.set noreorder;			\
++		.set mips3;			\
++		cache %1, (%0);			\
++		.set mips0;			\
++		.set reorder"			\
++		:				\
++		: "r" (base),			\
++		  "i" (op));
 +
-+#define	R_SM(r)			*(r)
-+#define	W_SM(r, v)		(*(r) = (v))
-+#define	BZERO_SM(r, len)	memset(r, '\0', len)
-+
-+/* Host/Bus architecture specific swap. Noop for little endian systems, possible swap on big endian */
-+#define BUS_SWAP32(v)	(v)
-+
-+#define	OSL_DELAY(usec)		delay_us(usec)
-+extern void delay_us(uint usec);
-+
-+#define OSL_GETCYCLES(x) ((x) = 0)
-+
-+#define osl_attach(pdev)	(pdev)
-+#define osl_detach(osh)
-+
-+#define	MALLOC(osh, size)	malloc(size)
-+#define	MFREE(osh, addr, size)	free(addr)
-+#define	MALLOCED(osh)		(0)
-+#define	MALLOC_DUMP(osh, buf, sz)
-+#define	MALLOC_FAILED(osh)
-+extern void *malloc();
-+extern void free(void *addr);
-+
-+#define	DMA_CONSISTENT_ALIGN	sizeof (int)
-+#define	DMA_ALLOC_CONSISTENT(osh, size, pap)	et_dma_alloc_consistent(osh, size, pap)
-+#define	DMA_FREE_CONSISTENT(osh, va, size, pa)
-+extern void* et_dma_alloc_consistent(void *osh, uint size, ulong *pap);
-+#define	DMA_TX 0
-+#define	DMA_RX 1
-+
-+#define	DMA_MAP(osh, va, size, direction, p)	osl_dma_map(osh, (void*)va, size, direction)
-+#define	DMA_UNMAP(osh, pa, size, direction, p)	/* nop */
-+extern void* osl_dma_map(void *osh, void *va, uint size, uint direction);
-+
-+struct lbuf {
-+	struct lbuf *next;	/* pointer to next lbuf on freelist */
-+	uchar *buf;		/* pointer to buffer */
-+	uint len;		/* nbytes of data */
-+};
++#define cache_unroll4(base, delta, op)		\
++	__asm__ __volatile__("			\
++		.set noreorder;			\
++		.set mips3;			\
++		cache %1,0(%0);			\
++		cache %1,delta(%0);		\
++		cache %1,(2 * delta)(%0);	\
++		cache %1,(3 * delta)(%0);	\
++		.set mips0;			\
++		.set reorder"			\
++		:				\
++		: "r" (base),			\
++		  "i" (op));
 +
-+/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */
-+#define	PKTBUFSZ	2048
++#endif /* !_LANGUAGE_ASSEMBLY */
 +
-+/* packet primitives */
-+#define	PKTGET(drv, len, send)		et_pktget(drv, len, send)
-+#define	PKTFREE(drv, lb, send)		et_pktfree(drv, (struct lbuf*)lb, send)
-+#define	PKTDATA(drv, lb)		((uchar*)OSL_UNCACHED(((struct lbuf*)lb)->buf))
-+#define	PKTLEN(drv, lb)			((struct lbuf*)lb)->len
-+#define PKTHEADROOM(drv, lb)		(0)
-+#define PKTTAILROOM(drv, lb)		(0)
-+#define	PKTNEXT(drv, lb)		NULL
-+#define	PKTSETNEXT(lb, x)		ASSERT(0)
-+#define	PKTSETLEN(drv, lb, bytes)	((struct lbuf*)lb)->len = bytes
-+#define	PKTPUSH(drv, lb, bytes)		ASSERT(0)
-+#define	PKTPULL(drv, lb, bytes)		ASSERT(0)
-+#define	PKTDUP(drv, lb)			ASSERT(0)
-+#define	PKTLINK(lb)			((struct lbuf*)lb)->next
-+#define	PKTSETLINK(lb, x)		((struct lbuf*)lb)->next = (struct lbuf*)x
-+#define	PKTPRIO(lb)			(0)
-+#define	PKTSETPRIO(lb, x)		do {} while (0)
-+extern void *et_pktget(void *drv, uint len, bool send);
-+extern void et_pktfree(void *drv, struct lbuf *lb, bool send);
-+
-+#endif	/* _pmon_osl_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/802.11.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/802.11.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/802.11.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/802.11.h	2005-12-16 23:39:10.752824750 +0100
-@@ -0,0 +1,930 @@
++#endif	/* _MISPINC_H */
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/osl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/osl.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/osl.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/osl.h	2005-12-16 23:39:10.748824500 +0100
+@@ -0,0 +1,42 @@
 +/*
++ * OS Abstraction Layer
++ * 
 + * Copyright 2005, Broadcom Corporation      
 + * All Rights Reserved.      
 + *       
@@ -5128,934 +3138,44 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/802.11.h linux-2.4.32-br
 + * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ *
-+ * Fundamental types and constants relating to 802.11 
-+ *
 + * $Id$
 + */
 +
-+#ifndef _802_11_H_
-+#define _802_11_H_
-+
-+#ifndef _TYPEDEFS_H_
-+#include <typedefs.h>
-+#endif
-+
-+#ifndef _NET_ETHERNET_H_
-+#include <proto/ethernet.h>
-+#endif
-+
-+#include <proto/wpa.h>
++#ifndef _osl_h_
++#define _osl_h_
 +
++/* osl handle type forward declaration */
++typedef struct os_handle osl_t;
 +
-+/* enable structure packing */
-+#if defined(__GNUC__)
-+#define	PACKED	__attribute__((packed))
++#if defined(linux)
++#include <linux_osl.h>
++#elif defined(NDIS)
++#include <ndis_osl.h>
++#elif defined(_CFE_)
++#include <cfe_osl.h>
++#elif defined(_HNDRTE_)
++#include <hndrte_osl.h>
++#elif defined(_MINOSL_)
++#include <min_osl.h>
++#elif PMON
++#include <pmon_osl.h>
++#elif defined(MACOSX)
++#include <macosx_osl.h>
 +#else
-+#pragma pack(1)
-+#define	PACKED
++#error "Unsupported OSL requested"
 +#endif
 +
-+#define DOT11_TU_TO_US			1024	/* 802.11 Time Unit is 1024 microseconds */
-+
-+/* Generic 802.11 frame constants */
-+#define DOT11_A3_HDR_LEN		24
-+#define DOT11_A4_HDR_LEN		30
-+#define DOT11_MAC_HDR_LEN		DOT11_A3_HDR_LEN
-+#define DOT11_FCS_LEN			4
-+#define DOT11_ICV_LEN			4
-+#define DOT11_ICV_AES_LEN		8
-+#define DOT11_QOS_LEN			2
-+
-+#define DOT11_KEY_INDEX_SHIFT		6
-+#define DOT11_IV_LEN			4
-+#define DOT11_IV_TKIP_LEN		8
-+#define DOT11_IV_AES_OCB_LEN		4
-+#define DOT11_IV_AES_CCM_LEN		8
-+
-+/* Includes MIC */
-+#define DOT11_MAX_MPDU_BODY_LEN		2304
-+/* A4 header + QoS + CCMP + PDU + ICV + FCS = 2352 */
-+#define DOT11_MAX_MPDU_LEN		(DOT11_A4_HDR_LEN + \
-+					 DOT11_QOS_LEN + \
-+					 DOT11_IV_AES_CCM_LEN + \
-+					 DOT11_MAX_MPDU_BODY_LEN + \
-+					 DOT11_ICV_LEN + \
-+					 DOT11_FCS_LEN)
-+
-+#define DOT11_MAX_SSID_LEN		32
-+
-+/* dot11RTSThreshold */
-+#define DOT11_DEFAULT_RTS_LEN		2347
-+#define DOT11_MAX_RTS_LEN		2347
-+
-+/* dot11FragmentationThreshold */
-+#define DOT11_MIN_FRAG_LEN		256
-+#define DOT11_MAX_FRAG_LEN		2346	/* Max frag is also limited by aMPDUMaxLength of the attached PHY */
-+#define DOT11_DEFAULT_FRAG_LEN		2346
-+
-+/* dot11BeaconPeriod */
-+#define DOT11_MIN_BEACON_PERIOD		1
-+#define DOT11_MAX_BEACON_PERIOD		0xFFFF
-+
-+/* dot11DTIMPeriod */
-+#define DOT11_MIN_DTIM_PERIOD		1
-+#define DOT11_MAX_DTIM_PERIOD		0xFF
-+
-+/* 802.2 LLC/SNAP header used by 802.11 per 802.1H */
-+#define DOT11_LLC_SNAP_HDR_LEN	8
-+#define DOT11_OUI_LEN			3
-+struct dot11_llc_snap_header {
-+	uint8	dsap;				/* always 0xAA */
-+	uint8	ssap;				/* always 0xAA */
-+	uint8	ctl;				/* always 0x03 */
-+	uint8	oui[DOT11_OUI_LEN];		/* RFC1042: 0x00 0x00 0x00
-+						   Bridge-Tunnel: 0x00 0x00 0xF8 */
-+	uint16	type;				/* ethertype */
-+} PACKED;
-+
-+/* RFC1042 header used by 802.11 per 802.1H */
-+#define RFC1042_HDR_LEN			(ETHER_HDR_LEN + DOT11_LLC_SNAP_HDR_LEN)
-+
-+/* Generic 802.11 MAC header */
-+/*
-+ * N.B.: This struct reflects the full 4 address 802.11 MAC header.
-+ *		 The fields are defined such that the shorter 1, 2, and 3
-+ *		 address headers just use the first k fields.
-+ */
-+struct dot11_header {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	a1;		/* address 1 */
-+	struct ether_addr	a2;		/* address 2 */
-+	struct ether_addr	a3;		/* address 3 */
-+	uint16			seq;		/* sequence control */
-+	struct ether_addr	a4;		/* address 4 */
-+} PACKED;
-+
-+/* Control frames */
-+
-+struct dot11_rts_frame {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	ra;		/* receiver address */
-+	struct ether_addr	ta;		/* transmitter address */
-+} PACKED;
-+#define	DOT11_RTS_LEN		16
-+
-+struct dot11_cts_frame {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	ra;		/* receiver address */
-+} PACKED;
-+#define	DOT11_CTS_LEN		10
-+
-+struct dot11_ack_frame {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	ra;		/* receiver address */
-+} PACKED;
-+#define	DOT11_ACK_LEN		10
-+
-+struct dot11_ps_poll_frame {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* AID */
-+	struct ether_addr	bssid;		/* receiver address, STA in AP */
-+	struct ether_addr	ta;		/* transmitter address */
-+} PACKED;
-+#define	DOT11_PS_POLL_LEN	16
-+
-+struct dot11_cf_end_frame {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	ra;		/* receiver address */
-+	struct ether_addr	bssid;		/* transmitter address, STA in AP */
-+} PACKED;
-+#define	DOT11_CS_END_LEN	16
-+
-+/* Management frame header */
-+struct dot11_management_header {
-+	uint16			fc;		/* frame control */
-+	uint16			durid;		/* duration/ID */
-+	struct ether_addr	da;		/* receiver address */
-+	struct ether_addr	sa;		/* transmitter address */
-+	struct ether_addr	bssid;		/* BSS ID */
-+	uint16			seq;		/* sequence control */
-+} PACKED;
-+#define	DOT11_MGMT_HDR_LEN	24
-+
-+/* Management frame payloads */
-+
-+struct dot11_bcn_prb {
-+	uint32			timestamp[2];
-+	uint16			beacon_interval;
-+	uint16			capability;
-+} PACKED;
-+#define	DOT11_BCN_PRB_LEN	12
-+
-+struct dot11_auth {
-+	uint16			alg;		/* algorithm */
-+	uint16			seq;		/* sequence control */
-+	uint16			status;		/* status code */
-+} PACKED;
-+#define DOT11_AUTH_FIXED_LEN	6		/* length of auth frame without challenge info elt */
-+
-+struct dot11_assoc_req {
-+	uint16			capability;	/* capability information */
-+	uint16			listen;		/* listen interval */
-+} PACKED;
-+#define DOT11_ASSOC_REQ_FIXED_LEN	4	/* length of assoc frame without info elts */
-+
-+struct dot11_reassoc_req {
-+	uint16			capability;	/* capability information */
-+	uint16			listen;		/* listen interval */
-+	struct ether_addr	ap;		/* Current AP address */
-+} PACKED;
-+#define DOT11_REASSOC_REQ_FIXED_LEN	10	/* length of assoc frame without info elts */
-+
-+struct dot11_assoc_resp {
-+	uint16			capability;	/* capability information */
-+	uint16			status;		/* status code */
-+	uint16			aid;		/* association ID */
-+} PACKED;
-+
-+struct dot11_action_measure {
-+	uint8	category;
-+	uint8	action;
-+	uint8	token;
-+	uint8	data[1];
-+} PACKED;
-+#define DOT11_ACTION_MEASURE_LEN	3
-+
-+struct dot11_action_switch_channel {
-+	uint8	category;
-+	uint8	action;
-+	uint8	data[5]; /* for switch IE */
-+} PACKED;
-+
-+/**************
-+  802.11h related definitions.
-+**************/
-+typedef struct {
-+	uint8 id;
-+	uint8 len;
-+	uint8 power;
-+} dot11_power_cnst_t;
-+
-+typedef struct {
-+	uint8 min;
-+	uint8 max;
-+} dot11_power_cap_t;
-+
-+typedef struct {
-+	uint8 id;
-+	uint8 len;
-+	uint8 tx_pwr;
-+	uint8 margin;
-+} dot11_tpc_rep_t;
-+#define DOT11_MNG_IE_TPC_REPORT_LEN	2	/* length of IE data, not including 2 byte header */
-+
-+typedef struct {
-+	uint8 id;
-+	uint8 len;
-+	uint8 first_channel;
-+	uint8 num_channels;
-+} dot11_supp_channels_t;
-+
-+/* csa mode type */
-+#define DOT11_CSA_MODE_ADVISORY		0
-+#define DOT11_CSA_MODE_NO_TX		1
-+struct dot11_channel_switch {
-+	uint8 id;
-+	uint8 len;
-+	uint8 mode;
-+	uint8 channel;
-+	uint8 count;
-+}  PACKED;
-+typedef struct dot11_channel_switch dot11_channel_switch_t;
-+
-+/* length of IE data, not including 2 byte header */
-+#define DOT11_SWITCH_IE_LEN             3 
-+
-+/* 802.11h Measurement Request/Report IEs */
-+/* Measurement Type field */
-+#define DOT11_MEASURE_TYPE_BASIC 	0
-+#define DOT11_MEASURE_TYPE_CCA 		1
-+#define DOT11_MEASURE_TYPE_RPI	 	2
-+
-+/* Measurement Mode field */
-+
-+/* Measurement Request Modes */
-+#define DOT11_MEASURE_MODE_ENABLE 	(1<<1)
-+#define DOT11_MEASURE_MODE_REQUEST	(1<<2)
-+#define DOT11_MEASURE_MODE_REPORT 	(1<<3)
-+/* Measurement Report Modes */
-+#define DOT11_MEASURE_MODE_LATE 	(1<<0)
-+#define DOT11_MEASURE_MODE_INCAPABLE	(1<<1)
-+#define DOT11_MEASURE_MODE_REFUSED	(1<<2)
-+/* Basic Measurement Map bits */
-+#define DOT11_MEASURE_BASIC_MAP_BSS	((uint8)(1<<0))
-+#define DOT11_MEASURE_BASIC_MAP_OFDM	((uint8)(1<<1))
-+#define DOT11_MEASURE_BASIC_MAP_UKNOWN	((uint8)(1<<2))
-+#define DOT11_MEASURE_BASIC_MAP_RADAR	((uint8)(1<<3))
-+#define DOT11_MEASURE_BASIC_MAP_UNMEAS	((uint8)(1<<4))
-+
-+typedef struct {
-+	uint8 id;
-+	uint8 len;
-+	uint8 token;
-+	uint8 mode;
-+	uint8 type;
-+	uint8 channel;
-+	uint8 start_time[8];
-+	uint16 duration;
-+} dot11_meas_req_t;
-+#define DOT11_MNG_IE_MREQ_LEN 14
-+/* length of Measure Request IE data not including variable len */
-+#define DOT11_MNG_IE_MREQ_FIXED_LEN 3
-+
-+struct dot11_meas_rep {
-+	uint8 id;
-+	uint8 len;
-+	uint8 token;
-+	uint8 mode;
-+	uint8 type;
-+	union 
-+	{
-+		struct {
-+			uint8 channel;
-+			uint8 start_time[8];
-+			uint16 duration;
-+			uint8 map;
-+		} PACKED basic;
-+		uint8 data[1];
-+	} PACKED rep;
-+} PACKED;
-+typedef struct dot11_meas_rep dot11_meas_rep_t;
-+
-+/* length of Measure Report IE data not including variable len */
-+#define DOT11_MNG_IE_MREP_FIXED_LEN	3
-+
-+struct dot11_meas_rep_basic {
-+	uint8 channel;
-+	uint8 start_time[8];
-+	uint16 duration;
-+	uint8 map;
-+} PACKED;
-+typedef struct dot11_meas_rep_basic dot11_meas_rep_basic_t;
-+#define DOT11_MEASURE_BASIC_REP_LEN	12
-+
-+struct dot11_quiet {
-+	uint8 id;
-+	uint8 len;
-+	uint8 count;	/* TBTTs until beacon interval in quiet starts */
-+	uint8 period;	/* Beacon intervals between periodic quiet periods ? */
-+	uint16 duration;/* Length of quiet period, in TU's */
-+	uint16 offset;	/* TU's offset from TBTT in Count field */
-+} PACKED;
-+typedef struct dot11_quiet dot11_quiet_t;
-+
-+typedef struct {
-+	uint8 channel;
-+	uint8 map;
-+} chan_map_tuple_t;
-+
-+typedef struct {
-+	uint8 id;
-+	uint8 len;
-+	uint8 eaddr[ETHER_ADDR_LEN];
-+	uint8 interval;
-+	chan_map_tuple_t map[1];
-+} dot11_ibss_dfs_t;
-+
-+/* WME Elements */
-+#define WME_OUI			"\x00\x50\xf2"
-+#define WME_VER			1
-+#define WME_TYPE		2
-+#define WME_SUBTYPE_IE		0	/* Information Element */
-+#define WME_SUBTYPE_PARAM_IE	1	/* Parameter Element */
-+#define WME_SUBTYPE_TSPEC	2	/* Traffic Specification */
-+
-+/* WME Access Category Indices (ACIs) */
-+#define AC_BE			0	/* Best Effort */
-+#define AC_BK			1	/* Background */
-+#define AC_VI			2	/* Video */
-+#define AC_VO			3	/* Voice */
-+#define AC_MAX			4
-+
-+/* WME Information Element (IE) */
-+struct wme_ie {
-+	uint8 oui[3];
-+	uint8 type;
-+	uint8 subtype;
-+	uint8 version;
-+	uint8 acinfo;
-+} PACKED;
-+typedef struct wme_ie wme_ie_t;
-+#define WME_IE_LEN 7
-+
-+struct wme_acparam {
-+	uint8	ACI;
-+	uint8	ECW;
-+	uint16  TXOP;		/* stored in network order (ls octet first) */
-+} PACKED;
-+typedef struct wme_acparam wme_acparam_t;
-+
-+/* WME Parameter Element (PE) */
-+struct wme_params {
-+	uint8 oui[3];
-+	uint8 type;
-+	uint8 subtype;
-+	uint8 version;
-+	uint8 acinfo;
-+	uint8 rsvd;
-+	wme_acparam_t acparam[4];
-+} PACKED;
-+typedef struct wme_params wme_params_t;
-+#define WME_PARAMS_IE_LEN	24
-+
-+/* acinfo */
-+#define WME_COUNT_MASK 	0x0f
-+/* ACI */
-+#define WME_AIFS_MASK 	0x0f
-+#define WME_ACM_MASK 	0x10
-+#define WME_ACI_MASK 	0x60
-+#define WME_ACI_SHIFT 	5
-+/* ECW */
-+#define WME_CWMIN_MASK	0x0f
-+#define WME_CWMAX_MASK	0xf0
-+#define WME_CWMAX_SHIFT	4
-+
-+#define WME_TXOP_UNITS	32
-+
-+/* AP: default params to be announced in the Beacon Frames/Probe Responses Table 12 WME Draft*/
-+/* AP:  default params to be Used in the AP Side Table 14 WME Draft January 2004 802.11-03-504r5 */
-+#define WME_AC_BK_ACI_STA       0x27
-+#define WME_AC_BK_ECW_STA       0xA4
-+#define WME_AC_BK_TXOP_STA      0x0000
-+#define WME_AC_BE_ACI_STA       0x03
-+#define WME_AC_BE_ECW_STA       0xA4
-+#define WME_AC_BE_TXOP_STA      0x0000
-+#define WME_AC_VI_ACI_STA       0x42
-+#define WME_AC_VI_ECW_STA       0x43
-+#define WME_AC_VI_TXOP_STA      0x005e
-+#define WME_AC_VO_ACI_STA       0x62
-+#define WME_AC_VO_ECW_STA       0x32
-+#define WME_AC_VO_TXOP_STA      0x002f
-+                                                                                                             
-+#define WME_AC_BK_ACI_AP        0x27
-+#define WME_AC_BK_ECW_AP        0xA4
-+#define WME_AC_BK_TXOP_AP       0x0000
-+#define WME_AC_BE_ACI_AP        0x03
-+#define WME_AC_BE_ECW_AP        0x64
-+#define WME_AC_BE_TXOP_AP       0x0000
-+#define WME_AC_VI_ACI_AP        0x41
-+#define WME_AC_VI_ECW_AP        0x43
-+#define WME_AC_VI_TXOP_AP       0x005e
-+#define WME_AC_VO_ACI_AP        0x61
-+#define WME_AC_VO_ECW_AP        0x32
-+#define WME_AC_VO_TXOP_AP       0x002f
-+
-+/* WME Traffic Specification (TSPEC) element */
-+#define WME_SUBTYPE_TSPEC 2
-+#define WME_TSPEC_HDR_LEN		2
-+#define WME_TSPEC_BODY_OFF		2
-+struct wme_tspec {
-+	uint8 oui[DOT11_OUI_LEN];	/* WME_OUI */
-+	uint8 type;			/* WME_TYPE */
-+	uint8 subtype;			/* WME_SUBTYPE_TSPEC */
-+	uint8 version;			/* WME_VERSION */
-+	uint16 ts_info;			/* TS Info */
-+	uint16 nom_msdu_size;		/* (Nominal or fixed) MSDU Size (bytes) */
-+	uint16 max_msdu_size;		/* Maximum MSDU Size (bytes) */
-+	uint32 min_service_interval;	/* Minimum Service Interval (us) */
-+	uint32 max_service_interval;	/* Maximum Service Interval (us) */
-+	uint32 inactivity_interval;	/* Inactivity Interval (us) */
-+	uint32 service_start;		/* Service Start Time (us) */
-+	uint32 min_rate;		/* Minimum Data Rate (bps) */
-+	uint32 mean_rate;		/* Mean Data Rate (bps) */
-+	uint32 max_burst_size;		/* Maximum Burst Size (bytes) */
-+	uint32 min_phy_rate;		/* Minimum PHY Rate (bps) */
-+	uint32 peak_rate;		/* Peak Data Rate (bps) */
-+	uint32 delay_bound;		/* Delay Bound (us) */
-+	uint16 surplus_bandwidth;	/* Surplus Bandwidth Allowance Factor */
-+	uint16 medium_time;		/* Medium Time (32 us/s periods) */
-+} PACKED;
-+typedef struct wme_tspec wme_tspec_t;
-+#define WME_TSPEC_LEN 56		/* not including 2-byte header */
-+
-+/* ts_info */
-+/* 802.1D priority is duplicated - bits 13-11 AND bits 3-1 */
-+#define TS_INFO_PRIO_SHIFT_HI		11
-+#define TS_INFO_PRIO_MASK_HI		(0x7 << TS_INFO_PRIO_SHIFT_HI)
-+#define TS_INFO_PRIO_SHIFT_LO		1
-+#define TS_INFO_PRIO_MASK_LO		(0x7 << TS_INFO_PRIO_SHIFT_LO)
-+#define TS_INFO_CONTENTION_SHIFT	7
-+#define TS_INFO_CONTENTION_MASK		(0x1 << TS_INFO_CONTENTION_SHIFT)
-+#define TS_INFO_DIRECTION_SHIFT		5
-+#define TS_INFO_DIRECTION_MASK		(0x3 << TS_INFO_DIRECTION_SHIFT)
-+#define TS_INFO_UPLINK			(0 << TS_INFO_DIRECTION_SHIFT)
-+#define TS_INFO_DOWNLINK		(1 << TS_INFO_DIRECTION_SHIFT)
-+#define TS_INFO_BIDIRECTIONAL		(3 << TS_INFO_DIRECTION_SHIFT)
-+
-+/* nom_msdu_size */
-+#define FIXED_MSDU_SIZE 0x8000		/* MSDU size is fixed */
-+#define MSDU_SIZE_MASK	0x7fff		/* (Nominal or fixed) MSDU size */
-+
-+/* surplus_bandwidth */
-+/* Represented as 3 bits of integer, binary point, 13 bits fraction */
-+#define	INTEGER_SHIFT	13
-+#define FRACTION_MASK	0x1FFF
-+
-+/* Management Notification Frame */
-+struct dot11_management_notification {
-+	uint8 category;			/* DOT11_ACTION_NOTIFICATION */
-+	uint8 action;
-+	uint8 token;
-+	uint8 status;
-+	uint8 data[1];			/* Elements */
-+} PACKED;
-+#define DOT11_MGMT_NOTIFICATION_LEN 4	/* Fixed length */
-+
-+/* WME Action Codes */
-+#define WME_SETUP_REQUEST	0
-+#define WME_SETUP_RESPONSE	1
-+#define WME_TEARDOWN		2
-+
-+/* WME Setup Response Status Codes */
-+#define WME_ADMISSION_ACCEPTED	0
-+#define WME_INVALID_PARAMETERS	1
-+#define WME_ADMISSION_REFUSED	3
-+
-+/* Macro to take a pointer to a beacon or probe response
-+ * header and return the char* pointer to the SSID info element
-+ */
-+#define BCN_PRB_SSID(hdr) ((char*)(hdr) + DOT11_MGMT_HDR_LEN + DOT11_BCN_PRB_LEN)
-+
-+/* Authentication frame payload constants */
-+#define DOT11_OPEN_SYSTEM	0
-+#define DOT11_SHARED_KEY	1
-+#define DOT11_CHALLENGE_LEN	128
-+
-+/* Frame control macros */
-+#define FC_PVER_MASK		0x3
-+#define FC_PVER_SHIFT		0
-+#define FC_TYPE_MASK		0xC
-+#define FC_TYPE_SHIFT		2
-+#define FC_SUBTYPE_MASK		0xF0
-+#define FC_SUBTYPE_SHIFT	4
-+#define FC_TODS			0x100
-+#define FC_TODS_SHIFT		8
-+#define FC_FROMDS		0x200
-+#define FC_FROMDS_SHIFT		9
-+#define FC_MOREFRAG		0x400
-+#define FC_MOREFRAG_SHIFT	10
-+#define FC_RETRY		0x800
-+#define FC_RETRY_SHIFT		11
-+#define FC_PM			0x1000
-+#define FC_PM_SHIFT		12
-+#define FC_MOREDATA		0x2000
-+#define FC_MOREDATA_SHIFT	13
-+#define FC_WEP			0x4000
-+#define FC_WEP_SHIFT		14
-+#define FC_ORDER		0x8000
-+#define FC_ORDER_SHIFT		15
-+
-+/* sequence control macros */
-+#define SEQNUM_SHIFT		4
-+#define FRAGNUM_MASK		0xF
-+
-+/* Frame Control type/subtype defs */
-+
-+/* FC Types */
-+#define FC_TYPE_MNG		0
-+#define FC_TYPE_CTL		1
-+#define FC_TYPE_DATA		2
-+
-+/* Management Subtypes */
-+#define FC_SUBTYPE_ASSOC_REQ		0
-+#define FC_SUBTYPE_ASSOC_RESP		1
-+#define FC_SUBTYPE_REASSOC_REQ		2
-+#define FC_SUBTYPE_REASSOC_RESP		3
-+#define FC_SUBTYPE_PROBE_REQ		4
-+#define FC_SUBTYPE_PROBE_RESP		5
-+#define FC_SUBTYPE_BEACON		8
-+#define FC_SUBTYPE_ATIM			9
-+#define FC_SUBTYPE_DISASSOC		10
-+#define FC_SUBTYPE_AUTH			11
-+#define FC_SUBTYPE_DEAUTH		12
-+#define FC_SUBTYPE_ACTION		13
-+
-+/* Control Subtypes */
-+#define FC_SUBTYPE_PS_POLL		10
-+#define FC_SUBTYPE_RTS			11
-+#define FC_SUBTYPE_CTS			12
-+#define FC_SUBTYPE_ACK			13
-+#define FC_SUBTYPE_CF_END		14
-+#define FC_SUBTYPE_CF_END_ACK		15
-+
-+/* Data Subtypes */
-+#define FC_SUBTYPE_DATA			0
-+#define FC_SUBTYPE_DATA_CF_ACK		1
-+#define FC_SUBTYPE_DATA_CF_POLL		2
-+#define FC_SUBTYPE_DATA_CF_ACK_POLL	3
-+#define FC_SUBTYPE_NULL			4
-+#define FC_SUBTYPE_CF_ACK		5
-+#define FC_SUBTYPE_CF_POLL		6
-+#define FC_SUBTYPE_CF_ACK_POLL		7
-+#define FC_SUBTYPE_QOS_DATA		8
-+#define FC_SUBTYPE_QOS_NULL		12
-+
-+/* type-subtype combos */
-+#define FC_KIND_MASK		(FC_TYPE_MASK | FC_SUBTYPE_MASK)
-+
-+#define FC_KIND(t, s) (((t) << FC_TYPE_SHIFT) | ((s) << FC_SUBTYPE_SHIFT))
-+
-+#define FC_ASSOC_REQ	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_REQ)
-+#define FC_ASSOC_RESP	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_RESP)
-+#define FC_REASSOC_REQ	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_REQ)
-+#define FC_REASSOC_RESP	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_RESP)
-+#define FC_PROBE_REQ	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_REQ)
-+#define FC_PROBE_RESP	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_RESP)
-+#define FC_BEACON	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_BEACON)
-+#define FC_DISASSOC	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DISASSOC)
-+#define FC_AUTH		FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_AUTH)
-+#define FC_DEAUTH	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DEAUTH)
-+#define FC_ACTION	FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION)
-+
-+#define FC_PS_POLL	FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_PS_POLL)
-+#define FC_RTS		FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_RTS)
-+#define FC_CTS		FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTS)
-+#define FC_ACK		FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_ACK)
-+#define FC_CF_END	FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END)
-+#define FC_CF_END_ACK	FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END_ACK)
-+
-+#define FC_DATA		FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA)
-+#define FC_NULL_DATA	FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_NULL)
-+#define FC_DATA_CF_ACK	FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA_CF_ACK)
-+#define FC_QOS_DATA	FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_DATA)
-+#define FC_QOS_NULL	FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_NULL)
-+
-+/* QoS Control Field */
-+
-+/* 802.1D Tag */
-+#define QOS_PRIO_SHIFT		0
-+#define QOS_PRIO_MASK		0x0007
-+#define QOS_PRIO(qos)		(((qos) & QOS_PRIO_MASK) >> QOS_PRIO_SHIFT)
-+
-+#define QOS_TID_SHIFT		0
-+#define QOS_TID_MASK		0x000f
-+#define QOS_TID(qos)		(((qos) & QOS_TID_MASK) >> QOS_TID_SHIFT)
-+
-+/* Ack Policy (0 means Acknowledge) */
-+#define QOS_ACK_SHIFT		5
-+#define QOS_ACK_MASK		0x0060
-+#define QOS_ACK(qos)		(((qos) & QOS_ACK_MASK) >> QOS_ACK_SHIFT)
-+
-+/* Management Frames */
-+
-+/* Management Frame Constants */
-+
-+/* Fixed fields */
-+#define DOT11_MNG_AUTH_ALGO_LEN		2
-+#define DOT11_MNG_AUTH_SEQ_LEN		2
-+#define DOT11_MNG_BEACON_INT_LEN	2
-+#define DOT11_MNG_CAP_LEN		2
-+#define DOT11_MNG_AP_ADDR_LEN		6
-+#define DOT11_MNG_LISTEN_INT_LEN	2
-+#define DOT11_MNG_REASON_LEN		2
-+#define DOT11_MNG_AID_LEN		2
-+#define DOT11_MNG_STATUS_LEN		2
-+#define DOT11_MNG_TIMESTAMP_LEN		8
-+
-+/* DUR/ID field in assoc resp is 0xc000 | AID */
-+#define DOT11_AID_MASK			0x3fff
-+
-+/* Reason Codes */
-+#define DOT11_RC_RESERVED			0
-+#define DOT11_RC_UNSPECIFIED			1	/* Unspecified reason */
-+#define DOT11_RC_AUTH_INVAL			2	/* Previous authentication no longer valid */
-+#define DOT11_RC_DEAUTH_LEAVING			3	/* Deauthenticated because sending station is
-+							   leaving (or has left) IBSS or ESS */
-+#define DOT11_RC_INACTIVITY			4	/* Disassociated due to inactivity */
-+#define DOT11_RC_BUSY				5	/* Disassociated because AP is unable to handle
-+							   all currently associated stations */
-+#define DOT11_RC_INVAL_CLASS_2			6	/* Class 2 frame received from
-+							   nonauthenticated station */
-+#define DOT11_RC_INVAL_CLASS_3			7	/* Class 3 frame received from
-+							   nonassociated station */
-+#define DOT11_RC_DISASSOC_LEAVING		8	/* Disassociated because sending station is
-+							   leaving (or has left) BSS */
-+#define DOT11_RC_NOT_AUTH			9	/* Station requesting (re)association is
-+							   not authenticated with responding station */
-+#define DOT11_RC_MAX				23	/* Reason codes > 23 are reserved */
-+
-+/* Status Codes */
-+#define DOT11_STATUS_SUCCESS			0	/* Successful */
-+#define DOT11_STATUS_FAILURE			1	/* Unspecified failure */
-+#define DOT11_STATUS_CAP_MISMATCH		10	/* Cannot support all requested capabilities
-+							   in the Capability Information field */
-+#define DOT11_STATUS_REASSOC_FAIL		11	/* Reassociation denied due to inability to
-+							   confirm that association exists */
-+#define DOT11_STATUS_ASSOC_FAIL			12	/* Association denied due to reason outside
-+							   the scope of this standard */
-+#define DOT11_STATUS_AUTH_MISMATCH		13	/* Responding station does not support the
-+							   specified authentication algorithm */
-+#define DOT11_STATUS_AUTH_SEQ			14	/* Received an Authentication frame with
-+							   authentication transaction sequence number
-+							   out of expected sequence */
-+#define DOT11_STATUS_AUTH_CHALLENGE_FAIL	15	/* Authentication rejected because of challenge failure */
-+#define DOT11_STATUS_AUTH_TIMEOUT		16	/* Authentication rejected due to timeout waiting
-+							   for next frame in sequence */
-+#define DOT11_STATUS_ASSOC_BUSY_FAIL		17	/* Association denied because AP is unable to
-+							   handle additional associated stations */
-+#define DOT11_STATUS_ASSOC_RATE_MISMATCH	18	/* Association denied due to requesting station
-+							   not supporting all of the data rates in the
-+							   BSSBasicRateSet parameter */
-+#define DOT11_STATUS_ASSOC_SHORT_REQUIRED	19	/* Association denied due to requesting station
-+							   not supporting the Short Preamble option */
-+#define DOT11_STATUS_ASSOC_PBCC_REQUIRED	20	/* Association denied due to requesting station
-+							   not supporting the PBCC Modulation option */
-+#define DOT11_STATUS_ASSOC_AGILITY_REQUIRED	21	/* Association denied due to requesting station
-+							   not supporting the Channel Agility option */
-+#define DOT11_STATUS_ASSOC_SPECTRUM_REQUIRED	22	/* Association denied because Spectrum Management 
-+							   capability is required. */
-+#define DOT11_STATUS_ASSOC_BAD_POWER_CAP	23	/* Association denied because the info in the 
-+							   Power Cap element is unacceptable. */
-+#define DOT11_STATUS_ASSOC_BAD_SUP_CHANNELS	24	/* Association denied because the info in the 
-+							   Supported Channel element is unacceptable */
-+#define DOT11_STATUS_ASSOC_SHORTSLOT_REQUIRED	25	/* Association denied due to requesting station
-+							   not supporting the Short Slot Time option */
-+#define DOT11_STATUS_ASSOC_ERPBCC_REQUIRED	26	/* Association denied due to requesting station
-+							   not supporting the ER-PBCC Modulation option */
-+#define DOT11_STATUS_ASSOC_DSSOFDM_REQUIRED	27	/* Association denied due to requesting station
-+							   not supporting the DSS-OFDM option */
-+
-+/* Info Elts, length of INFORMATION portion of Info Elts */
-+#define DOT11_MNG_DS_PARAM_LEN			1
-+#define DOT11_MNG_IBSS_PARAM_LEN		2
-+
-+/* TIM Info element has 3 bytes fixed info in INFORMATION field,
-+ * followed by 1 to 251 bytes of Partial Virtual Bitmap */
-+#define DOT11_MNG_TIM_FIXED_LEN			3
-+#define DOT11_MNG_TIM_DTIM_COUNT		0
-+#define DOT11_MNG_TIM_DTIM_PERIOD		1
-+#define DOT11_MNG_TIM_BITMAP_CTL		2
-+#define DOT11_MNG_TIM_PVB			3
-+
-+/* TLV defines */
-+#define TLV_TAG_OFF		0
-+#define TLV_LEN_OFF		1
-+#define TLV_HDR_LEN		2
-+#define TLV_BODY_OFF		2
-+
-+/* Management Frame Information Element IDs */
-+#define DOT11_MNG_SSID_ID			0
-+#define DOT11_MNG_RATES_ID			1
-+#define DOT11_MNG_FH_PARMS_ID			2
-+#define DOT11_MNG_DS_PARMS_ID			3
-+#define DOT11_MNG_CF_PARMS_ID			4
-+#define DOT11_MNG_TIM_ID			5
-+#define DOT11_MNG_IBSS_PARMS_ID			6
-+#define DOT11_MNG_COUNTRY_ID			7
-+#define DOT11_MNG_HOPPING_PARMS_ID		8
-+#define DOT11_MNG_HOPPING_TABLE_ID		9
-+#define DOT11_MNG_REQUEST_ID			10
-+#define DOT11_MNG_CHALLENGE_ID			16
-+#define DOT11_MNG_PWR_CONSTRAINT_ID		32    /* 11H PowerConstraint	*/
-+#define DOT11_MNG_PWR_CAP_ID			33    /* 11H PowerCapability	*/
-+#define DOT11_MNG_TPC_REQUEST_ID 		34    /* 11H TPC Request	*/
-+#define DOT11_MNG_TPC_REPORT_ID			35    /* 11H TPC Report		*/
-+#define DOT11_MNG_SUPP_CHANNELS_ID		36    /* 11H Supported Channels	*/
-+#define DOT11_MNG_CHANNEL_SWITCH_ID		37    /* 11H ChannelSwitch Announcement*/
-+#define DOT11_MNG_MEASURE_REQUEST_ID		38    /* 11H MeasurementRequest	*/
-+#define DOT11_MNG_MEASURE_REPORT_ID		39    /* 11H MeasurementReport	*/
-+#define DOT11_MNG_QUIET_ID			40    /* 11H Quiet		*/
-+#define DOT11_MNG_IBSS_DFS_ID			41    /* 11H IBSS_DFS 		*/
-+#define DOT11_MNG_ERP_ID			42
-+#define DOT11_MNG_NONERP_ID			47
-+#ifdef BCMWPA2
-+#define DOT11_MNG_RSN_ID			48
-+#endif /* BCMWPA2 */
-+#define DOT11_MNG_EXT_RATES_ID			50
-+#define DOT11_MNG_WPA_ID			221
-+#define DOT11_MNG_PROPR_ID			221
-+
-+/* ERP info element bit values */
-+#define DOT11_MNG_ERP_LEN			1	/* ERP is currently 1 byte long */
-+#define DOT11_MNG_NONERP_PRESENT		0x01	/* NonERP (802.11b) STAs are present in the BSS */
-+#define DOT11_MNG_USE_PROTECTION		0x02	/* Use protection mechanisms for ERP-OFDM frames */
-+#define DOT11_MNG_BARKER_PREAMBLE		0x04	/* Short Preambles: 0 == allowed, 1 == not allowed */
-+
-+/* Capability Information Field */
-+#define DOT11_CAP_ESS				0x0001
-+#define DOT11_CAP_IBSS				0x0002
-+#define DOT11_CAP_POLLABLE			0x0004
-+#define DOT11_CAP_POLL_RQ			0x0008
-+#define DOT11_CAP_PRIVACY			0x0010
-+#define DOT11_CAP_SHORT				0x0020
-+#define DOT11_CAP_PBCC				0x0040
-+#define DOT11_CAP_AGILITY			0x0080
-+#define DOT11_CAP_SPECTRUM			0x0100
-+#define DOT11_CAP_SHORTSLOT			0x0400
-+#define DOT11_CAP_CCK_OFDM			0x2000
-+
-+/* Action Frame Constants */
-+#define DOT11_ACTION_CAT_ERR_MASK	0x80
-+#define DOT11_ACTION_CAT_SPECT_MNG	0x00
-+#define DOT11_ACTION_NOTIFICATION	0x11	/* 17 */
-+
-+#define DOT11_ACTION_ID_M_REQ		0
-+#define DOT11_ACTION_ID_M_REP		1
-+#define DOT11_ACTION_ID_TPC_REQ		2
-+#define DOT11_ACTION_ID_TPC_REP		3
-+#define DOT11_ACTION_ID_CHANNEL_SWITCH	4
-+
-+/* MLME Enumerations */
-+#define DOT11_BSSTYPE_INFRASTRUCTURE		0
-+#define DOT11_BSSTYPE_INDEPENDENT		1
-+#define DOT11_BSSTYPE_ANY			2
-+#define DOT11_SCANTYPE_ACTIVE			0
-+#define DOT11_SCANTYPE_PASSIVE			1
-+
-+/* 802.11 A PHY constants */
-+#define APHY_SLOT_TIME		9
-+#define APHY_SIFS_TIME		16
-+#define APHY_DIFS_TIME		(APHY_SIFS_TIME + (2 * APHY_SLOT_TIME))
-+#define APHY_PREAMBLE_TIME	16
-+#define APHY_SIGNAL_TIME	4
-+#define APHY_SYMBOL_TIME	4
-+#define APHY_SERVICE_NBITS	16
-+#define APHY_TAIL_NBITS		6
-+#define	APHY_CWMIN		15
-+
-+/* 802.11 B PHY constants */
-+#define BPHY_SLOT_TIME		20
-+#define BPHY_SIFS_TIME		10
-+#define BPHY_DIFS_TIME		50
-+#define BPHY_PLCP_TIME		192
-+#define BPHY_PLCP_SHORT_TIME	96
-+#define	BPHY_CWMIN		31
-+
-+/* 802.11 G constants */
-+#define DOT11_OFDM_SIGNAL_EXTENSION	6
-+
-+#define PHY_CWMAX		1023
-+
-+#define	DOT11_MAXNUMFRAGS	16	/* max # fragments per MSDU */
-+
-+/* dot11Counters Table - 802.11 spec., Annex D */
-+typedef struct d11cnt {
-+	uint32		txfrag;		/* dot11TransmittedFragmentCount */
-+	uint32		txmulti;	/* dot11MulticastTransmittedFrameCount */
-+	uint32		txfail;		/* dot11FailedCount */
-+	uint32		txretry;	/* dot11RetryCount */
-+	uint32		txretrie;	/* dot11MultipleRetryCount */
-+	uint32		rxdup;		/* dot11FrameduplicateCount */
-+	uint32		txrts;		/* dot11RTSSuccessCount */
-+	uint32		txnocts;	/* dot11RTSFailureCount */
-+	uint32		txnoack;	/* dot11ACKFailureCount */
-+	uint32		rxfrag;		/* dot11ReceivedFragmentCount */
-+	uint32		rxmulti;	/* dot11MulticastReceivedFrameCount */
-+	uint32		rxcrc;		/* dot11FCSErrorCount */
-+	uint32		txfrmsnt;	/* dot11TransmittedFrameCount */
-+	uint32		rxundec;	/* dot11WEPUndecryptableCount */
-+} d11cnt_t;
-+
-+/* BRCM OUI */
-+#define BRCM_OUI		"\x00\x10\x18"
-+
-+/* BRCM info element */
-+struct brcm_ie {
-+	uchar	id;		/* 221, DOT11_MNG_PROPR_ID */
-+	uchar	len;   
-+	uchar 	oui[3];
-+	uchar	ver;
-+	uchar	assoc;		/*  # of assoc STAs */
-+	uchar	flags;		/* misc flags */
-+} PACKED;
-+#define BRCM_IE_LEN		8
-+typedef	struct brcm_ie brcm_ie_t;
-+#define BRCM_IE_VER		2
-+#define BRCM_IE_LEGACY_AES_VER	1
-+
-+/* brcm_ie flags */
-+#define	BRF_ABCAP		0x1	/* afterburner capable */
-+#define	BRF_ABRQRD		0x2	/* afterburner requested */
-+#define	BRF_LZWDS		0x4	/* lazy wds enabled */
-+#define BRF_ABCOUNTER_MASK	0xf0  /* afterburner wds "state" counter */
-+#define BRF_ABCOUNTER_SHIFT	4
-+
-+#define AB_WDS_TIMEOUT_MAX	15		/* afterburner wds Max count indicating not locally capable */
-+#define AB_WDS_TIMEOUT_MIN	1		/* afterburner wds, use zero count as indicating "downrev" */
-+
-+
-+/* OUI for BRCM proprietary IE */
-+#define BRCM_PROP_OUI		"\x00\x90\x4C"
-+
-+/* Vendor IE structure */
-+struct vndr_ie {
-+	uchar id;
-+	uchar len;
-+	uchar oui [3];
-+	uchar data [1]; 	/* Variable size data */
-+}PACKED;
-+typedef struct vndr_ie vndr_ie_t;
-+
-+#define VNDR_IE_HDR_LEN		2	/* id + len field */
-+#define VNDR_IE_MIN_LEN		3	/* size of the oui field */
-+#define VNDR_IE_MAX_LEN		256
-+
-+/* WPA definitions */
-+#define WPA_VERSION		1
-+#define WPA_OUI			"\x00\x50\xF2"
-+
-+#ifdef BCMWPA2
-+#define WPA2_VERSION		1
-+#define WPA2_VERSION_LEN	2
-+#define WPA2_OUI		"\x00\x0F\xAC"
-+#endif /* BCMWPA2 */
-+
-+#define WPA_OUI_LEN	3
-+
-+/* RSN authenticated key managment suite */
-+#define RSN_AKM_NONE		0	/* None (IBSS) */
-+#define RSN_AKM_UNSPECIFIED	1	/* Over 802.1x */
-+#define RSN_AKM_PSK		2	/* Pre-shared Key */
-+
-+
-+/* Key related defines */
-+#define DOT11_MAX_DEFAULT_KEYS	4	/* number of default keys */
-+#define DOT11_MAX_KEY_SIZE	32	/* max size of any key */
-+#define DOT11_MAX_IV_SIZE	16	/* max size of any IV */
-+#define DOT11_EXT_IV_FLAG	(1<<5)	/* flag to indicate IV is > 4 bytes */
-+
-+#define WEP1_KEY_SIZE		5	/* max size of any WEP key */
-+#define WEP1_KEY_HEX_SIZE	10	/* size of WEP key in hex. */
-+#define WEP128_KEY_SIZE		13	/* max size of any WEP key */
-+#define WEP128_KEY_HEX_SIZE	26	/* size of WEP key in hex. */
-+#define TKIP_MIC_SIZE		8	/* size of TKIP MIC */
-+#define TKIP_EOM_SIZE		7	/* max size of TKIP EOM */
-+#define TKIP_EOM_FLAG		0x5a	/* TKIP EOM flag byte */
-+#define TKIP_KEY_SIZE		32	/* size of any TKIP key */
-+#define TKIP_MIC_AUTH_TX	16	/* offset to Authenticator MIC TX key */
-+#define TKIP_MIC_AUTH_RX	24	/* offset to Authenticator MIC RX key */
-+#define TKIP_MIC_SUP_RX		16	/* offset to Supplicant MIC RX key */
-+#define TKIP_MIC_SUP_TX		24	/* offset to Supplicant MIC TX key */
-+#define AES_KEY_SIZE		16	/* size of AES key */
-+
-+#undef PACKED
-+#if !defined(__GNUC__)
-+#pragma pack()
-+#endif
++/* handy */
++#define	SET_REG(r, mask, val)	W_REG((r), ((R_REG(r) & ~(mask)) | (val)))
++#define	MAXPRIO		7	/* 0-7 */
 +
-+#endif /* _802_11_H_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/bcmeth.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/bcmeth.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/bcmeth.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/bcmeth.h	2005-12-16 23:39:10.756825000 +0100
-@@ -0,0 +1,103 @@
++#endif	/* _osl_h_ */
+diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/pcicfg.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/pcicfg.h
+--- linux-2.4.32/arch/mips/bcm947xx/include/pcicfg.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/pcicfg.h	2005-12-16 23:39:10.752824750 +0100
+@@ -0,0 +1,451 @@
 +/*
-+ * Broadcom Ethernettype  protocol definitions
++ * pcicfg.h: PCI configuration  constants and structures.
 + *
 + * Copyright 2005, Broadcom Corporation
 + * All Rights Reserved.
@@ -6065,588 +3185,446 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/bcmeth.h linux-2.4.32-br
 + * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
 + * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
 + *
++ * $Id$
 + */
 +
-+/*
-+ * Broadcom Ethernet protocol defines 
-+ *
-+ */
-+
-+#ifndef _BCMETH_H_
-+#define _BCMETH_H_
++#ifndef	_h_pci_
++#define	_h_pci_
 +
-+/* enable structure packing */
-+#if defined(__GNUC__)
-+#define	PACKED	__attribute__((packed))
-+#else
-+#pragma pack(1)
-+#define	PACKED
++/* The following inside ifndef's so we don't collide with NTDDK.H */
++#ifndef PCI_MAX_BUS
++#define PCI_MAX_BUS		0x100
 +#endif
-+
-+/* ETHER_TYPE_BRCM is defined in ethernet.h */
-+
-+/*
-+ * Following the 2byte BRCM ether_type is a 16bit BRCM subtype field
-+ * in one of two formats: (only subtypes 32768-65535 are in use now)
-+ *
-+ * subtypes 0-32767:
-+ *     8 bit subtype (0-127)
-+ *     8 bit length in bytes (0-255)
-+ *
-+ * subtypes 32768-65535:
-+ *     16 bit big-endian subtype
-+ *     16 bit big-endian length in bytes (0-65535)
-+ *
-+ * length is the number of additional bytes beyond the 4 or 6 byte header
-+ *
-+ * Reserved values:
-+ * 0 reserved
-+ * 5-15 reserved for iLine protocol assignments
-+ * 17-126 reserved, assignable
-+ * 127 reserved
-+ * 32768 reserved
-+ * 32769-65534 reserved, assignable
-+ * 65535 reserved
-+ */
-+
-+/* 
-+ * While adding the subtypes and their specific processing code make sure 
-+ * bcmeth_bcm_hdr_t is the first data structure in the user specific data structure definition 
-+ */
-+
-+#define	BCMILCP_SUBTYPE_RATE		1
-+#define	BCMILCP_SUBTYPE_LINK		2
-+#define	BCMILCP_SUBTYPE_CSA		3
-+#define	BCMILCP_SUBTYPE_LARQ		4
-+#define BCMILCP_SUBTYPE_VENDOR		5
-+#define	BCMILCP_SUBTYPE_FLH		17
-+
-+#define BCMILCP_SUBTYPE_VENDOR_LONG	32769
-+#define BCMILCP_SUBTYPE_CERT		32770
-+#define BCMILCP_SUBTYPE_SES		32771
-+
-+
-+#define BCMILCP_BCM_SUBTYPE_RESERVED	0
-+#define BCMILCP_BCM_SUBTYPE_EVENT		1
-+#define BCMILCP_BCM_SUBTYPE_SES			2
-+/*
-+The EAPOL type is not used anymore. Instead EAPOL messages are now embedded
-+within BCMILCP_BCM_SUBTYPE_EVENT type messages
-+*/
-+/*#define BCMILCP_BCM_SUBTYPE_EAPOL		3*/
-+
-+#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH	8
-+#define BCMILCP_BCM_SUBTYPEHDR_VERSION		0
-+
-+/* These fields are stored in network order */
-+typedef  struct bcmeth_hdr
-+{
-+	uint16	subtype; /* Vendor specific..32769*/
-+	uint16	length; 
-+	uint8	version; /* Version is 0*/
-+	uint8	oui[3]; /* Broadcom OUI*/
-+	/* user specific Data */
-+	uint16	usr_subtype;
-+} PACKED bcmeth_hdr_t;
-+
-+
-+
-+#undef PACKED
-+#if !defined(__GNUC__)
-+#pragma pack()
++#ifndef PCI_MAX_DEVICES
++#define PCI_MAX_DEVICES		0x20
 +#endif
-+
++#ifndef PCI_MAX_FUNCTION
++#define PCI_MAX_FUNCTION	0x8
 +#endif
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/bcmip.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/bcmip.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/bcmip.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/bcmip.h	2005-12-16 23:39:10.756825000 +0100
-@@ -0,0 +1,42 @@
-+/*
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.                      
-+ *                                           
-+ * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;         
-+ * the contents of this file may not be disclosed to third parties, copied      
-+ * or duplicated in any form, in whole or in part, without the prior            
-+ * written permission of Broadcom Corporation.                                  
-+ *
-+ * Fundamental constants relating to IP Protocol
-+ *
-+ * $Id$
-+ */
-+
-+#ifndef _bcmip_h_
-+#define _bcmip_h_
-+
-+/* IP header */
-+#define IPV4_VERIHL_OFFSET	0	/* version and ihl byte offset */
-+#define IPV4_TOS_OFFSET		1	/* TOS offset */
-+#define IPV4_PROT_OFFSET	9	/* protocol type offset */
-+#define IPV4_CHKSUM_OFFSET	10	/* IP header checksum offset */
-+#define IPV4_SRC_IP_OFFSET	12	/* src IP addr offset */
-+#define IPV4_DEST_IP_OFFSET	16	/* dest IP addr offset */
-+
-+#define IPV4_VER_MASK	0xf0
-+#define IPV4_IHL_MASK	0x0f
 +
-+#define IPV4_PROT_UDP	17	/* UDP protocol type */
-+
-+#define IPV4_ADDR_LEN	4	/* IP v4 address length */
++#ifndef PCI_INVALID_VENDORID
++#define PCI_INVALID_VENDORID	0xffff
++#endif
++#ifndef PCI_INVALID_DEVICEID
++#define PCI_INVALID_DEVICEID	0xffff
++#endif
 +
-+#define IPV4_VER_NUM	0x40	/* IP v4 version number */
 +
-+/* NULL IP address check */
-+#define IPV4_ISNULLADDR(a)	((((uint8 *)(a))[0] + ((uint8 *)(a))[1] + \
-+				((uint8 *)(a))[2] + ((uint8 *)(a))[3]) == 0)
++/* Convert between bus-slot-function-register and config addresses */
 +
-+#define IPV4_ADDR_STR_LEN	16
++#define	PCICFG_BUS_SHIFT	16	/* Bus shift */
++#define	PCICFG_SLOT_SHIFT	11	/* Slot shift */
++#define	PCICFG_FUN_SHIFT	8	/* Function shift */
++#define	PCICFG_OFF_SHIFT	0	/* Register shift */
 +
-+#endif	/* #ifndef _bcmip_h_ */
++#define	PCICFG_BUS_MASK		0xff	/* Bus mask */
++#define	PCICFG_SLOT_MASK	0x1f	/* Slot mask */
++#define	PCICFG_FUN_MASK		7	/* Function mask */
++#define	PCICFG_OFF_MASK		0xff	/* Bus mask */
 +
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/ethernet.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/ethernet.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/ethernet.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/ethernet.h	2005-12-16 23:39:10.756825000 +0100
-@@ -0,0 +1,169 @@
-+/*******************************************************************************
-+ * $Id$
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.      
-+ *       
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ * From FreeBSD 2.2.7: Fundamental constants relating to ethernet.
-+ ******************************************************************************/
++#define	PCI_CONFIG_ADDR(b, s, f, o)					\
++		((((b) & PCICFG_BUS_MASK) << PCICFG_BUS_SHIFT)		\
++		 | (((s) & PCICFG_SLOT_MASK) << PCICFG_SLOT_SHIFT)	\
++		 | (((f) & PCICFG_FUN_MASK) << PCICFG_FUN_SHIFT)	\
++		 | (((o) & PCICFG_OFF_MASK) << PCICFG_OFF_SHIFT))
 +
-+#ifndef _NET_ETHERNET_H_	    /* use native BSD ethernet.h when available */
-+#define _NET_ETHERNET_H_
++#define	PCI_CONFIG_BUS(a)	(((a) >> PCICFG_BUS_SHIFT) & PCICFG_BUS_MASK)
++#define	PCI_CONFIG_SLOT(a)	(((a) >> PCICFG_SLOT_SHIFT) & PCICFG_SLOT_MASK)
++#define	PCI_CONFIG_FUN(a)	(((a) >> PCICFG_FUN_SHIFT) & PCICFG_FUN_MASK)
++#define	PCI_CONFIG_OFF(a)	(((a) >> PCICFG_OFF_SHIFT) & PCICFG_OFF_MASK)
 +
-+#ifndef _TYPEDEFS_H_
-+#include "typedefs.h"
-+#endif
++/* PCIE Config space accessing MACROS*/
 +
-+/* enable structure packing */
-+#if defined(__GNUC__)
-+#define	PACKED	__attribute__((packed))
-+#else
-+#pragma pack(1)
-+#define	PACKED
-+#endif
++#define	PCIECFG_BUS_SHIFT	24	/* Bus shift */
++#define	PCIECFG_SLOT_SHIFT	19	/* Slot/Device shift */
++#define	PCIECFG_FUN_SHIFT	16	/* Function shift */
++#define	PCIECFG_OFF_SHIFT	0	/* Register shift */
 +
-+/*
-+ * The number of bytes in an ethernet (MAC) address.
-+ */
-+#define	ETHER_ADDR_LEN		6
++#define	PCIECFG_BUS_MASK	0xff	/* Bus mask */
++#define	PCIECFG_SLOT_MASK	0x1f	/* Slot/Device mask */
++#define	PCIECFG_FUN_MASK	7	/* Function mask */
++#define	PCIECFG_OFF_MASK	0x3ff	/* Register mask */
 +
-+/*
-+ * The number of bytes in the type field.
-+ */
-+#define	ETHER_TYPE_LEN		2
++#define	PCIE_CONFIG_ADDR(b, s, f, o)					\
++		((((b) & PCIECFG_BUS_MASK) << PCIECFG_BUS_SHIFT)		\
++		 | (((s) & PCIECFG_SLOT_MASK) << PCIECFG_SLOT_SHIFT)	\
++		 | (((f) & PCIECFG_FUN_MASK) << PCIECFG_FUN_SHIFT)	\
++		 | (((o) & PCIECFG_OFF_MASK) << PCIECFG_OFF_SHIFT))
 +
-+/*
-+ * The number of bytes in the trailing CRC field.
-+ */
-+#define	ETHER_CRC_LEN		4
++#define	PCIE_CONFIG_BUS(a)	(((a) >> PCIECFG_BUS_SHIFT) & PCIECFG_BUS_MASK)
++#define	PCIE_CONFIG_SLOT(a)	(((a) >> PCIECFG_SLOT_SHIFT) & PCIECFG_SLOT_MASK)
++#define	PCIE_CONFIG_FUN(a)	(((a) >> PCIECFG_FUN_SHIFT) & PCIECFG_FUN_MASK)
++#define	PCIE_CONFIG_OFF(a)	(((a) >> PCIECFG_OFF_SHIFT) & PCIECFG_OFF_MASK)
 +
-+/*
-+ * The length of the combined header.
-+ */
-+#define	ETHER_HDR_LEN		(ETHER_ADDR_LEN*2+ETHER_TYPE_LEN)
++	
++/* The actual config space */
 +
-+/*
-+ * The minimum packet length.
-+ */
-+#define	ETHER_MIN_LEN		64
++#define	PCI_BAR_MAX		6
 +
-+/*
-+ * The minimum packet user data length.
-+ */
-+#define	ETHER_MIN_DATA		46
++#define	PCI_ROM_BAR		8
 +
-+/*
-+ * The maximum packet length.
-+ */
-+#define	ETHER_MAX_LEN		1518
++#define	PCR_RSVDA_MAX		2
 +
-+/*
-+ * The maximum packet user data length.
-+ */
-+#define	ETHER_MAX_DATA		1500
++/* pci config status reg has a bit to indicate that capability ptr is present*/
 +
-+/* ether types */
-+#define	ETHER_TYPE_IP		0x0800		/* IP */
-+#define ETHER_TYPE_ARP		0x0806		/* ARP */
-+#define ETHER_TYPE_8021Q	0x8100		/* 802.1Q */
-+#define	ETHER_TYPE_BRCM		0x886c		/* Broadcom Corp. */
-+#define	ETHER_TYPE_802_1X	0x888e		/* 802.1x */
-+#define	ETHER_TYPE_802_1X_PREAUTH	0x88c7	/* 802.1x preauthentication*/
++#define PCI_CAPPTR_PRESENT	0x0010
 +
-+/* Broadcom subtype follows ethertype;  First 2 bytes are reserved; Next 2 are subtype; */
-+#define	ETHER_BRCM_SUBTYPE_LEN	4		/* Broadcom 4 byte subtype */
-+#define	ETHER_BRCM_CRAM		0x1		/* Broadcom subtype cram protocol */
++typedef struct _pci_config_regs {
++    unsigned short	vendor;
++    unsigned short	device;
++    unsigned short	command;
++    unsigned short	status;
++    unsigned char	rev_id;
++    unsigned char	prog_if;
++    unsigned char	sub_class;
++    unsigned char	base_class;
++    unsigned char	cache_line_size;
++    unsigned char	latency_timer;
++    unsigned char	header_type;
++    unsigned char	bist;
++    unsigned long	base[PCI_BAR_MAX];
++    unsigned long	cardbus_cis;
++    unsigned short	subsys_vendor;
++    unsigned short	subsys_id;
++    unsigned long	baserom;
++    unsigned long	rsvd_a[PCR_RSVDA_MAX];
++    unsigned char	int_line;
++    unsigned char	int_pin;
++    unsigned char	min_gnt;
++    unsigned char	max_lat;
++    unsigned char	dev_dep[192];
++} pci_config_regs;
 +
-+/* ether header */
-+#define ETHER_DEST_OFFSET	0		/* dest address offset */
-+#define ETHER_SRC_OFFSET	6		/* src address offset */
-+#define ETHER_TYPE_OFFSET	12		/* ether type offset */
++#define	SZPCR		(sizeof (pci_config_regs))
++#define	MINSZPCR	64		/* offsetof (dev_dep[0] */
 +
-+/*
-+ * A macro to validate a length with
++/* A structure for the config registers is nice, but in most
++ * systems the config space is not memory mapped, so we need
++ * filed offsetts. :-(
 + */
-+#define	ETHER_IS_VALID_LEN(foo)	\
-+	((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN)
++#define	PCI_CFG_VID		0
++#define	PCI_CFG_DID		2
++#define	PCI_CFG_CMD		4
++#define	PCI_CFG_STAT		6
++#define	PCI_CFG_REV		8
++#define	PCI_CFG_PROGIF		9
++#define	PCI_CFG_SUBCL		0xa
++#define	PCI_CFG_BASECL		0xb
++#define	PCI_CFG_CLSZ		0xc
++#define	PCI_CFG_LATTIM		0xd
++#define	PCI_CFG_HDR		0xe
++#define	PCI_CFG_BIST		0xf
++#define	PCI_CFG_BAR0		0x10
++#define	PCI_CFG_BAR1		0x14
++#define	PCI_CFG_BAR2		0x18
++#define	PCI_CFG_BAR3		0x1c
++#define	PCI_CFG_BAR4		0x20
++#define	PCI_CFG_BAR5		0x24
++#define	PCI_CFG_CIS		0x28
++#define	PCI_CFG_SVID		0x2c
++#define	PCI_CFG_SSID		0x2e
++#define	PCI_CFG_ROMBAR		0x30
++#define PCI_CFG_CAPPTR		0x34
++#define	PCI_CFG_INT		0x3c
++#define	PCI_CFG_PIN		0x3d
++#define	PCI_CFG_MINGNT		0x3e
++#define	PCI_CFG_MAXLAT		0x3f
 +
++/* Classes and subclasses */
 +
-+#ifndef __INCif_etherh     /* Quick and ugly hack for VxWorks */
-+/*
-+ * Structure of a 10Mb/s Ethernet header.
-+ */
-+struct	ether_header {
-+	uint8	ether_dhost[ETHER_ADDR_LEN];
-+	uint8	ether_shost[ETHER_ADDR_LEN];
-+	uint16	ether_type;
-+} PACKED;
++typedef enum {
++    PCI_CLASS_OLD = 0,
++    PCI_CLASS_DASDI,
++    PCI_CLASS_NET,
++    PCI_CLASS_DISPLAY,
++    PCI_CLASS_MMEDIA,
++    PCI_CLASS_MEMORY,
++    PCI_CLASS_BRIDGE,
++    PCI_CLASS_COMM,
++    PCI_CLASS_BASE,
++    PCI_CLASS_INPUT,
++    PCI_CLASS_DOCK,
++    PCI_CLASS_CPU,
++    PCI_CLASS_SERIAL,
++    PCI_CLASS_INTELLIGENT = 0xe,
++    PCI_CLASS_SATELLITE,
++    PCI_CLASS_CRYPT,
++    PCI_CLASS_DSP,
++    PCI_CLASS_MAX
++} pci_classes;
 +
-+/*
-+ * Structure of a 48-bit Ethernet address.
-+ */
-+struct	ether_addr {
-+	uint8 octet[ETHER_ADDR_LEN];
-+} PACKED;
-+#endif
++typedef enum {
++    PCI_DASDI_SCSI,
++    PCI_DASDI_IDE,
++    PCI_DASDI_FLOPPY,
++    PCI_DASDI_IPI,
++    PCI_DASDI_RAID,
++    PCI_DASDI_OTHER = 0x80
++} pci_dasdi_subclasses;
 +
-+/*
-+ * Takes a pointer, sets locally admininistered 
-+ * address bit in the 48-bit Ethernet address.
-+ */
-+#define ETHER_SET_LOCALADDR(ea) ( ((uint8 *)(ea))[0] = \
-+				(((uint8 *)(ea))[0] | 2) )
++typedef enum {
++    PCI_NET_ETHER,
++    PCI_NET_TOKEN,
++    PCI_NET_FDDI,
++    PCI_NET_ATM,
++    PCI_NET_OTHER = 0x80
++} pci_net_subclasses;
 +
-+/*
-+ * Takes a pointer, returns true if a 48-bit multicast address
-+ * (including broadcast, since it is all ones)
-+ */
-+#define ETHER_ISMULTI(ea) (((uint8 *)(ea))[0] & 1)
++typedef enum {
++    PCI_DISPLAY_VGA,
++    PCI_DISPLAY_XGA,
++    PCI_DISPLAY_3D,
++    PCI_DISPLAY_OTHER = 0x80
++} pci_display_subclasses;
 +
++typedef enum {
++    PCI_MMEDIA_VIDEO,
++    PCI_MMEDIA_AUDIO,
++    PCI_MMEDIA_PHONE,
++    PCI_MEDIA_OTHER = 0x80
++} pci_mmedia_subclasses;
 +
-+/* compare two ethernet addresses - assumes the pointers can be referenced as shorts */
-+#define	ether_cmp(a, b)	( \
-+	!(((short*)a)[0] == ((short*)b)[0]) | \
-+	!(((short*)a)[1] == ((short*)b)[1]) | \
-+	!(((short*)a)[2] == ((short*)b)[2]))
++typedef enum {
++    PCI_MEMORY_RAM,
++    PCI_MEMORY_FLASH,
++    PCI_MEMORY_OTHER = 0x80
++} pci_memory_subclasses;
 +
-+/* copy an ethernet address - assumes the pointers can be referenced as shorts */
-+#define	ether_copy(s, d) { \
-+	((short*)d)[0] = ((short*)s)[0]; \
-+	((short*)d)[1] = ((short*)s)[1]; \
-+	((short*)d)[2] = ((short*)s)[2]; }
++typedef enum {
++    PCI_BRIDGE_HOST,
++    PCI_BRIDGE_ISA,
++    PCI_BRIDGE_EISA,
++    PCI_BRIDGE_MC,
++    PCI_BRIDGE_PCI,
++    PCI_BRIDGE_PCMCIA,
++    PCI_BRIDGE_NUBUS,
++    PCI_BRIDGE_CARDBUS,
++    PCI_BRIDGE_RACEWAY,
++    PCI_BRIDGE_OTHER = 0x80
++} pci_bridge_subclasses;
 +
-+/*
-+ * Takes a pointer, returns true if a 48-bit broadcast (all ones)
-+ */
-+#define ETHER_ISBCAST(ea) ((((uint8 *)(ea))[0] &		\
-+			    ((uint8 *)(ea))[1] &		\
-+			    ((uint8 *)(ea))[2] &		\
-+			    ((uint8 *)(ea))[3] &		\
-+			    ((uint8 *)(ea))[4] &		\
-+			    ((uint8 *)(ea))[5]) == 0xff)
++typedef enum {
++    PCI_COMM_UART,
++    PCI_COMM_PARALLEL,
++    PCI_COMM_MULTIUART,
++    PCI_COMM_MODEM,
++    PCI_COMM_OTHER = 0x80
++} pci_comm_subclasses;
 +
-+static const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}};
++typedef enum {
++    PCI_BASE_PIC,
++    PCI_BASE_DMA,
++    PCI_BASE_TIMER,
++    PCI_BASE_RTC,
++    PCI_BASE_PCI_HOTPLUG,
++    PCI_BASE_OTHER = 0x80
++} pci_base_subclasses;
 +
-+/*
-+ * Takes a pointer, returns true if a 48-bit null address (all zeros)
-+ */
-+#define ETHER_ISNULLADDR(ea) ((((uint8 *)(ea))[0] |		\
-+			    ((uint8 *)(ea))[1] |		\
-+			    ((uint8 *)(ea))[2] |		\
-+			    ((uint8 *)(ea))[3] |		\
-+			    ((uint8 *)(ea))[4] |		\
-+			    ((uint8 *)(ea))[5]) == 0)
-+
-+/* Differentiated Services Codepoint - upper 6 bits of tos in iphdr */
-+#define	DSCP_MASK		0xFC		/* upper 6 bits */
-+#define	DSCP_SHIFT		2
-+#define	DSCP_WME_PRI_MASK	0xE0		/* upper 3 bits */
-+#define	DSCP_WME_PRI_SHIFT	5
-+
-+#undef PACKED
-+#if !defined(__GNUC__)
-+#pragma pack()
-+#endif
++typedef enum {
++    PCI_INPUT_KBD,
++    PCI_INPUT_PEN,
++    PCI_INPUT_MOUSE,
++    PCI_INPUT_SCANNER,
++    PCI_INPUT_GAMEPORT,
++    PCI_INPUT_OTHER = 0x80
++} pci_input_subclasses;
 +
-+#endif /* _NET_ETHERNET_H_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/vlan.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/vlan.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/vlan.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/vlan.h	2005-12-16 23:39:10.756825000 +0100
-@@ -0,0 +1,50 @@
-+/*
-+ * 802.1Q VLAN protocol definitions
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
++typedef enum {
++    PCI_DOCK_GENERIC,
++    PCI_DOCK_OTHER = 0x80
++} pci_dock_subclasses;
 +
-+#ifndef _vlan_h_
-+#define _vlan_h_
++typedef enum {
++    PCI_CPU_386,
++    PCI_CPU_486,
++    PCI_CPU_PENTIUM,
++    PCI_CPU_ALPHA = 0x10,
++    PCI_CPU_POWERPC = 0x20,
++    PCI_CPU_MIPS = 0x30,
++    PCI_CPU_COPROC = 0x40,
++    PCI_CPU_OTHER = 0x80
++} pci_cpu_subclasses;
 +
-+/* enable structure packing */
-+#if defined(__GNUC__)
-+#define	PACKED	__attribute__((packed))
-+#else
-+#pragma pack(1)
-+#define	PACKED
-+#endif
++typedef enum {
++    PCI_SERIAL_IEEE1394,
++    PCI_SERIAL_ACCESS,
++    PCI_SERIAL_SSA,
++    PCI_SERIAL_USB,
++    PCI_SERIAL_FIBER,
++    PCI_SERIAL_SMBUS,
++    PCI_SERIAL_OTHER = 0x80
++} pci_serial_subclasses;
 +
-+#define VLAN_VID_MASK		0xfff	/* low 12 bits are vlan id */
-+#define	VLAN_CFI_SHIFT		12	/* canonical format indicator bit */
-+#define VLAN_PRI_SHIFT		13	/* user priority */
++typedef enum {
++    PCI_INTELLIGENT_I2O,
++} pci_intelligent_subclasses;
 +
-+#define VLAN_PRI_MASK		7	/* 3 bits of priority */
++typedef enum {
++    PCI_SATELLITE_TV,
++    PCI_SATELLITE_AUDIO,
++    PCI_SATELLITE_VOICE,
++    PCI_SATELLITE_DATA,
++    PCI_SATELLITE_OTHER = 0x80
++} pci_satellite_subclasses;
 +
-+#define	VLAN_TAG_LEN		4
-+#define	VLAN_TAG_OFFSET		(2 * ETHER_ADDR_LEN)
++typedef enum {
++    PCI_CRYPT_NETWORK,
++    PCI_CRYPT_ENTERTAINMENT,
++    PCI_CRYPT_OTHER = 0x80
++} pci_crypt_subclasses;
 +
-+struct ethervlan_header {
-+	uint8	ether_dhost[ETHER_ADDR_LEN];
-+	uint8	ether_shost[ETHER_ADDR_LEN];
-+	uint16	vlan_type;		/* 0x8100 */
-+	uint16	vlan_tag;		/* priority, cfi and vid */
-+	uint16	ether_type;
-+};
++typedef enum {
++    PCI_DSP_DPIO,
++    PCI_DSP_OTHER = 0x80
++} pci_dsp_subclasses;
 +
-+#define	ETHERVLAN_HDR_LEN	(ETHER_HDR_LEN + VLAN_TAG_LEN)
++/* Header types */
++typedef enum {
++	PCI_HEADER_NORMAL,
++	PCI_HEADER_BRIDGE,
++	PCI_HEADER_CARDBUS
++} pci_header_types;
 +
-+#undef PACKED
-+#if !defined(__GNUC__)
-+#pragma pack()
-+#endif
 +
-+#endif /* _vlan_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/proto/wpa.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/wpa.h
---- linux-2.4.32/arch/mips/bcm947xx/include/proto/wpa.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/proto/wpa.h	2005-12-16 23:39:10.756825000 +0100
-@@ -0,0 +1,140 @@
-+/*
-+ * Fundamental types and constants relating to WPA
-+ *
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.      
-+ *       
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ *
-+ * $Id$
-+ */
++/* Overlay for a PCI-to-PCI bridge */
 +
-+#ifndef _proto_wpa_h_
-+#define _proto_wpa_h_
++#define	PPB_RSVDA_MAX		2
++#define	PPB_RSVDD_MAX		8
 +
-+#include <typedefs.h>
-+#include <proto/ethernet.h>
++typedef struct _ppb_config_regs {
++    unsigned short	vendor;
++    unsigned short	device;
++    unsigned short	command;
++    unsigned short	status;
++    unsigned char	rev_id;
++    unsigned char	prog_if;
++    unsigned char	sub_class;
++    unsigned char	base_class;
++    unsigned char	cache_line_size;
++    unsigned char	latency_timer;
++    unsigned char	header_type;
++    unsigned char	bist;
++    unsigned long	rsvd_a[PPB_RSVDA_MAX];
++    unsigned char	prim_bus;
++    unsigned char	sec_bus;
++    unsigned char	sub_bus;
++    unsigned char	sec_lat;
++    unsigned char	io_base;
++    unsigned char	io_lim;
++    unsigned short	sec_status;
++    unsigned short	mem_base;
++    unsigned short	mem_lim;
++    unsigned short	pf_mem_base;
++    unsigned short	pf_mem_lim;
++    unsigned long	pf_mem_base_hi;
++    unsigned long	pf_mem_lim_hi;
++    unsigned short	io_base_hi;
++    unsigned short	io_lim_hi;
++    unsigned short	subsys_vendor;
++    unsigned short	subsys_id;
++    unsigned long	rsvd_b;
++    unsigned char	rsvd_c;
++    unsigned char	int_pin;
++    unsigned short	bridge_ctrl;
++    unsigned char	chip_ctrl;
++    unsigned char	diag_ctrl;
++    unsigned short	arb_ctrl;
++    unsigned long	rsvd_d[PPB_RSVDD_MAX];
++    unsigned char	dev_dep[192];
++} ppb_config_regs;
 +
-+/* enable structure packing */
-+#if defined(__GNUC__)
-+#define	PACKED	__attribute__((packed))
-+#else
-+#pragma pack(1)
-+#define	PACKED
-+#endif
 +
-+/* Reason Codes */
-+
-+/* 10 and 11 are from TGh. */
-+#define DOT11_RC_BAD_PC				10	/* Unacceptable power capability element */
-+#define DOT11_RC_BAD_CHANNELS			11	/* Unacceptable supported channels element */
-+/* 12 is unused */
-+/* 13 through 23 taken from P802.11i/D3.0, November 2002 */
-+#define DOT11_RC_INVALID_WPA_IE			13	/* Invalid info. element */
-+#define DOT11_RC_MIC_FAILURE			14	/* Michael failure */
-+#define DOT11_RC_4WH_TIMEOUT			15	/* 4-way handshake timeout */
-+#define DOT11_RC_GTK_UPDATE_TIMEOUT		16	/* Group key update timeout */
-+#define DOT11_RC_WPA_IE_MISMATCH		17	/* WPA IE in 4-way handshake differs from (re-)assoc. request/probe response */
-+#define DOT11_RC_INVALID_MC_CIPHER		18	/* Invalid multicast cipher */
-+#define DOT11_RC_INVALID_UC_CIPHER		19	/* Invalid unicast cipher */
-+#define DOT11_RC_INVALID_AKMP			20	/* Invalid authenticated key management protocol */
-+#define DOT11_RC_BAD_WPA_VERSION		21	/* Unsupported WPA version */
-+#define DOT11_RC_INVALID_WPA_CAP		22	/* Invalid WPA IE capabilities */
-+#define DOT11_RC_8021X_AUTH_FAIL		23	/* 802.1X authentication failure */
-+
-+#define WPA2_PMKID_LEN	16
-+
-+/* WPA IE fixed portion */
-+typedef struct
-+{
-+	uint8 tag;	/* TAG */
-+	uint8 length;	/* TAG length */
-+	uint8 oui[3];	/* IE OUI */
-+	uint8 oui_type;	/* OUI type */
-+	struct {
-+		uint8 low;
-+		uint8 high;
-+	} PACKED version;	/* IE version */
-+} PACKED wpa_ie_fixed_t;
-+#define WPA_IE_OUITYPE_LEN	4
-+#define WPA_IE_FIXED_LEN	8
-+#define WPA_IE_TAG_FIXED_LEN	6
++/* PCI CAPABILITY DEFINES */
++#define PCI_CAP_POWERMGMTCAP_ID		0x01
++#define PCI_CAP_MSICAP_ID		0x05
++#define PCI_CAP_PCIECAP_ID		0x10
 +
-+typedef struct {
-+	uint8 tag;	/* TAG */
-+	uint8 length;	/* TAG length */
-+	struct {
-+		uint8 low;
-+		uint8 high;
-+	} PACKED version;	/* IE version */
-+} PACKED wpa_rsn_ie_fixed_t;
-+#define WPA_RSN_IE_FIXED_LEN	4
-+#define WPA_RSN_IE_TAG_FIXED_LEN	2
-+typedef uint8 wpa_pmkid_t[WPA2_PMKID_LEN];
-+
-+/* WPA suite/multicast suite */
-+typedef struct
-+{
-+	uint8 oui[3];
-+	uint8 type;
-+} PACKED wpa_suite_t, wpa_suite_mcast_t;
-+#define WPA_SUITE_LEN	4
-+
-+/* WPA unicast suite list/key management suite list */
-+typedef struct
-+{
-+	struct {
-+		uint8 low;
-+		uint8 high;
-+	} PACKED count;
-+	wpa_suite_t list[1];
-+} PACKED wpa_suite_ucast_t, wpa_suite_auth_key_mgmt_t;
-+#define WPA_IE_SUITE_COUNT_LEN	2
-+typedef struct
-+{
-+	struct {
-+		uint8 low;
-+		uint8 high;
-+	} PACKED count;
-+	wpa_pmkid_t list[1];
-+} PACKED wpa_pmkid_list_t;
-+
-+/* WPA cipher suites */
-+#define WPA_CIPHER_NONE		0	/* None */
-+#define WPA_CIPHER_WEP_40	1	/* WEP (40-bit) */
-+#define WPA_CIPHER_TKIP		2	/* TKIP: default for WPA */
-+#define WPA_CIPHER_AES_OCB	3	/* AES (OCB) */
-+#define WPA_CIPHER_AES_CCM	4	/* AES (CCM) */
-+#define WPA_CIPHER_WEP_104	5	/* WEP (104-bit) */
-+
-+#define IS_WPA_CIPHER(cipher)	((cipher) == WPA_CIPHER_NONE || \
-+				 (cipher) == WPA_CIPHER_WEP_40 || \
-+				 (cipher) == WPA_CIPHER_WEP_104 || \
-+				 (cipher) == WPA_CIPHER_TKIP || \
-+				 (cipher) == WPA_CIPHER_AES_OCB || \
-+				 (cipher) == WPA_CIPHER_AES_CCM)
-+
-+/* WPA TKIP countermeasures parameters */
-+#define WPA_TKIP_CM_DETECT	60	/* multiple MIC failure window (seconds) */
-+#define WPA_TKIP_CM_BLOCK	60	/* countermeasures active window (seconds) */
-+
-+/* WPA capabilities defined in 802.11i */
-+#define WPA_CAP_4_REPLAY_CNTRS		2
-+#define WPA_CAP_16_REPLAY_CNTRS		3
-+#define WPA_CAP_REPLAY_CNTR_SHIFT	2
-+#define WPA_CAP_REPLAY_CNTR_MASK	0x000c
-+
-+/* WPA Specific defines */
-+#define WPA_CAP_LEN	2
-+
-+#define	WPA_CAP_WPA2_PREAUTH		1
-+
-+#undef PACKED
-+#if !defined(__GNUC__)
-+#pragma pack()
-+#endif
++/* Data structure to define the Message Signalled Interrupt facility 
++ * Valid for PCI and PCIE configurations */
++typedef struct _pciconfig_cap_msi {
++	unsigned char capID;
++	unsigned char nextptr;
++	unsigned short msgctrl;
++	unsigned int msgaddr;
++} pciconfig_cap_msi;
 +
-+#endif /* _proto_wpa_h_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/rts/crc.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/rts/crc.h
---- linux-2.4.32/arch/mips/bcm947xx/include/rts/crc.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/rts/crc.h	2005-12-16 23:39:10.928835750 +0100
-@@ -0,0 +1,69 @@
-+/*******************************************************************************
-+ * $Id$
-+ * Copyright 2005, Broadcom Corporation      
-+ * All Rights Reserved.      
-+ *       
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY      
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM      
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS      
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.      
-+ * crc.h - a function to compute crc for iLine10 headers
-+ ******************************************************************************/
++/* Data structure to define the Power managment facility
++ * Valid for PCI and PCIE configurations */
++typedef struct _pciconfig_cap_pwrmgmt {
++	unsigned char capID;
++	unsigned char nextptr;
++	unsigned short pme_cap;
++	unsigned short  pme_sts_ctrl; 
++	unsigned char  pme_bridge_ext;
++	unsigned char  data;
++} pciconfig_cap_pwrmgmt;
 +
-+#ifndef _RTS_CRC_H_
-+#define _RTS_CRC_H_ 1
++/* Data structure to define the PCIE capability */
++typedef struct _pciconfig_cap_pcie {
++	unsigned char capID;
++	unsigned char nextptr;
++	unsigned short pcie_cap;
++	unsigned int  dev_cap;
++	unsigned short dev_ctrl;
++	unsigned short dev_status;
++	unsigned int  link_cap;
++	unsigned short link_ctrl;
++	unsigned short link_status;
++} pciconfig_cap_pcie;
 +
-+#include "typedefs.h"
++/* PCIE Enhanced CAPABILITY DEFINES */
++#define PCIE_EXTCFG_OFFSET	0x100
++#define PCIE_ADVERRREP_CAPID	0x0001
++#define PCIE_VC_CAPID		0x0002
++#define PCIE_DEVSNUM_CAPID	0x0003
++#define PCIE_PWRBUDGET_CAPID	0x0004
 +
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
++/* Header to define the PCIE specific capabilities in the extended config space */
++typedef struct _pcie_enhanced_caphdr {
++	unsigned short capID;
++	unsigned short cap_ver : 4;
++	unsigned short next_ptr : 12;
++} pcie_enhanced_caphdr;
 +
 +
-+#define CRC8_INIT_VALUE  0xff       /* Initial CRC8 checksum value */
-+#define CRC8_GOOD_VALUE  0x9f       /* Good final CRC8 checksum value */
-+#define HCS_GOOD_VALUE   0x39       /* Good final header checksum value */
++/* Everything below is BRCM HND proprietary */
 +
-+#define CRC16_INIT_VALUE 0xffff     /* Initial CRC16 checksum value */
-+#define CRC16_GOOD_VALUE 0xf0b8     /* Good final CRC16 checksum value */
++#define	PCI_BAR0_WIN		0x80	/* backplane addres space accessed by BAR0 */
++#define	PCI_BAR1_WIN		0x84	/* backplane addres space accessed by BAR1 */
++#define	PCI_SPROM_CONTROL	0x88	/* sprom property control */
++#define	PCI_BAR1_CONTROL	0x8c	/* BAR1 region burst control */
++#define	PCI_INT_STATUS		0x90	/* PCI and other cores interrupts */
++#define	PCI_INT_MASK		0x94	/* mask of PCI and other cores interrupts */
++#define PCI_TO_SB_MB		0x98	/* signal backplane interrupts */
++#define PCI_BACKPLANE_ADDR	0xA0	/* address an arbitrary location on the system backplane */
++#define PCI_BACKPLANE_DATA	0xA4	/* data at the location specified by above address register */
++#define	PCI_GPIO_IN		0xb0	/* pci config space gpio input (>=rev3) */
++#define	PCI_GPIO_OUT		0xb4	/* pci config space gpio output (>=rev3) */
++#define	PCI_GPIO_OUTEN		0xb8	/* pci config space gpio output enable (>=rev3) */
 +
-+#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
-+#define CRC32_GOOD_VALUE 0xdebb20e3 /* Good final CRC32 checksum value */
++#define	PCI_BAR0_SPROM_OFFSET	(4 * 1024)	/* bar0 + 4K accesses external sprom */
++#define	PCI_BAR0_PCIREGS_OFFSET	(6 * 1024)	/* bar0 + 6K accesses pci core registers */
 +
-+void   hcs(uint8 *, uint);
-+uint8  crc8(uint8 *, uint, uint8);
-+uint16 crc16(uint8 *, uint, uint16);
-+uint32 crc32(uint8 *, uint, uint32);
++/* PCI_INT_STATUS */
++#define	PCI_SBIM_STATUS_SERR	0x4	/* backplane SBErr interrupt status */
 +
-+/* macros for common usage */
++/* PCI_INT_MASK */
++#define	PCI_SBIM_SHIFT		8	/* backplane core interrupt mask bits offset */
++#define	PCI_SBIM_MASK		0xff00	/* backplane core interrupt mask */
++#define	PCI_SBIM_MASK_SERR	0x4	/* backplane SBErr interrupt mask */
 +
-+#define APPEND_CRC8(pbytes, nbytes)                           \
-+do {                                                          \
-+    uint8 tmp = crc8(pbytes, nbytes, CRC8_INIT_VALUE) ^ 0xff; \
-+    (pbytes)[(nbytes)] = tmp;                                 \
-+    (nbytes) += 1;                                            \
-+} while (0)
++/* PCI_SPROM_CONTROL */
++#define	SPROM_BLANK		0x04  	/* indicating a blank sprom */
++#define SPROM_WRITEEN		0x10	/* sprom write enable */
++#define SPROM_BOOTROM_WE	0x20	/* external bootrom write enable */
 +
-+#define APPEND_CRC16(pbytes, nbytes)                               \
-+do {                                                               \
-+    uint16 tmp = crc16(pbytes, nbytes, CRC16_INIT_VALUE) ^ 0xffff; \
-+    (pbytes)[(nbytes) + 0] = (tmp >> 0) & 0xff;                    \
-+    (pbytes)[(nbytes) + 1] = (tmp >> 8) & 0xff;                    \
-+    (nbytes) += 2;                                                 \
-+} while (0)
++#define	SPROM_SIZE		256	/* sprom size in 16-bit */
++#define SPROM_CRC_RANGE		64	/* crc cover range in 16-bit */
 +
-+#define APPEND_CRC32(pbytes, nbytes)                                   \
-+do {                                                                   \
-+    uint32 tmp = crc32(pbytes, nbytes, CRC32_INIT_VALUE) ^ 0xffffffff; \
-+    (pbytes)[(nbytes) + 0] = (tmp >>  0) & 0xff;                       \
-+    (pbytes)[(nbytes) + 1] = (tmp >>  8) & 0xff;                       \
-+    (pbytes)[(nbytes) + 2] = (tmp >> 16) & 0xff;                       \
-+    (pbytes)[(nbytes) + 3] = (tmp >> 24) & 0xff;                       \
-+    (nbytes) += 4;                                                     \
-+} while (0)
++/* PCI_CFG_CMD_STAT */
++#define PCI_CFG_CMD_STAT_TA	0x08000000	/* target abort status */
 +
-+#ifdef __cplusplus
-+}
 +#endif
-+
-+#endif /* _RTS_CRC_H_ */
 diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/sbchipc.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/sbchipc.h
 --- linux-2.4.32/arch/mips/bcm947xx/include/sbchipc.h	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/sbchipc.h	2005-12-16 23:39:10.932836000 +0100
@@ -9367,1040 +6345,6 @@ diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/typedefs.h linux-2.4.32-brcm/a
 +#endif /* USE_TYPEDEF_DEFAULTS */
 +
 +#endif /* _TYPEDEFS_H_ */
-diff -Nur linux-2.4.32/arch/mips/bcm947xx/include/wlioctl.h linux-2.4.32-brcm/arch/mips/bcm947xx/include/wlioctl.h
---- linux-2.4.32/arch/mips/bcm947xx/include/wlioctl.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.4.32-brcm/arch/mips/bcm947xx/include/wlioctl.h	2005-12-16 23:39:10.940836500 +0100
-@@ -0,0 +1,1030 @@
-+/*
-+ * Custom OID/ioctl definitions for
-+ * Broadcom 802.11abg Networking Device Driver
-+ *
-+ * Definitions subject to change without notice.
-+ *
-+ * Copyright 2005, Broadcom Corporation
-+ * All Rights Reserved.
-+ * 
-+ * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
-+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
-+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
-+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ *
-+ * $Id$
-+ */
-+
-+#ifndef _wlioctl_h_
-+#define	_wlioctl_h_
-+
-+#include <typedefs.h>
-+#include <proto/ethernet.h>
-+#include <proto/bcmeth.h>
-+#include <proto/bcmevent.h>
-+#include <proto/802.11.h>
-+
-+/* require default structure packing */
-+#if !defined(__GNUC__)
-+#pragma pack(push,8)
-+#endif
-+
-+#define WL_NUMRATES		255	/* max # of rates in a rateset */
-+
-+typedef struct wl_rateset {
-+	uint32	count;			/* # rates in this set */
-+	uint8	rates[WL_NUMRATES];	/* rates in 500kbps units w/hi bit set if basic */
-+} wl_rateset_t;
-+
-+#define WL_CHANSPEC_CHAN_MASK	0x0fff
-+#define WL_CHANSPEC_BAND_MASK	0xf000
-+#define WL_CHANSPEC_BAND_SHIFT	12
-+#define WL_CHANSPEC_BAND_A	0x1000
-+#define WL_CHANSPEC_BAND_B	0x2000
-+
-+/*
-+ * Per-bss information structure.
-+ */
-+
-+#define	WL_BSS_INFO_VERSION		107	/* current version of wl_bss_info struct */
-+
-+typedef struct wl_bss_info {
-+	uint32		version;	/* version field */
-+	uint32		length;		/* byte length of data in this record, starting at version and including IEs */
-+	struct ether_addr BSSID;
-+	uint16		beacon_period;	/* units are Kusec */
-+	uint16		capability;	/* Capability information */
-+	uint8		SSID_len;
-+	uint8		SSID[32];
-+	struct {
-+		uint	count;		/* # rates in this set */
-+		uint8	rates[16];	/* rates in 500kbps units w/hi bit set if basic */
-+	} rateset;			/* supported rates */
-+	uint8		channel;	/* Channel no. */
-+	uint16		atim_window;	/* units are Kusec */
-+	uint8		dtim_period;	/* DTIM period */
-+	int16		RSSI;		/* receive signal strength (in dBm) */
-+	int8		phy_noise;	/* noise (in dBm) */
-+	uint32		ie_length;	/* byte length of Information Elements */
-+	/* variable length Information Elements */
-+} wl_bss_info_t;
-+
-+typedef struct wlc_ssid {
-+	uint32		SSID_len;
-+	uchar		SSID[32];
-+} wlc_ssid_t;
-+
-+typedef struct wl_scan_params {
-+	wlc_ssid_t ssid;	/* default is {0, ""} */
-+	struct ether_addr bssid;/* default is bcast */
-+	int8 bss_type;		/* default is any, DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT */
-+	int8 scan_type;		/* -1 use default, DOT11_SCANTYPE_ACTIVE/PASSIVE */
-+	int32 nprobes;		/* -1 use default, number of probes per channel */
-+	int32 active_time;	/* -1 use default, dwell time per channel for active scanning */
-+	int32 passive_time;	/* -1 use default, dwell time per channel for passive scanning */
-+	int32 home_time;	/* -1 use default, dwell time for the home channel between channel scans */
-+	int32 channel_num;	/* 0 use default (all available channels), count of channels in channel_list */
-+	uint16 channel_list[1];	/* list of chanspecs */
-+} wl_scan_params_t;
-+/* size of wl_scan_params not including variable length array */
-+#define WL_SCAN_PARAMS_FIXED_SIZE 64
-+
-+typedef struct wl_scan_results {
-+	uint32 buflen;
-+	uint32 version;
-+	uint32 count;
-+	wl_bss_info_t bss_info[1];
-+} wl_scan_results_t;
-+/* size of wl_scan_results not including variable length array */
-+#define WL_SCAN_RESULTS_FIXED_SIZE 12
-+
-+/* uint32 list */
-+typedef struct wl_uint32_list {
-+	/* in - # of elements, out - # of entries */
-+	uint32 count;
-+	/* variable length uint32 list */
-+	uint32 element[1];
-+} wl_uint32_list_t;
-+
-+#define WLC_CNTRY_BUF_SZ	4		/* Country string is 3 bytes + NULL */
-+
-+typedef struct wl_channels_in_country {
-+	uint32 buflen;
-+	uint32 band;
-+	char country_abbrev[WLC_CNTRY_BUF_SZ];
-+	uint32 count;
-+	uint32 channel[1];
-+} wl_channels_in_country_t;
-+
-+typedef struct wl_country_list {
-+	uint32 buflen;
-+	uint32 band_set;
-+	uint32 band;
-+	uint32 count;
-+	char country_abbrev[1];
-+} wl_country_list_t;
-+
-+#define WL_RM_TYPE_BASIC	1
-+#define WL_RM_TYPE_CCA		2
-+#define WL_RM_TYPE_RPI		3
-+
-+#define WL_RM_FLAG_PARALLEL	(1<<0)
-+
-+#define WL_RM_FLAG_LATE		(1<<1)
-+#define WL_RM_FLAG_INCAPABLE	(1<<2)
-+#define WL_RM_FLAG_REFUSED	(1<<3)
-+
-+typedef struct wl_rm_req_elt {
-+	int8	type;
-+	int8	flags;
-+	uint16	chanspec;
-+	uint32	token;		/* token for this measurement */
-+	uint32	tsf_h;		/* TSF high 32-bits of Measurement start time */
-+	uint32	tsf_l;		/* TSF low 32-bits */
-+	uint32	dur;		/* TUs */
-+} wl_rm_req_elt_t;
-+
-+typedef struct wl_rm_req {
-+	uint32	token;		/* overall measurement set token */
-+	uint32	count;		/* number of measurement reqests */
-+	wl_rm_req_elt_t	req[1];	/* variable length block of requests */
-+} wl_rm_req_t;
-+#define WL_RM_REQ_FIXED_LEN	8
-+
-+typedef struct wl_rm_rep_elt {
-+	int8	type;
-+	int8	flags;
-+	uint16	chanspec;
-+	uint32	token;		/* token for this measurement */
-+	uint32	tsf_h;		/* TSF high 32-bits of Measurement start time */
-+	uint32	tsf_l;		/* TSF low 32-bits */
-+	uint32	dur;		/* TUs */
-+	uint32	len;		/* byte length of data block */
-+	uint8	data[1];	/* variable length data block */
-+} wl_rm_rep_elt_t;
-+#define WL_RM_REP_ELT_FIXED_LEN	24	/* length excluding data block */
-+
-+#define WL_RPI_REP_BIN_NUM 8
-+typedef struct wl_rm_rpi_rep {
-+	uint8	rpi[WL_RPI_REP_BIN_NUM];
-+	int8	rpi_max[WL_RPI_REP_BIN_NUM];
-+} wl_rm_rpi_rep_t;
-+
-+typedef struct wl_rm_rep {
-+	uint32	token;		/* overall measurement set token */
-+	uint32	len;		/* length of measurement report block */
-+	wl_rm_rep_elt_t	rep[1];	/* variable length block of reports */
-+} wl_rm_rep_t;
-+#define WL_RM_REP_FIXED_LEN	8
-+
-+
-+#if defined(BCMSUP_PSK)
-+typedef enum sup_auth_status {
-+	WLC_SUP_DISCONNECTED = 0,
-+	WLC_SUP_CONNECTING,
-+	WLC_SUP_IDREQUIRED,
-+	WLC_SUP_AUTHENTICATING,
-+	WLC_SUP_AUTHENTICATED,
-+	WLC_SUP_KEYXCHANGE,
-+	WLC_SUP_KEYED,
-+	WLC_SUP_TIMEOUT
-+} sup_auth_status_t;
-+#endif	/* BCMCCX | BCMSUP_PSK */
-+
-+/* Enumerate crypto algorithms */
-+#define	CRYPTO_ALGO_OFF			0
-+#define	CRYPTO_ALGO_WEP1		1
-+#define	CRYPTO_ALGO_TKIP		2
-+#define	CRYPTO_ALGO_WEP128		3
-+#define CRYPTO_ALGO_AES_CCM		4
-+#define CRYPTO_ALGO_AES_OCB_MSDU	5
-+#define CRYPTO_ALGO_AES_OCB_MPDU	6
-+#define CRYPTO_ALGO_NALG		7
-+
-+#define WSEC_GEN_MIC_ERROR	0x0001
-+#define WSEC_GEN_REPLAY		0x0002
-+
-+#define WL_SOFT_KEY	(1 << 0)	/* Indicates this key is using soft encrypt */
-+#define WL_PRIMARY_KEY	(1 << 1)	/* Indicates this key is the primary (ie tx) key */
-+#define WL_KF_RES_4	(1 << 4)	/* Reserved for backward compat */
-+#define WL_KF_RES_5	(1 << 5)	/* Reserved for backward compat */
-+
-+typedef struct wl_wsec_key {
-+	uint32		index;		/* key index */
-+	uint32		len;		/* key length */
-+	uint8		data[DOT11_MAX_KEY_SIZE];	/* key data */
-+	uint32		pad_1[18];
-+	uint32		algo;		/* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */
-+	uint32		flags;		/* misc flags */
-+	uint32		pad_2[2];
-+	int		pad_3;
-+	int		iv_initialized;	/* has IV been initialized already? */
-+	int		pad_4;
-+	/* Rx IV */
-+	struct {
-+		uint32	hi;		/* upper 32 bits of IV */
-+		uint16	lo;		/* lower 16 bits of IV */
-+	} rxiv;
-+	uint32		pad_5[2];
-+	struct ether_addr ea;		/* per station */
-+} wl_wsec_key_t;
-+
-+
-+#define WSEC_MIN_PSK_LEN	8
-+#define WSEC_MAX_PSK_LEN	64
-+
-+/* Flag for key material needing passhash'ing */
-+#define WSEC_PASSPHRASE		(1<<0)
-+
-+/* recepticle for WLC_SET_WSEC_PMK parameter */
-+typedef struct {
-+	ushort	key_len;		/* octets in key material */
-+	ushort	flags;			/* key handling qualification */
-+	uint8	key[WSEC_MAX_PSK_LEN];	/* PMK material */
-+} wsec_pmk_t;
-+
-+/* wireless security bitvec */
-+#define WEP_ENABLED		0x0001
-+#define TKIP_ENABLED		0x0002
-+#define AES_ENABLED		0x0004
-+#define WSEC_SWFLAG		0x0008
-+#define SES_OW_ENABLED		0x0040	/* to go into transition mode without setting wep */
-+
-+/* WPA authentication mode bitvec */
-+#define WPA_AUTH_DISABLED	0x0000	/* Legacy (i.e., non-WPA) */
-+#define WPA_AUTH_NONE		0x0001	/* none (IBSS) */
-+#define WPA_AUTH_UNSPECIFIED	0x0002	/* over 802.1x */
-+#define WPA_AUTH_PSK		0x0004	/* Pre-shared key */
-+/*#define WPA_AUTH_8021X 0x0020*/	/* 802.1x, reserved */
-+
-+#define WPA2_AUTH_UNSPECIFIED	0x0040	/* over 802.1x */
-+#define WPA2_AUTH_PSK		0x0080	/* Pre-shared key */
-+
-+
-+
-+/* pmkid */
-+#define	MAXPMKID		16	
-+
-+typedef struct _pmkid
-+{
-+	struct ether_addr	BSSID;
-+	uint8			PMKID[WPA2_PMKID_LEN];
-+} pmkid_t;
-+
-+typedef struct _pmkid_list
-+{
-+	uint32	npmkid;
-+	pmkid_t	pmkid[1];
-+} pmkid_list_t;
-+
-+typedef struct _pmkid_cand {
-+	struct ether_addr	BSSID;
-+	uint8			preauth;
-+} pmkid_cand_t;
-+
-+typedef struct _pmkid_cand_list {
-+	uint32	npmkid_cand;
-+	pmkid_cand_t	pmkid_cand[1];
-+} pmkid_cand_list_t;
-+
-+
-+typedef struct wl_led_info {
-+	uint32		index;		/* led index */
-+	uint32		behavior;
-+	bool		activehi;
-+} wl_led_info_t;
-+
-+typedef struct wlc_assoc_info {
-+	uint32		req_len;
-+	uint32		resp_len;
-+	uint32		flags;
-+	struct dot11_assoc_req req;
-+	struct ether_addr reassoc_bssid; /* used in reassoc's */
-+	struct dot11_assoc_resp resp;
-+} wl_assoc_info_t;
-+/* flags */
-+#define WLC_ASSOC_REQ_IS_REASSOC 0x01 /* assoc req was actually a reassoc */
-+/* srom read/write struct passed through ioctl */
-+typedef struct {
-+	uint	byteoff;		/* byte offset */
-+	uint	nbytes;		/* number of bytes */
-+	uint16 buf[1];
-+} srom_rw_t;
-+
-+/* R_REG and W_REG struct passed through ioctl */
-+typedef struct {
-+	uint32	byteoff;	/* byte offset of the field in d11regs_t */
-+	uint32	val;		/* read/write value of the field */
-+	uint32	size;		/* sizeof the field */
-+	uint	band;		/* band (optional) */
-+} rw_reg_t;
-+
-+/* Structure used by GET/SET_ATTEN ioctls */
-+typedef struct {
-+	uint16	auto_ctrl;	/* 1: Automatic control, 0: overriden */
-+	uint16	bb;		/* Baseband attenuation */
-+	uint16	radio;		/* Radio attenuation */
-+	uint16	txctl1;		/* Radio TX_CTL1 value */
-+} atten_t;
-+
-+/* Used to get specific STA parameters */
-+typedef struct {
-+	uint32	val;
-+	struct ether_addr ea;
-+} scb_val_t;
-+
-+
-+/* Event data type */
-+typedef struct wlc_event {
-+	wl_event_msg_t event; /* encapsulated event */	
-+	struct ether_addr *addr; /* used to keep a trace of the potential present of
-+							an address in wlc_event_msg_t */
-+	void *data;			/* used to hang additional data on an event */
-+	struct wlc_event *next;	/* enables ordered list of pending events */
-+} wlc_event_t;
-+
-+#define BCM_MAC_STATUS_INDICATION           (0x40010200L)
-+
-+typedef struct {
-+	uint16		ver;		/* version of this struct */
-+	uint16		len;		/* length in bytes of this structure */
-+	uint16		cap;		/* sta's advertized capabilities */
-+	uint32		flags;		/* flags defined below */
-+	uint32		idle;		/* time since data pkt rx'd from sta */
-+	struct ether_addr	ea;	/* Station address */
-+	wl_rateset_t	rateset;	/* rateset in use */
-+	uint32		in;		/* seconds elapsed since associated */
-+	uint32		listen_interval_inms; /* Min Listen interval in ms for this STA*/
-+} sta_info_t;
-+
-+#define WL_STA_VER	2
-+
-+/* flags fields */
-+#define WL_STA_BRCM	0x01
-+#define WL_STA_WME	0x02
-+#define WL_STA_ABCAP	0x04
-+#define WL_STA_AUTHE	0x08
-+#define WL_STA_ASSOC	0x10
-+#define WL_STA_AUTHO	0x20
-+#define WL_STA_WDS	0x40
-+#define WL_WDS_LINKUP	0x80
-+
-+
-+/*
-+ * Country locale determines which channels are available to us.
-+ */
-+typedef enum _wlc_locale {
-+	WLC_WW = 0,	/* Worldwide */
-+	WLC_THA,	/* Thailand */
-+	WLC_ISR,	/* Israel */
-+	WLC_JDN,	/* Jordan */
-+	WLC_PRC,	/* China */
-+	WLC_JPN,	/* Japan */
-+	WLC_FCC,	/* USA */
-+	WLC_EUR,	/* Europe */
-+	WLC_USL,	/* US Low Band only */
-+	WLC_JPH,	/* Japan High Band only */
-+	WLC_ALL,	/* All the channels in this band */
-+	WLC_11D,	/* Represents locale recieved by 11d beacons */
-+	WLC_LAST_LOCALE,
-+	WLC_UNDEFINED_LOCALE = 0xf
-+} wlc_locale_t;
-+
-+/* channel encoding */
-+typedef struct channel_info {
-+	int hw_channel;
-+	int target_channel;
-+	int scan_channel;
-+} channel_info_t;
-+
-+/* For ioctls that take a list of MAC addresses */
-+struct maclist {
-+	uint count;			/* number of MAC addresses */
-+	struct ether_addr ea[1];	/* variable length array of MAC addresses */
-+};
-+
-+/* get pkt count struct passed through ioctl */
-+typedef struct get_pktcnt {
-+	uint rx_good_pkt;
-+	uint rx_bad_pkt;
-+	uint tx_good_pkt;
-+	uint tx_bad_pkt;
-+} get_pktcnt_t;
-+
-+/* Linux network driver ioctl encoding */
-+typedef struct wl_ioctl {
-+	uint cmd;	/* common ioctl definition */
-+	void *buf;	/* pointer to user buffer */
-+	uint len;	/* length of user buffer */
-+	bool set;	/* get or set request (optional) */
-+	uint used;	/* bytes read or written (optional) */
-+	uint needed;	/* bytes needed (optional) */
-+} wl_ioctl_t;
-+
-+/*
-+ * Structure for passing hardware and software
-+ * revision info up from the driver.
-+ */
-+typedef struct wlc_rev_info {
-+	uint		vendorid;	/* PCI vendor id */
-+	uint		deviceid;	/* device id of chip */
-+	uint		radiorev;	/* radio revision */
-+	uint		chiprev;	/* chip revision */
-+	uint		corerev;	/* core revision */
-+	uint		boardid;	/* board identifier (usu. PCI sub-device id) */
-+	uint		boardvendor;	/* board vendor (usu. PCI sub-vendor id) */
-+	uint		boardrev;	/* board revision */
-+	uint		driverrev;	/* driver version */
-+	uint		ucoderev;	/* microcode version */
-+	uint		bus;		/* bus type */
-+	uint		chipnum;	/* chip number */
-+} wlc_rev_info_t;
-+
-+#define WL_BRAND_MAX 10
-+typedef struct wl_instance_info {
-+	uint instance;
-+	char brand[WL_BRAND_MAX];
-+} wl_instance_info_t;
-+
-+/* check this magic number */
-+#define WLC_IOCTL_MAGIC		0x14e46c77
-+
-+/* bump this number if you change the ioctl interface */
-+#define WLC_IOCTL_VERSION	1
-+
-+#define	WLC_IOCTL_MAXLEN	8192		/* max length ioctl buffer required */
-+#define	WLC_IOCTL_SMLEN		256		/* "small" length ioctl buffer required */
-+
-+/* common ioctl definitions */
-+#define WLC_GET_MAGIC				0
-+#define WLC_GET_VERSION				1
-+#define WLC_UP						2
-+#define WLC_DOWN					3
-+#define WLC_DUMP					6
-+#define WLC_GET_MSGLEVEL			7
-+#define WLC_SET_MSGLEVEL			8
-+#define WLC_GET_PROMISC				9
-+#define WLC_SET_PROMISC				10
-+#define WLC_GET_RATE				12
-+/* #define WLC_SET_RATE				13 */ /* no longer supported */
-+#define WLC_GET_INSTANCE			14
-+/* #define WLC_GET_FRAG				15 */ /* no longer supported */
-+/* #define WLC_SET_FRAG				16 */ /* no longer supported */
-+/* #define WLC_GET_RTS				17 */ /* no longer supported */
-+/* #define WLC_SET_RTS				18 */ /* no longer supported */
-+#define WLC_GET_INFRA				19
-+#define WLC_SET_INFRA				20
-+#define WLC_GET_AUTH				21
-+#define WLC_SET_AUTH				22
-+#define WLC_GET_BSSID				23
-+#define WLC_SET_BSSID				24
-+#define WLC_GET_SSID				25
-+#define WLC_SET_SSID				26
-+#define WLC_RESTART				27
-+#define WLC_GET_CHANNEL				29
-+#define WLC_SET_CHANNEL				30
-+#define WLC_GET_SRL				31
-+#define WLC_SET_SRL				32
-+#define WLC_GET_LRL				33
-+#define WLC_SET_LRL				34
-+#define WLC_GET_PLCPHDR				35
-+#define WLC_SET_PLCPHDR				36
-+#define WLC_GET_RADIO				37
-+#define WLC_SET_RADIO				38
-+#define WLC_GET_PHYTYPE				39
-+/* #define WLC_GET_WEP				42 */ /* no longer supported */
-+/* #define WLC_SET_WEP				43 */ /* no longer supported */
-+#define WLC_GET_KEY					44
-+#define WLC_SET_KEY					45
-+#define WLC_GET_REGULATORY			46
-+#define WLC_SET_REGULATORY			47
-+#define WLC_SCAN					50
-+#define WLC_SCAN_RESULTS			51
-+#define WLC_DISASSOC				52
-+#define WLC_REASSOC					53
-+#define WLC_GET_ROAM_TRIGGER		54
-+#define WLC_SET_ROAM_TRIGGER			55
-+#define WLC_GET_TXANT				61
-+#define WLC_SET_TXANT				62
-+#define WLC_GET_ANTDIV				63
-+#define WLC_SET_ANTDIV				64
-+/* #define WLC_GET_TXPWR			65 */ /* no longer supported */
-+/* #define WLC_SET_TXPWR			66 */ /* no longer supported */
-+#define WLC_GET_CLOSED				67
-+#define WLC_SET_CLOSED				68
-+#define WLC_GET_MACLIST				69
-+#define WLC_SET_MACLIST				70
-+#define WLC_GET_RATESET				71
-+#define WLC_SET_RATESET				72
-+#define WLC_GET_LOCALE				73
-+#define WLC_LONGTRAIN				74
-+#define WLC_GET_BCNPRD				75
-+#define WLC_SET_BCNPRD				76
-+#define WLC_GET_DTIMPRD				77
-+#define WLC_SET_DTIMPRD				78
-+#define WLC_GET_SROM				79
-+#define WLC_SET_SROM				80
-+#define WLC_GET_WEP_RESTRICT			81
-+#define WLC_SET_WEP_RESTRICT			82
-+#define WLC_GET_COUNTRY				83
-+#define WLC_SET_COUNTRY				84
-+#define WLC_GET_REVINFO				98
-+#define WLC_GET_MACMODE				105
-+#define WLC_SET_MACMODE				106
-+#define WLC_GET_GMODE				109
-+#define WLC_SET_GMODE				110
-+#define WLC_GET_CURR_RATESET			114	/* current rateset */
-+#define WLC_GET_SCANSUPPRESS			115
-+#define WLC_SET_SCANSUPPRESS			116
-+#define WLC_GET_AP				117
-+#define WLC_SET_AP				118
-+#define WLC_GET_EAP_RESTRICT			119
-+#define WLC_SET_EAP_RESTRICT			120
-+#define WLC_GET_WDSLIST				123
-+#define WLC_SET_WDSLIST				124
-+#define WLC_GET_RSSI				127
-+#define WLC_GET_WSEC				133
-+#define WLC_SET_WSEC				134
-+#define WLC_GET_BSS_INFO			136
-+#define WLC_GET_LAZYWDS				138
-+#define WLC_SET_LAZYWDS				139
-+#define WLC_GET_BANDLIST			140
-+#define WLC_GET_BAND				141
-+#define WLC_SET_BAND				142
-+#define WLC_GET_SHORTSLOT			144
-+#define WLC_GET_SHORTSLOT_OVERRIDE		145
-+#define WLC_SET_SHORTSLOT_OVERRIDE		146
-+#define WLC_GET_SHORTSLOT_RESTRICT		147
-+#define WLC_SET_SHORTSLOT_RESTRICT		148
-+#define WLC_GET_GMODE_PROTECTION		149
-+#define WLC_GET_GMODE_PROTECTION_OVERRIDE	150
-+#define WLC_SET_GMODE_PROTECTION_OVERRIDE	151
-+#define WLC_UPGRADE						152
-+/* #define WLC_GET_MRATE				153 */ /* no longer supported */
-+/* #define WLC_SET_MRATE				154 */ /* no longer supported */
-+#define WLC_GET_ASSOCLIST				159
-+#define WLC_GET_CLK						160
-+#define WLC_SET_CLK						161
-+#define WLC_GET_UP						162
-+#define WLC_OUT							163
-+#define WLC_GET_WPA_AUTH				164
-+#define WLC_SET_WPA_AUTH			165
-+#define WLC_GET_GMODE_PROTECTION_CONTROL	178
-+#define WLC_SET_GMODE_PROTECTION_CONTROL	179
-+#define WLC_GET_PHYLIST				180
-+#define WLC_GET_KEY_SEQ				183
-+#define WLC_GET_GMODE_PROTECTION_CTS		198
-+#define WLC_SET_GMODE_PROTECTION_CTS		199
-+#define WLC_GET_PIOMODE				203
-+#define WLC_SET_PIOMODE				204
-+#define WLC_SET_LED				209
-+#define WLC_GET_LED				210
-+#define WLC_GET_CHANNEL_SEL			215
-+#define WLC_START_CHANNEL_SEL			216
-+#define WLC_GET_VALID_CHANNELS			217
-+#define WLC_GET_FAKEFRAG			218
-+#define WLC_SET_FAKEFRAG			219
-+#define WLC_GET_WET				230
-+#define WLC_SET_WET				231
-+#define WLC_GET_KEY_PRIMARY			235
-+#define WLC_SET_KEY_PRIMARY			236
-+#define WLC_GET_RADAR				242
-+#define WLC_SET_RADAR				243
-+#define WLC_SET_SPECT_MANAGMENT			244
-+#define WLC_GET_SPECT_MANAGMENT			245
-+#define WLC_WDS_GET_REMOTE_HWADDR		246	/* currently handled in wl_linux.c/wl_vx.c */
-+#define WLC_SET_CS_SCAN_TIMER			248
-+#define WLC_GET_CS_SCAN_TIMER			249
-+#define WLC_SEND_PWR_CONSTRAINT			254
-+#define WLC_CURRENT_PWR				256
-+#define WLC_GET_CHANNELS_IN_COUNTRY		260
-+#define WLC_GET_COUNTRY_LIST			261
-+#define WLC_GET_VAR				262	/* get value of named variable */
-+#define WLC_SET_VAR				263	/* set named variable to value */
-+#define WLC_NVRAM_GET				264
-+#define WLC_NVRAM_SET				265
-+#define WLC_SET_WSEC_PMK			268
-+#define WLC_GET_AUTH_MODE			269
-+#define WLC_SET_AUTH_MODE			270
-+#define WLC_NDCONFIG_ITEM			273	/* currently handled in wl_oid.c */
-+#define WLC_NVOTPW					274
-+/* #define WLC_OTPW					275 */ /* no longer supported */
-+#define WLC_SET_LOCALE				278
-+#define WLC_LAST				279	/* do not change - use get_var/set_var */
-+
-+/*
-+ * Minor kludge alert:
-+ * Duplicate a few definitions that irelay requires from epiioctl.h here
-+ * so caller doesn't have to include this file and epiioctl.h .
-+ * If this grows any more, it would be time to move these irelay-specific
-+ * definitions out of the epiioctl.h and into a separate driver common file.
-+ */
-+#ifndef EPICTRL_COOKIE
-+#define EPICTRL_COOKIE		0xABADCEDE
-+#endif
-+
-+/* vx wlc ioctl's offset */
-+#define CMN_IOCTL_OFF 0x180
-+
-+/*
-+ * custom OID support
-+ *
-+ * 0xFF - implementation specific OID
-+ * 0xE4 - first byte of Broadcom PCI vendor ID
-+ * 0x14 - second byte of Broadcom PCI vendor ID
-+ * 0xXX - the custom OID number
-+ */
-+
-+/* begin 0x1f values beyond the start of the ET driver range. */
-+#define WL_OID_BASE		0xFFE41420
-+
-+/* NDIS overrides */
-+#define OID_WL_GETINSTANCE	(WL_OID_BASE + WLC_GET_INSTANCE)
-+#define OID_WL_NDCONFIG_ITEM (WL_OID_BASE + WLC_NDCONFIG_ITEM)
-+
-+#define WL_DECRYPT_STATUS_SUCCESS	1
-+#define WL_DECRYPT_STATUS_FAILURE	2
-+#define WL_DECRYPT_STATUS_UNKNOWN	3
-+
-+/* allows user-mode app to poll the status of USB image upgrade */
-+#define WLC_UPGRADE_SUCCESS			0
-+#define WLC_UPGRADE_PENDING			1
-+
-+#ifdef CONFIG_USBRNDIS_RETAIL
-+/* struct passed in for WLC_NDCONFIG_ITEM */
-+typedef struct {
-+	char *name;
-+	void *param;
-+} ndconfig_item_t;
-+#endif
-+
-+/* Bit masks for radio disabled status - returned by WL_GET_RADIO */
-+#define WL_RADIO_SW_DISABLE		(1<<0)
-+#define WL_RADIO_HW_DISABLE		(1<<1)
-+#define WL_RADIO_MPC_DISABLE		(1<<2)
-+#define WL_RADIO_COUNTRY_DISABLE	(1<<3)	/* some countries don't support any 802.11 channel */
-+
-+/* Override bit for WLC_SET_TXPWR.  if set, ignore other level limits */
-+#define WL_TXPWR_OVERRIDE	(1<<31)
-+
-+/* "diag" iovar argument and error code */
-+#define WL_DIAG_INTERRUPT			1	/* d11 loopback interrupt test */
-+#define WL_DIAG_MEMORY				3	/* d11 memory test */
-+#define WL_DIAG_LED				4	/* LED test */
-+#define WL_DIAG_REG				5	/* d11/phy register test */
-+#define WL_DIAG_SROM				6	/* srom read/crc test */
-+#define WL_DIAG_DMA				7	/* DMA test */
-+
-+#define WL_DIAGERR_SUCCESS			0
-+#define WL_DIAGERR_FAIL_TO_RUN			1	/* unable to run requested diag */
-+#define WL_DIAGERR_NOT_SUPPORTED		2	/* diag requested is not supported */
-+#define WL_DIAGERR_INTERRUPT_FAIL		3	/* loopback interrupt test failed */
-+#define WL_DIAGERR_LOOPBACK_FAIL		4	/* loopback data test failed */
-+#define WL_DIAGERR_SROM_FAIL			5	/* srom read failed */
-+#define WL_DIAGERR_SROM_BADCRC			6	/* srom crc failed */
-+#define WL_DIAGERR_REG_FAIL			7	/* d11/phy register test failed */
-+#define WL_DIAGERR_MEMORY_FAIL			8	/* d11 memory test failed */
-+#define WL_DIAGERR_NOMEM			9	/* diag test failed due to no memory */
-+#define WL_DIAGERR_DMA_FAIL			10	/* DMA test failed */
-+
-+/* Bus types */
-+#define WL_SB_BUS	0	/* Silicon Backplane */
-+#define WL_PCI_BUS	1	/* PCI target */
-+#define WL_PCMCIA_BUS	2	/* PCMCIA target */
-+
-+/* band types */
-+#define	WLC_BAND_AUTO		0	/* auto-select */
-+#define	WLC_BAND_A		1	/* "a" band (5 Ghz) */
-+#define	WLC_BAND_B		2	/* "b" band (2.4 Ghz) */
-+#define	WLC_BAND_ALL		3	/* all bands */
-+
-+/* phy types (returned by WLC_GET_PHYTPE) */
-+#define	WLC_PHY_TYPE_A		0
-+#define	WLC_PHY_TYPE_B		1
-+#define	WLC_PHY_TYPE_G		2
-+#define	WLC_PHY_TYPE_NULL	0xf
-+
-+/* MAC list modes */
-+#define WLC_MACMODE_DISABLED	0	/* MAC list disabled */
-+#define WLC_MACMODE_DENY	1	/* Deny specified (i.e. allow unspecified) */
-+#define WLC_MACMODE_ALLOW	2	/* Allow specified (i.e. deny unspecified) */
-+
-+/*
-+ *
-+ */
-+#define GMODE_LEGACY_B		0
-+#define GMODE_AUTO		1
-+#define GMODE_ONLY		2
-+#define GMODE_B_DEFERRED	3
-+#define GMODE_PERFORMANCE	4
-+#define GMODE_LRS		5
-+#define GMODE_MAX		6
-+
-+/* values for PLCPHdr_override */
-+#define WLC_PLCP_AUTO	-1
-+#define WLC_PLCP_SHORT	0
-+#define WLC_PLCP_LONG	1
-+
-+/* values for g_protection_override */
-+#define WLC_G_PROTECTION_AUTO	-1
-+#define WLC_G_PROTECTION_OFF	0
-+#define WLC_G_PROTECTION_ON	1
-+
-+/* values for g_protection_control */
-+#define WLC_G_PROTECTION_CTL_OFF	0
-+#define WLC_G_PROTECTION_CTL_LOCAL	1
-+#define WLC_G_PROTECTION_CTL_OVERLAP	2
-+
-+/* Values for PM */
-+#define PM_OFF	0
-+#define PM_MAX	1
-+#define PM_FAST 2
-+
-+
-+
-+typedef struct {
-+	int npulses; 	/* required number of pulses at n * t_int */
-+	int ncontig; 	/* required number of pulses at t_int */
-+	int min_pw; 	/* minimum pulse width (20 MHz clocks) */
-+	int max_pw; 	/* maximum pulse width (20 MHz clocks) */	
-+	uint16 thresh0;	/* Radar detection, thresh 0 */
-+	uint16 thresh1;	/* Radar detection, thresh 1 */
-+} wl_radar_args_t;
-+
-+/* radar iovar SET defines */
-+#define WL_RADRA_DETECTOR_OFF		0	/* radar dector off */
-+#define WL_RADAR_DETECTOR_ON		1	/* radar detector on */
-+#define WL_RADAR_SIMULATED		2	/* force radar detector to declare detection once */
-+
-+/* dfs_status iovar-related defines */
-+
-+/* cac - channel availability check,
-+ * ism - in-service monitoring
-+ * csa - channel switching anouncement
-+ */
-+
-+/* cac state values */
-+#define WL_DFS_CACSTATE_IDLE		0	/* state for operating in non-radar channel */
-+#define	WL_DFS_CACSTATE_PREISM_CAC	1	/* CAC in progress */
-+#define WL_DFS_CACSTATE_ISM		2	/* ISM in progress */
-+#define WL_DFS_CACSTATE_CSA		3	/* csa */
-+#define WL_DFS_CACSTATE_POSTISM_CAC	4	/* ISM CAC */
-+#define WL_DFS_CACSTATE_PREISM_OOC	5	/* PREISM OOC */
-+#define WL_DFS_CACSTATE_POSTISM_OOC	6	/* POSTISM OOC */
-+#define WL_DFS_CACSTATES		7	/* this many states exist */
-+
-+/* data structure used in 'dfs_status' wl interface, which is used to query dfs status */
-+typedef struct {
-+	uint state;		/* noted by WL_DFS_CACSTATE_XX. */
-+	uint duration;		/* time spent in ms in state. */
-+	/* as dfs enters ISM state, it removes the operational channel from quiet channel list
-+	 * and notes the channel in channel_cleared. set to 0 if no channel is cleared
-+	 */
-+	uint channel_cleared;
-+} wl_dfs_status_t;
-+
-+#define NUM_PWRCTRL_RATES 12
-+
-+
-+/* 802.11h enforcement levels */
-+#define SPECT_MNGMT_OFF		0		/* 11h disabled */
-+#define SPECT_MNGMT_LOOSE	1		/* allow scan lists to contain non-11h AP */
-+#define SPECT_MNGMT_STRICT	2		/* prune out non-11h APs from scan list */
-+#define SPECT_MNGMT_11D		3		/* switch to 802.11D mode */
-+
-+#define WL_CHAN_VALID_HW	(1 << 0)	/* valid with current HW */
-+#define WL_CHAN_VALID_SW	(1 << 1)	/* valid with current country setting */
-+#define WL_CHAN_BAND_A		(1 << 2)	/* A-band channel */
-+#define WL_CHAN_RADAR		(1 << 3)	/* radar sensitive  channel */
-+#define WL_CHAN_INACTIVE	(1 << 4)	/* temporarily out of service due to radar */
-+#define WL_CHAN_RADAR_PASSIVE	(1 << 5)	/* radar channel is in passive mode */
-+
-+#define WL_MPC_VAL		0x00400000
-+#define WL_APSTA_VAL		0x00800000
-+#define WL_DFS_VAL		0x01000000
-+
-+/* max # of leds supported by GPIO (gpio pin# == led index#) */
-+#define	WL_LED_NUMGPIO		16	/* gpio 0-15 */
-+
-+/* led per-pin behaviors */
-+#define	WL_LED_OFF		0		/* always off */
-+#define	WL_LED_ON		1		/* always on */
-+#define	WL_LED_ACTIVITY		2		/* activity */
-+#define	WL_LED_RADIO		3		/* radio enabled */
-+#define	WL_LED_ARADIO		4		/* 5  Ghz radio enabled */
-+#define	WL_LED_BRADIO		5		/* 2.4Ghz radio enabled */
-+#define	WL_LED_BGMODE		6		/* on if gmode, off if bmode */
-+#define	WL_LED_WI1		7		
-+#define	WL_LED_WI2		8		
-+#define	WL_LED_WI3		9		
-+#define	WL_LED_ASSOC		10		/* associated state indicator */
-+#define	WL_LED_INACTIVE		11		/* null behavior (clears default behavior) */
-+#define	WL_LED_NUMBEHAVIOR	12
-+
-+/* led behavior numeric value format */
-+#define	WL_LED_BEH_MASK		0x7f		/* behavior mask */
-+#define	WL_LED_AL_MASK		0x80		/* activelow (polarity) bit */
-+
-+
-+/* WDS link local endpoint WPA role */
-+#define WL_WDS_WPA_ROLE_AUTH	0	/* authenticator */
-+#define WL_WDS_WPA_ROLE_SUP	1	/* supplicant */
-+#define WL_WDS_WPA_ROLE_AUTO	255	/* auto, based on mac addr value */
-+
-+/* number of bytes needed to define a 128-bit mask for MAC event reporting */
-+#define WL_EVENTING_MASK_LEN	16
-+
-+/* Structures and constants used for "vndr_ie" IOVar interface */
-+#define VNDR_IE_CMD_LEN		4	/* length of the set command string: "add", "del" (+ NULL) */
-+
-+/* 802.11 Mgmt Packet flags */
-+#define VNDR_IE_BEACON_FLAG	0x1
-+#define VNDR_IE_PRBRSP_FLAG	0x2
-+#define VNDR_IE_ASSOCRSP_FLAG	0x4
-+#define VNDR_IE_AUTHRSP_FLAG	0x8
-+
-+typedef struct {
-+	uint32 pktflag;			/* bitmask indicating which packet(s) contain this IE */
-+	vndr_ie_t vndr_ie_data;		/* vendor IE data */
-+} vndr_ie_info_t;
-+
-+typedef struct {
-+	int iecount;			/* number of entries in the vndr_ie_list[] array */
-+	vndr_ie_info_t vndr_ie_list[1];	/* variable size list of vndr_ie_info_t structs */
-+} vndr_ie_buf_t;
-+
-+typedef struct {
-+	char cmd[VNDR_IE_CMD_LEN];	/* vndr_ie IOVar set command : "add", "del" + NULL */
-+	vndr_ie_buf_t vndr_ie_buffer;	/* buffer containing Vendor IE list information */
-+} vndr_ie_setbuf_t;
-+
-+/* join target preference types */
-+#define WL_JOIN_PREF_RSSI	1	/* by RSSI, mandatory */
-+#define WL_JOIN_PREF_WPA	2	/* by akm and ciphers, optional, RSN and WPA as values */
-+#define WL_JOIN_PREF_BAND	3	/* by 802.11 band, optional, WLC_BAND_XXXX as values */
-+
-+/* band preference */
-+#define WLJP_BAND_ASSOC_PREF	255	/* use assoc preference settings */
-+					/* others use WLC_BAND_XXXX as values */
-+
-+/* any multicast cipher suite */
-+#define WL_WPA_ACP_MCS_ANY	"\x00\x00\x00\x00"
-+
-+#if !defined(__GNUC__)
-+#pragma pack(pop)
-+#endif
-+
-+#define	NFIFO				6	/* # tx/rx fifopairs */
-+
-+#define	WL_CNT_T_VERSION		1	/* current version of wl_cnt_t struct */
-+
-+typedef struct {
-+	uint16	version;	/* see definition of WL_CNT_T_VERSION */	
-+	uint16	length;		/* length of entire structure */
-+
-+ 	/* transmit stat counters */
-+	uint32	txframe;	/* tx data frames */
-+	uint32	txbyte;		/* tx data bytes */
-+	uint32	txretrans;	/* tx mac retransmits */
-+	uint32	txerror;	/* tx data errors */
-+	uint32	txctl;		/* tx management frames */
-+	uint32	txprshort;	/* tx short preamble frames */
-+	uint32	txserr;		/* tx status errors */
-+	uint32	txnobuf;	/* tx out of buffers errors */
-+	uint32	txnoassoc;	/* tx discard because we're not associated */
-+	uint32	txrunt;		/* tx runt frames */
-+	uint32	txchit;		/* tx header cache hit (fastpath) */
-+	uint32	txcmiss;	/* tx header cache miss (slowpath) */
-+
-+	/* transmit chip error counters */
-+	uint32	txuflo;		/* tx fifo underflows */
-+	uint32	txphyerr;	/* tx phy errors (indicated in tx status) */
-+	uint32	txphycrs;	
-+
-+	/* receive stat counters */
-+	uint32	rxframe;	/* rx data frames */
-+	uint32	rxbyte;		/* rx data bytes */
-+	uint32	rxerror;	/* rx data errors */
-+	uint32	rxctl;		/* rx management frames */
-+	uint32	rxnobuf;	/* rx out of buffers errors */
-+	uint32	rxnondata;	/* rx non data frames in the data channel errors */
-+	uint32	rxbadds;	/* rx bad DS errors */
-+	uint32	rxbadcm;	/* rx bad control or management frames */
-+	uint32	rxfragerr;	/* rx fragmentation errors */
-+	uint32	rxrunt;		/* rx runt frames */
-+	uint32	rxgiant;	/* rx giant frames */
-+	uint32	rxnoscb;	/* rx no scb error */
-+	uint32	rxbadproto;	/* rx invalid frames */
-+	uint32	rxbadsrcmac;	/* rx frames with Invalid Src Mac*/
-+	uint32	rxbadda;	/* rx frames tossed for invalid da */
-+	uint32	rxfilter;	/* rx frames filtered out */
-+
-+	/* receive chip error counters */
-+	uint32	rxoflo;		/* rx fifo overflow errors */
-+	uint32	rxuflo[NFIFO];	/* rx dma descriptor underflow errors */
-+
-+	uint32	d11cnt_txrts_off;	/* d11cnt txrts value when reset d11cnt */
-+	uint32	d11cnt_rxcrc_off;	/* d11cnt rxcrc value when reset d11cnt */
-+	uint32	d11cnt_txnocts_off;	/* d11cnt txnocts value when reset d11cnt */
-+
-+	/* misc counters */
-+	uint32	dmade;		/* tx/rx dma descriptor errors */
-+	uint32	dmada;		/* tx/rx dma data errors */
-+	uint32	dmape;		/* tx/rx dma descriptor protocol errors */
-+	uint32	reset;		/* reset count */
-+	uint32	tbtt;		/* cnts the TBTT int's */
-+	uint32	txdmawar;	
-+
-+	/* MAC counters: 32-bit version of d11.h's macstat_t */
-+	uint32	txallfrm;	/* total number of frames sent, incl. Data, ACK, RTS, CTS, 
-+				   Control Management (includes retransmissions) */
-+	uint32	txrtsfrm;	/* number of RTS sent out by the MAC */
-+	uint32	txctsfrm;	/* number of CTS sent out by the MAC */
-+	uint32	txackfrm;	/* number of ACK frames sent out */
-+	uint32	txdnlfrm;	/* Not used */
-+	uint32	txbcnfrm;	/* beacons transmitted */
-+	uint32	txfunfl[8];	/* per-fifo tx underflows */
-+	uint32	txtplunfl;	/* Template underflows (mac was too slow to transmit ACK/CTS or BCN) */
-+	uint32	txphyerror;	/* Transmit phy error, type of error is reported in tx-status for
-+				   driver enqueued frames*/
-+	uint32	rxfrmtoolong;	/* Received frame longer than legal limit (2346 bytes) */
-+	uint32	rxfrmtooshrt;	/* Received frame did not contain enough bytes for its frame type */
-+	uint32	rxinvmachdr;	/* Either the protocol version != 0 or frame type not
-+				   data/control/management*/
-+	uint32	rxbadfcs;	/* number of frames for which the CRC check failed in the MAC */
-+	uint32	rxbadplcp;	/* parity check of the PLCP header failed */
-+	uint32	rxcrsglitch;	/* PHY was able to correlate the preamble but not the header */
-+	uint32	rxstrt;		/* Number of received frames with a good PLCP (i.e. passing parity check) */
-+	uint32	rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */
-+	uint32	rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */
-+	uint32	rxcfrmucast;	/* number of received CNTRL frames with good FCS and matching RA */
-+	uint32	rxrtsucast;	/* number of unicast RTS addressed to the MAC (good FCS) */
-+	uint32	rxctsucast;	/* number of unicast CTS addressed to the MAC (good FCS)*/
-+	uint32	rxackucast;	/* number of ucast ACKS received (good FCS)*/
-+	uint32	rxdfrmocast;	/* number of received DATA frames with good FCS and not matching RA */
-+	uint32	rxmfrmocast;	/* number of received MGMT frames with good FCS and not matching RA */
-+	uint32	rxcfrmocast;	/* number of received CNTRL frame with good FCS and not matching RA */
-+	uint32	rxrtsocast;	/* number of received RTS not addressed to the MAC */
-+	uint32	rxctsocast;	/* number of received CTS not addressed to the MAC */
-+	uint32	rxdfrmmcast;	/* number of RX Data multicast frames received by the MAC */
-+	uint32	rxmfrmmcast;	/* number of RX Management multicast frames received by the MAC */
-+	uint32	rxcfrmmcast;	/* number of RX Control multicast frames received by the MAC (unlikely
-+				   to see these) */
-+	uint32	rxbeaconmbss;	/* beacons received from member of BSS */
-+	uint32	rxdfrmucastobss; /* number of unicast frames addressed to the MAC from other BSS (WDS FRAME) */
-+	uint32	rxbeaconobss;	/* beacons received from other BSS */
-+	uint32	rxrsptmout;	/* Number of response timeouts for transmitted frames expecting a
-+				   response */
-+	uint32	bcntxcancl;	/* transmit beacons cancelled due to receipt of beacon (IBSS) */
-+	uint32	rxf0ovfl;	/* Number of receive fifo 0 overflows */
-+	uint32	rxf1ovfl;	/* Number of receive fifo 1 overflows (obsolete) */
-+	uint32	rxf2ovfl;	/* Number of receive fifo 2 overflows (obsolete) */
-+	uint32	txsfovfl;	/* Number of transmit status fifo overflows (obsolete) */
-+	uint32	pmqovfl;	/* Number of PMQ overflows */
-+	uint32	rxcgprqfrm;	/* Number of received Probe requests that made it into the PRQ fifo */
-+	uint32	rxcgprsqovfl;	/* Rx Probe Request Que overflow in the AP */
-+	uint32	txcgprsfail;	/* Tx Probe Response Fail. AP sent probe response but did not get ACK */
-+	uint32	txcgprssuc;	/* Tx Probe Rresponse Success (ACK was received) */
-+	uint32	prs_timeout;	/* Number of probe requests that were dropped from the PRQ fifo because
-+				   a probe response could not be sent out within the time limit defined
-+				   in M_PRS_MAXTIME */
-+	uint32	rxnack;		/* Number of NACKS received (Afterburner) */
-+	uint32	frmscons;	/* Number of frames completed without transmission because of an
-+				   Afterburner re-queue */
-+	uint32	txnack;		/* Number of NACKs transmtitted  (Afterburner) */
-+	uint32	txglitch_nack;	/* obsolete */
-+	uint32	txburst;	/* obsolete */
-+	uint32	rxburst;	/* obsolete */
-+
-+	/* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */
-+	uint32	txfrag;		/* dot11TransmittedFragmentCount */
-+	uint32	txmulti;	/* dot11MulticastTransmittedFrameCount */
-+	uint32	txfail;		/* dot11FailedCount */
-+	uint32	txretry;	/* dot11RetryCount */
-+	uint32	txretrie;	/* dot11MultipleRetryCount */
-+	uint32	rxdup;		/* dot11FrameduplicateCount */
-+	uint32	txrts;		/* dot11RTSSuccessCount */
-+	uint32	txnocts;	/* dot11RTSFailureCount */
-+	uint32	txnoack;	/* dot11ACKFailureCount */
-+	uint32	rxfrag;		/* dot11ReceivedFragmentCount */
-+	uint32	rxmulti;	/* dot11MulticastReceivedFrameCount */
-+	uint32	rxcrc;		/* dot11FCSErrorCount */
-+	uint32	txfrmsnt;	/* dot11TransmittedFrameCount (bogus MIB?) */
-+	uint32	rxundec;	/* dot11WEPUndecryptableCount */
-+
-+	/* WPA2 counters (see rxundec for DecryptFailureCount) */
-+	uint32	tkipmicfaill;	/* TKIPLocalMICFailures */
-+	uint32	tkipcntrmsr;	/* TKIPCounterMeasuresInvoked */
-+	uint32	tkipreplay;	/* TKIPReplays */
-+	uint32	ccmpfmterr;	/* CCMPFormatErrors */
-+	uint32	ccmpreplay;	/* CCMPReplays */
-+	uint32	ccmpundec;	/* CCMPDecryptErrors */
-+	uint32	fourwayfail;	/* FourWayHandshakeFailures */
-+	uint32	wepundec;	/* dot11WEPUndecryptableCount */
-+	uint32	wepicverr;	/* dot11WEPICVErrorCount */
-+	uint32	decsuccess;	/* DecryptSuccessCount */
-+	uint32	tkipicverr;	/* TKIPICVErrorCount */
-+	uint32	wepexcluded;	/* dot11WEPExcludedCount */
-+} wl_cnt_t;
-+
-+#endif /* _wlioctl_h_ */
 diff -Nur linux-2.4.32/arch/mips/bcm947xx/Makefile linux-2.4.32-brcm/arch/mips/bcm947xx/Makefile
 --- linux-2.4.32/arch/mips/bcm947xx/Makefile	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.4.32-brcm/arch/mips/bcm947xx/Makefile	2005-12-19 01:56:51.733868750 +0100
@@ -14676,7 +10620,7 @@ diff -Nur linux-2.4.32/drivers/net/Config.in linux-2.4.32-brcm/drivers/net/Confi
 diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/hnd/bcmsrom.c
 --- linux-2.4.32/drivers/net/hnd/bcmsrom.c	1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.4.32-brcm/drivers/net/hnd/bcmsrom.c	2005-12-16 23:39:11.284858000 +0100
-@@ -0,0 +1,936 @@
+@@ -0,0 +1,938 @@
 +/*
 + *  Misc useful routines to access NIC SROM/OTP .
 + *
@@ -14701,7 +10645,9 @@ diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/h
 +#include <sbutils.h>
 +#include <bcmnvram.h>
 +
-+#include <proto/ethernet.h>	/* for sprom content groking */
++struct  ether_addr {
++	uint8 octet[6];
++} PACKED;
 +
 +#define	VARS_MAX	4096	/* should be reduced */
 +
@@ -14895,7 +10841,7 @@ diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/h
 +
 +		case CISTPL_FUNCE:
 +			if (cis[i] == LAN_NID) {
-+				ASSERT(cis[i + 1] == ETHER_ADDR_LEN);
++				ASSERT(cis[i + 1] == 6);
 +				bcm_ether_ntoa((uchar*)&cis[i + 2], eabuf);
 +				vp += sprintf(vp, "il0macaddr=%s", eabuf);
 +				vp++;
@@ -15414,7 +11360,7 @@ diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/h
 +	ea.octet[3] = b[woff+1] & 0xff;
 +	ea.octet[4] = (b[woff+2] >> 8) & 0xff;
 +	ea.octet[5] = b[woff+2] & 0xff;
-+	woff += ETHER_ADDR_LEN/2 ;
++	woff += 3;
 +	bcm_ether_ntoa((uchar*)&ea, eabuf);
 +	vp += sprintf(vp, "il0macaddr=%s", eabuf);
 +	vp++;
@@ -15426,7 +11372,7 @@ diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/h
 +	ea.octet[3] = b[woff+1] & 0xff;
 +	ea.octet[4] = (b[woff+2] >> 8) & 0xff;
 +	ea.octet[5] = b[woff+2] & 0xff;
-+	woff += ETHER_ADDR_LEN/2 ;
++	woff += 3;
 +	bcm_ether_ntoa((uchar*)&ea, eabuf);
 +	vp += sprintf(vp, "et0macaddr=%s", eabuf);
 +	vp++;
@@ -15438,7 +11384,7 @@ diff -Nur linux-2.4.32/drivers/net/hnd/bcmsrom.c linux-2.4.32-brcm/drivers/net/h
 +	ea.octet[3] = b[woff+1] & 0xff;
 +	ea.octet[4] = (b[woff+2] >> 8) & 0xff;
 +	ea.octet[5] = b[woff+2] & 0xff;
-+	woff += ETHER_ADDR_LEN/2 ;
++	woff += 3;
 +	bcm_ether_ntoa((uchar*)&ea, eabuf);
 +	vp += sprintf(vp, "et1macaddr=%s", eabuf);
 +	vp++;
-- 
2.30.2