From 1eb838d3e2a473acbb9b21278e75b79640fb2c7b Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Mon, 19 Jul 2010 16:01:41 +0200 Subject: [PATCH] USB: s3c-hsotg: modify only selected bits in S3C_PHYPWR register S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits related to PHY1. Signed-off-by: Marek Szyprowski Signed-off-by: Kyungmin Park Signed-off-by: Greg Kroah-Hartman --- drivers/usb/gadget/s3c-hsotg.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c index ce272b4d79c4..258ca01ac679 100644 --- a/drivers/usb/gadget/s3c-hsotg.c +++ b/drivers/usb/gadget/s3c-hsotg.c @@ -2801,9 +2801,11 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg, static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg) { struct clk *xusbxti; - u32 osc; + u32 pwr, osc; - writel(0, S3C_PHYPWR); + pwr = readl(S3C_PHYPWR); + pwr &= ~0x19; + writel(pwr, S3C_PHYPWR); mdelay(1); osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0; -- 2.30.2