From 281ab031a8c9e5b593142eb4ec59a87faae8676a Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 16 Dec 2005 16:52:22 +1100 Subject: [PATCH] [PATCH] radeon drm: fix agp aperture map offset This finally fixes the radeon memory mapping bug that was incorrectly fixed by the previous patch. This time, we use the actual vram size as the size to calculate how far to move the AGP aperture from the framebuffer in card's memory space. If there are still issues with this patch, they are due to bugs in the X driver that I'm working on fixing too. Signed-off-by: Benjamin Herrenschmidt Cc: Mark M. Hoffman Cc: Paul Mackerras Signed-off-by: Linus Torvalds --- drivers/char/drm/radeon_cp.c | 9 +++++++-- drivers/char/drm/radeon_drv.h | 1 + 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c index 9f2b4efd0c7a..95ae9e0892ac 100644 --- a/drivers/char/drm/radeon_cp.c +++ b/drivers/char/drm/radeon_cp.c @@ -1312,6 +1312,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) { drm_radeon_private_t *dev_priv = dev->dev_private;; + unsigned int mem_size; + DRM_DEBUG("\n"); dev_priv->is_pci = init->is_pci; @@ -1521,8 +1523,11 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init) + dev_priv->fb_location) >> 10)); dev_priv->gart_size = init->gart_size; - dev_priv->gart_vm_start = dev_priv->fb_location - + RADEON_READ(RADEON_CONFIG_APER_SIZE) * 2; + + mem_size = RADEON_READ(RADEON_CONFIG_MEMSIZE); + if (mem_size == 0) + mem_size = 0x800000; + dev_priv->gart_vm_start = dev_priv->fb_location + mem_size; #if __OS_HAS_AGP if (!dev_priv->is_pci) diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index 7bda7e33d2bd..d92ccee3e54c 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h @@ -379,6 +379,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t * dev, DRMFILE filp, # define RADEON_PLL_WR_EN (1 << 7) #define RADEON_CLOCK_CNTL_INDEX 0x0008 #define RADEON_CONFIG_APER_SIZE 0x0108 +#define RADEON_CONFIG_MEMSIZE 0x00f8 #define RADEON_CRTC_OFFSET 0x0224 #define RADEON_CRTC_OFFSET_CNTL 0x0228 # define RADEON_CRTC_TILE_EN (1 << 15) -- 2.30.2