From 45c0774151183d04bc3bc5ecce96160dc736f96e Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Mon, 17 Aug 2015 09:50:09 +0200
Subject: [PATCH] net: zynq: Setup BD when structures are filled

Fix incorrect sequence in BD handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
---
 drivers/net/zynq_gem.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 875738abb2..b8686f3e23 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -406,9 +406,6 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
 	struct zynq_gem_priv *priv = dev->priv;
 	struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
 
-	/* setup BD */
-	writel((ulong)priv->tx_bd, &regs->txqbase);
-
 	/* Setup Tx BD */
 	memset(priv->tx_bd, 0, sizeof(struct emac_bd));
 
@@ -417,6 +414,9 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len)
 			       ZYNQ_GEM_TXBUF_LAST_MASK |
 			       ZYNQ_GEM_TXBUF_WRAP_MASK;
 
+	/* setup BD */
+	writel((ulong)priv->tx_bd, &regs->txqbase);
+
 	addr = (ulong) ptr;
 	addr &= ~(ARCH_DMA_MINALIGN - 1);
 	size = roundup(len, ARCH_DMA_MINALIGN);
-- 
2.30.2